drm/i915: don't set transcoder bpc on CougarPoint

This prevents us from setting reserved or incorrect bits on CougarPoint.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 823b8d9..c675f9f 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1158,12 +1158,15 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
 
        reg = TRANSCONF(pipe);
        val = I915_READ(reg);
-       /*
-        * make the BPC in transcoder be consistent with
-        * that in pipeconf reg.
-        */
-       val &= ~PIPE_BPC_MASK;
-       val |= I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK;
+
+       if (HAS_PCH_IBX(dev_priv->dev)) {
+               /*
+                * make the BPC in transcoder be consistent with
+                * that in pipeconf reg.
+                */
+               val &= ~PIPE_BPC_MASK;
+               val |= I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK;
+       }
        I915_WRITE(reg, val | TRANS_ENABLE);
        if (wait_for(I915_READ(reg) & TRANS_STATE_ENABLE, 100))
                DRM_ERROR("failed to enable transcoder %d\n", pipe);