USB: fix SB700 usb subsystem hang bug

This patch is required for AMD SB700 south bridge revision A12 and A13 to avoid
USB subsystem hang symptom. The USB subsystem hang symptom is observed when the
system has multiple USB devices connected to it. In some cases a USB hub may be
required to observe this symptom.

This patch works around the problem by correcting the internal register setting
that will help by changing the behavior of the internal logic to avoid the
USB subsystem hang issue. The change in the behavior of the logic does not
impact the normal operation of the USB subsystem.

Reported-by: Volker Armin Hemmann <volker.armin.hemmann@tu-clausthal.de>
Tested-by: Volker Armin Hemmann <volker.armin.hemmann@tu-clausthal.de>
Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Libin Yang <libin.yang@amd.com>
Cc: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index c46a58f..9d0ea57 100644 (file)
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -66,6 +66,8 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
 {
        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
        struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
+       struct pci_dev          *p_smbus;
+       u8                      rev;
        u32                     temp;
        int                     retval;
 
@@ -166,6 +168,25 @@ static int ehci_pci_setup(struct usb_hcd *hcd)
                        pci_write_config_byte(pdev, 0x4b, tmp | 0x20);
                }
                break;
+       case PCI_VENDOR_ID_ATI:
+               /* SB700 old version has a bug in EHCI controller,
+                * which causes usb devices lose response in some cases.
+                */
+               if (pdev->device == 0x4396) {
+                       p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
+                                                PCI_DEVICE_ID_ATI_SBX00_SMBUS,
+                                                NULL);
+                       if (!p_smbus)
+                               break;
+                       rev = p_smbus->revision;
+                       if ((rev == 0x3a) || (rev == 0x3b)) {
+                               u8 tmp;
+                               pci_read_config_byte(pdev, 0x53, &tmp);
+                               pci_write_config_byte(pdev, 0x53, tmp | (1<<3));
+                       }
+                       pci_dev_put(p_smbus);
+               }
+               break;
        }
 
        ehci_reset(ehci);