[PATCH] sky2: PHY power on delays

The documentation says we need to wait after turning on the PHY.
Also, don't enable WOL by default.

Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 5e8f9ef..e65689e 100644 (file)
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -234,7 +234,6 @@ static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
                }
 
                if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
-                       sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON);
                        sky2_pci_write32(hw, PCI_DEV_REG3, 0);
                        reg1 = sky2_pci_read32(hw, PCI_DEV_REG4);
                        reg1 &= P_ASPM_CONTROL_MSK;
@@ -243,6 +242,7 @@ static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
                }
 
                sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
+               udelay(100);
 
                break;
 
@@ -255,6 +255,7 @@ static void sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
                else
                        reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
                sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
+               udelay(100);
 
                if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
                        sky2_write8(hw, B2_Y2_CLK_GATE, 0);