ath9k: Fix bug in rate table

The following commit added an entry in 11na and 11ng rate
table but missed to update its rate count field. This
inconsistency between the rate count and the actual number
of rates in the table will leave out the final rate entry
(mcs15 with half gi in ht40) while forming the valid
rate indices. Not having mcs15+shortGI in ht40 will have
a performance impact (on max throughput) of about 10% both
in nght40 and naht40 mode.

	Author: Vasanthakumar Thiagarajan <vasanth@atheros.com>
	Date:   Thu May 13 18:42:38 2010 -0700

    	ath9k: Enable Short GI in 20 Mhz for ar9287 and later chips

    	This patch enables short GI rx at all rates and tx at mcs15
    	for 20 Mhz channel width also.

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c
index f5180d3..02b6052 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/rc.c
+++ b/drivers/net/wireless/ath/ath9k/rc.c
@@ -20,7 +20,7 @@
 #include "ath9k.h"
 
 static const struct ath_rate_table ar5416_11na_ratetable = {
-       42,
+       43,
        8, /* MCS start */
        {
                { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
@@ -118,7 +118,7 @@ static const struct ath_rate_table ar5416_11na_ratetable = {
  * for HT are the 64K max aggregate limit */
 
 static const struct ath_rate_table ar5416_11ng_ratetable = {
-       46,
+       47,
        12, /* MCS start */
        {
                { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */