[MIPS] Count timer interrupts correctly.
authorChris Dearman <chris@mips.com>
Thu, 21 Jun 2007 11:59:58 +0000 (12:59 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 26 Jun 2007 17:57:34 +0000 (19:57 +0200)
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/smtc.c

index 2e01147..046b03b 100644 (file)
@@ -822,7 +822,7 @@ void ipi_decode(struct smtc_ipi *pipi)
        switch (type_copy) {
        case SMTC_CLOCK_TICK:
                irq_enter();
-               kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_perfcount_irq]++;
+               kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_compare_irq]++;
                /* Invoke Clock "Interrupt" */
                ipi_timer_latch[dest_copy] = 0;
 #ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG