Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394...

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6:
  firewire: state userland requirements in Kconfig help
  firewire: avoid memleak after phy config transmit failure
  firewire: fw-ohci: TSB43AB22/A dualbuffer workaround
  firewire: queue the right number of data
  firewire: warn on unfinished transactions during card removal
  firewire: small fw_fill_request cleanup
  firewire: fully initialize fw_transaction before marking it pending
  firewire: fix race of bus reset with request transmission

diff --combined drivers/firewire/fw-ohci.c
index 566672e,a4eff32..251416f
--- 1/drivers/firewire/fw-ohci.c
--- 2/drivers/firewire/fw-ohci.c
+++ b/drivers/firewire/fw-ohci.c
@@@ -171,7 -171,6 +171,6 @@@ struct iso_context 
  struct fw_ohci {
        struct fw_card card;
  
-       u32 version;
        __iomem char *registers;
        dma_addr_t self_id_bus;
        __le32 *self_id_cpu;
@@@ -180,6 -179,8 +179,8 @@@
        int generation;
        int request_generation; /* for timestamping incoming requests */
        u32 bus_seconds;
+ 
+       bool use_dualbuffer;
        bool old_uninorth;
        bool bus_reset_packet_quirk;
  
@@@ -953,7 -954,7 +954,7 @@@ at_context_queue_packet(struct context 
                payload_bus =
                        dma_map_single(ohci->card.device, packet->payload,
                                       packet->payload_length, DMA_TO_DEVICE);
 -              if (dma_mapping_error(payload_bus)) {
 +              if (dma_mapping_error(ohci->card.device, payload_bus)) {
                        packet->ack = RCODE_SEND_ERROR;
                        return -1;
                }
@@@ -1885,7 -1886,7 +1886,7 @@@ ohci_allocate_iso_context(struct fw_car
        } else {
                mask = &ohci->ir_context_mask;
                list = ohci->ir_context_list;
-               if (ohci->version >= OHCI_VERSION_1_1)
+               if (ohci->use_dualbuffer)
                        callback = handle_ir_dualbuffer_packet;
                else
                        callback = handle_ir_packet_per_buffer;
@@@ -1949,7 -1950,7 +1950,7 @@@ static int ohci_start_iso(struct fw_iso
        } else {
                index = ctx - ohci->ir_context_list;
                control = IR_CONTEXT_ISOCH_HEADER;
-               if (ohci->version >= OHCI_VERSION_1_1)
+               if (ohci->use_dualbuffer)
                        control |= IR_CONTEXT_DUAL_BUFFER_MODE;
                match = (tags << 28) | (sync << 8) | ctx->base.channel;
                if (cycle >= 0) {
@@@ -2279,7 -2280,7 +2280,7 @@@ ohci_queue_iso(struct fw_iso_context *b
        spin_lock_irqsave(&ctx->context.ohci->lock, flags);
        if (base->type == FW_ISO_CONTEXT_TRANSMIT)
                retval = ohci_queue_iso_transmit(base, packet, buffer, payload);
-       else if (ctx->context.ohci->version >= OHCI_VERSION_1_1)
+       else if (ctx->context.ohci->use_dualbuffer)
                retval = ohci_queue_iso_receive_dualbuffer(base, packet,
                                                         buffer, payload);
        else
@@@ -2341,7 -2342,7 +2342,7 @@@ static int __devini
  pci_probe(struct pci_dev *dev, const struct pci_device_id *ent)
  {
        struct fw_ohci *ohci;
-       u32 bus_options, max_receive, link_speed;
+       u32 bus_options, max_receive, link_speed, version;
        u64 guid;
        int err;
        size_t size;
@@@ -2366,12 -2367,6 +2367,6 @@@
        pci_write_config_dword(dev, OHCI1394_PCI_HCI_Control, 0);
        pci_set_drvdata(dev, ohci);
  
- #if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)
-       ohci->old_uninorth = dev->vendor == PCI_VENDOR_ID_APPLE &&
-                            dev->device == PCI_DEVICE_ID_APPLE_UNI_N_FW;
- #endif
-       ohci->bus_reset_packet_quirk = dev->vendor == PCI_VENDOR_ID_TI;
- 
        spin_lock_init(&ohci->lock);
  
        tasklet_init(&ohci->bus_reset_tasklet,
@@@ -2390,6 -2385,23 +2385,23 @@@
                goto fail_iomem;
        }
  
+       version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff;
+       ohci->use_dualbuffer = version >= OHCI_VERSION_1_1;
+ 
+ /* x86-32 currently doesn't use highmem for dma_alloc_coherent */
+ #if !defined(CONFIG_X86_32)
+       /* dual-buffer mode is broken with descriptor addresses above 2G */
+       if (dev->vendor == PCI_VENDOR_ID_TI &&
+           dev->device == PCI_DEVICE_ID_TI_TSB43AB22)
+               ohci->use_dualbuffer = false;
+ #endif
+ 
+ #if defined(CONFIG_PPC_PMAC) && defined(CONFIG_PPC32)
+       ohci->old_uninorth = dev->vendor == PCI_VENDOR_ID_APPLE &&
+                            dev->device == PCI_DEVICE_ID_APPLE_UNI_N_FW;
+ #endif
+       ohci->bus_reset_packet_quirk = dev->vendor == PCI_VENDOR_ID_TI;
+ 
        ar_context_init(&ohci->ar_request_ctx, ohci,
                        OHCI1394_AsReqRcvContextControlSet);
  
@@@ -2441,9 -2453,8 +2453,8 @@@
        if (err < 0)
                goto fail_self_id;
  
-       ohci->version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff;
        fw_notify("Added fw-ohci device %s, OHCI version %x.%x\n",
-                 dev->dev.bus_id, ohci->version >> 16, ohci->version & 0xff);
+                 dev->dev.bus_id, version >> 16, version & 0xff);
        return 0;
  
   fail_self_id:

diff --combined include/linux/pci_ids.h
index ffe479b,720d675..35a7841
--- 1/include/linux/pci_ids.h
--- 2/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@@ -748,6 -748,7 +748,7 @@@
  #define PCI_VENDOR_ID_TI              0x104c
  #define PCI_DEVICE_ID_TI_TVP4020      0x3d07
  #define PCI_DEVICE_ID_TI_4450         0x8011
+ #define PCI_DEVICE_ID_TI_TSB43AB22    0x8023
  #define PCI_DEVICE_ID_TI_XX21_XX11    0x8031
  #define PCI_DEVICE_ID_TI_XX21_XX11_FM 0x8033
  #define PCI_DEVICE_ID_TI_XX21_XX11_SD 0x8034
@@@ -1832,13 -1833,7 +1833,13 @@@
  #define PCI_DEVICE_ID_MOXA_C320               0x3200
  
  #define PCI_VENDOR_ID_CCD             0x1397
 +#define PCI_DEVICE_ID_CCD_HFC4S               0x08B4
 +#define PCI_SUBDEVICE_ID_CCD_PMX2S    0x1234
 +#define PCI_DEVICE_ID_CCD_HFC8S               0x16B8
  #define PCI_DEVICE_ID_CCD_2BD0                0x2bd0
 +#define PCI_DEVICE_ID_CCD_HFCE1               0x30B1
 +#define PCI_SUBDEVICE_ID_CCD_SPD4S    0x3136
 +#define PCI_SUBDEVICE_ID_CCD_SPDE1    0x3137
  #define PCI_DEVICE_ID_CCD_B000                0xb000
  #define PCI_DEVICE_ID_CCD_B006                0xb006
  #define PCI_DEVICE_ID_CCD_B007                0xb007
@@@ -1848,32 -1843,8 +1849,32 @@@
  #define PCI_DEVICE_ID_CCD_B00B                0xb00b
  #define PCI_DEVICE_ID_CCD_B00C                0xb00c
  #define PCI_DEVICE_ID_CCD_B100                0xb100
 +#define PCI_SUBDEVICE_ID_CCD_IOB4ST   0xB520
 +#define PCI_SUBDEVICE_ID_CCD_IOB8STR  0xB521
 +#define PCI_SUBDEVICE_ID_CCD_IOB8ST   0xB522
 +#define PCI_SUBDEVICE_ID_CCD_IOB1E1   0xB523
 +#define PCI_SUBDEVICE_ID_CCD_SWYX4S   0xB540
 +#define PCI_SUBDEVICE_ID_CCD_JH4S20   0xB550
 +#define PCI_SUBDEVICE_ID_CCD_IOB8ST_1 0xB552
 +#define PCI_SUBDEVICE_ID_CCD_BN4S     0xB560
 +#define PCI_SUBDEVICE_ID_CCD_BN8S     0xB562
 +#define PCI_SUBDEVICE_ID_CCD_BNE1     0xB563
 +#define PCI_SUBDEVICE_ID_CCD_BNE1D    0xB564
 +#define PCI_SUBDEVICE_ID_CCD_BNE1DP   0xB565
 +#define PCI_SUBDEVICE_ID_CCD_BN2S     0xB566
 +#define PCI_SUBDEVICE_ID_CCD_BN1SM    0xB567
 +#define PCI_SUBDEVICE_ID_CCD_BN4SM    0xB568
 +#define PCI_SUBDEVICE_ID_CCD_BN2SM    0xB569
 +#define PCI_SUBDEVICE_ID_CCD_BNE1M    0xB56A
 +#define PCI_SUBDEVICE_ID_CCD_BN8SP    0xB56B
 +#define PCI_SUBDEVICE_ID_CCD_HFC4S    0xB620
 +#define PCI_SUBDEVICE_ID_CCD_HFC8S    0xB622
  #define PCI_DEVICE_ID_CCD_B700                0xb700
  #define PCI_DEVICE_ID_CCD_B701                0xb701
 +#define PCI_SUBDEVICE_ID_CCD_HFCE1    0xC523
 +#define PCI_SUBDEVICE_ID_CCD_OV2S     0xE884
 +#define PCI_SUBDEVICE_ID_CCD_OV4S     0xE888
 +#define PCI_SUBDEVICE_ID_CCD_OV8S     0xE998
  
  #define PCI_VENDOR_ID_EXAR            0x13a8
  #define PCI_DEVICE_ID_EXAR_XR17C152   0x0152
@@@ -1980,8 -1951,6 +1981,8 @@@
  #define PCI_DEVICE_ID_NX2_5708                0x164c
  #define PCI_DEVICE_ID_TIGON3_5702FE   0x164d
  #define PCI_DEVICE_ID_NX2_57710               0x164e
 +#define PCI_DEVICE_ID_NX2_57711               0x164f
 +#define PCI_DEVICE_ID_NX2_57711E      0x1650
  #define PCI_DEVICE_ID_TIGON3_5705     0x1653
  #define PCI_DEVICE_ID_TIGON3_5705_2   0x1654
  #define PCI_DEVICE_ID_TIGON3_5720     0x1658
@@@ -2014,7 -1983,6 +2015,7 @@@
  #define PCI_DEVICE_ID_TIGON3_5787M    0x1693
  #define PCI_DEVICE_ID_TIGON3_5782     0x1696
  #define PCI_DEVICE_ID_TIGON3_5784     0x1698
 +#define PCI_DEVICE_ID_TIGON3_5785     0x1699
  #define PCI_DEVICE_ID_TIGON3_5786     0x169a
  #define PCI_DEVICE_ID_TIGON3_5787     0x169b
  #define PCI_DEVICE_ID_TIGON3_5788     0x169c
@@@ -2204,8 -2172,6 +2205,8 @@@
  #define PCI_DEVICE_ID_MPC8544         0x0033
  #define PCI_DEVICE_ID_MPC8572E                0x0040
  #define PCI_DEVICE_ID_MPC8572         0x0041
 +#define PCI_DEVICE_ID_MPC8536E                0x0050
 +#define PCI_DEVICE_ID_MPC8536         0x0051
  #define PCI_DEVICE_ID_MPC8641         0x7010
  #define PCI_DEVICE_ID_MPC8641D                0x7011
  #define PCI_DEVICE_ID_MPC8610         0x7018
@@@ -2223,7 -2189,6 +2224,7 @@@
  #define PCI_DEVICE_ID_JMICRON_JMB366  0x2366
  #define PCI_DEVICE_ID_JMICRON_JMB368  0x2368
  #define PCI_DEVICE_ID_JMICRON_JMB38X_SD       0x2381
 +#define PCI_DEVICE_ID_JMICRON_JMB38X_MMC 0x2382
  #define PCI_DEVICE_ID_JMICRON_JMB38X_MS       0x2383
  
  #define PCI_VENDOR_ID_KORENIX         0x1982
@@@ -2401,14 -2366,6 +2402,14 @@@
  #define PCI_DEVICE_ID_INTEL_ICH9_7    0x2916
  #define PCI_DEVICE_ID_INTEL_ICH9_8    0x2918
  #define PCI_DEVICE_ID_INTEL_82855PM_HB        0x3340
 +#define PCI_DEVICE_ID_INTEL_IOAT_TBG4 0x3429
 +#define PCI_DEVICE_ID_INTEL_IOAT_TBG5 0x342a
 +#define PCI_DEVICE_ID_INTEL_IOAT_TBG6 0x342b
 +#define PCI_DEVICE_ID_INTEL_IOAT_TBG7 0x342c
 +#define PCI_DEVICE_ID_INTEL_IOAT_TBG0 0x3430
 +#define PCI_DEVICE_ID_INTEL_IOAT_TBG1 0x3431
 +#define PCI_DEVICE_ID_INTEL_IOAT_TBG2 0x3432
 +#define PCI_DEVICE_ID_INTEL_IOAT_TBG3 0x3433
  #define PCI_DEVICE_ID_INTEL_82830_HB  0x3575
  #define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
  #define PCI_DEVICE_ID_INTEL_82855GM_HB        0x3580
@@@ -2430,9 -2387,6 +2431,9 @@@
  #define PCI_DEVICE_ID_INTEL_ICH10_4   0x3a30
  #define PCI_DEVICE_ID_INTEL_ICH10_5   0x3a60
  #define PCI_DEVICE_ID_INTEL_IOAT_SNB  0x402f
 +#define PCI_DEVICE_ID_INTEL_5100_16   0x65f0
 +#define PCI_DEVICE_ID_INTEL_5100_21   0x65f5
 +#define PCI_DEVICE_ID_INTEL_5100_22   0x65f6
  #define PCI_DEVICE_ID_INTEL_5400_ERR  0x4030
  #define PCI_DEVICE_ID_INTEL_5400_FBD0 0x4035
  #define PCI_DEVICE_ID_INTEL_5400_FBD1 0x4036
@@@ -2553,9 -2507,6 +2554,9 @@@
  
  #define PCI_VENDOR_ID_3COM_2          0xa727
  
 +#define PCI_VENDOR_ID_DIGIUM          0xd161
 +#define PCI_DEVICE_ID_DIGIUM_HFC4S    0xb410
 +
  #define PCI_SUBVENDOR_ID_EXSYS                0xd84d
  #define PCI_SUBDEVICE_ID_EXSYS_4014   0x4014
  #define PCI_SUBDEVICE_ID_EXSYS_4055   0x4055