Merge branch 'for_3.2/pm-cleanup-2' of git://github.com/khilman/linux-omap-pm into...

diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index d27daf9..7f47092 100644 (file)
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -187,8 +187,11 @@ static void __init omap3_check_features(void)
        OMAP3_CHECK_FEATURE(status, ISP);
        if (cpu_is_omap3630())
                omap_features |= OMAP3_HAS_192MHZ_CLK;
-       if (!cpu_is_omap3505() && !cpu_is_omap3517())
+       if (cpu_is_omap3430() || cpu_is_omap3630())
                omap_features |= OMAP3_HAS_IO_WAKEUP;
+       if (cpu_is_omap3630() || omap_rev() == OMAP3430_REV_ES3_1 ||
+           omap_rev() == OMAP3430_REV_ES3_1_2)
+               omap_features |= OMAP3_HAS_IO_CHAIN_CTRL;
 
        omap_features |= OMAP3_HAS_SDRC;
 

diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c8cbd00..efa6649 100644 (file)
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -99,31 +99,27 @@ static void omap3_enable_io_chain(void)
 {
        int timeout = 0;
 
-       if (omap_rev() >= OMAP3430_REV_ES3_1) {
-               omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
-                                    PM_WKEN);
-               /* Do a readback to assure write has been done */
-               omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
-
-               while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) &
-                        OMAP3430_ST_IO_CHAIN_MASK)) {
-                       timeout++;
-                       if (timeout > 1000) {
-                               printk(KERN_ERR "Wake up daisy chain "
-                                      "activation failed.\n");
-                               return;
-                       }
-                       omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,
-                                            WKUP_MOD, PM_WKEN);
+       omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
+                                  PM_WKEN);
+       /* Do a readback to assure write has been done */
+       omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
+
+       while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) &
+                OMAP3430_ST_IO_CHAIN_MASK)) {
+               timeout++;
+               if (timeout > 1000) {
+                       pr_err("Wake up daisy chain activation failed.\n");
+                       return;
                }
+               omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,
+                                          WKUP_MOD, PM_WKEN);
        }
 }
 
 static void omap3_disable_io_chain(void)
 {
-       if (omap_rev() >= OMAP3430_REV_ES3_1)
-               omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
-                                      PM_WKEN);
+       omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
+                                    PM_WKEN);
 }
 
 static void omap3_core_save_context(void)
@@ -363,7 +359,6 @@ void omap_sram_idle(void)
                printk(KERN_ERR "Invalid mpu state in sram_idle\n");
                return;
        }
-       pwrdm_pre_transition();
 
        /* NEON control */
        if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON)
@@ -376,7 +371,8 @@ void omap_sram_idle(void)
            (per_next_state < PWRDM_POWER_ON ||
             core_next_state < PWRDM_POWER_ON)) {
                omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
-               omap3_enable_io_chain();
+               if (omap3_has_io_chain_ctrl())
+                       omap3_enable_io_chain();
        }
 
        /* Block console output in case it is on one of the OMAP UARTs */
@@ -386,6 +382,8 @@ void omap_sram_idle(void)
                        if (!console_trylock())
                                goto console_still_active;
 
+       pwrdm_pre_transition();
+
        /* PER */
        if (per_next_state < PWRDM_POWER_ON) {
                per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
@@ -409,13 +407,14 @@ void omap_sram_idle(void)
        omap3_intc_prepare_idle();
 
        /*
-       * On EMU/HS devices ROM code restores a SRDC value
-       * from scratchpad which has automatic self refresh on timeout
-       * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
-       * Hence store/restore the SDRC_POWER register here.
-       */
-       if (omap_rev() >= OMAP3430_REV_ES3_0 &&
-           omap_type() != OMAP2_DEVICE_TYPE_GP &&
+        * On EMU/HS devices ROM code restores a SRDC value
+        * from scratchpad which has automatic self refresh on timeout
+        * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
+        * Hence store/restore the SDRC_POWER register here.
+        */
+       if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
+           (omap_type() == OMAP2_DEVICE_TYPE_EMU ||
+            omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
            core_next_state == PWRDM_POWER_OFF)
                sdrc_pwr = sdrc_read_reg(SDRC_POWER);
 
@@ -432,8 +431,9 @@ void omap_sram_idle(void)
                omap34xx_do_sram_idle(save_state);
 
        /* Restore normal SDRC POWER settings */
-       if (omap_rev() >= OMAP3430_REV_ES3_0 &&
-           omap_type() != OMAP2_DEVICE_TYPE_GP &&
+       if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
+           (omap_type() == OMAP2_DEVICE_TYPE_EMU ||
+            omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
            core_next_state == PWRDM_POWER_OFF)
                sdrc_write_reg(sdrc_pwr, SDRC_POWER);
 
@@ -455,6 +455,8 @@ void omap_sram_idle(void)
        }
        omap3_intc_resume_idle();
 
+       pwrdm_post_transition();
+
        /* PER */
        if (per_next_state < PWRDM_POWER_ON) {
                per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
@@ -475,11 +477,10 @@ console_still_active:
             core_next_state < PWRDM_POWER_ON)) {
                omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
                                             PM_WKEN);
-               omap3_disable_io_chain();
+               if (omap3_has_io_chain_ctrl())
+                       omap3_disable_io_chain();
        }
 
-       pwrdm_post_transition();
-
        clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
 }
 
@@ -870,6 +871,9 @@ static int __init omap3_pm_init(void)
        if (!cpu_is_omap34xx())
                return -ENODEV;
 
+       if (!omap3_has_io_chain_ctrl())
+               pr_warning("PM: no software I/O chain control; some wakeups may be lost\n");
+
        pm_errata_configure();
 
        /* XXX prcm_setup_regs needs to be before enabling hw

diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 2f90269..408a12f 100644 (file)
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -399,6 +399,13 @@ void omap2_check_revision(void);
 
 /*
  * Runtime detection of OMAP3 features
+ *
+ * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
+ *    family have OS-level control over the I/O chain clock.  This is
+ *    to avoid a window during which wakeups could potentially be lost
+ *    during powerdomain transitions.  If this bit is set, it
+ *    indicates that the chip does support OS-level control of this
+ *    feature.
  */
 extern u32 omap_features;
 
@@ -410,9 +417,10 @@ extern u32 omap_features;
 #define OMAP3_HAS_192MHZ_CLK           BIT(5)
 #define OMAP3_HAS_IO_WAKEUP            BIT(6)
 #define OMAP3_HAS_SDRC                 BIT(7)
-#define OMAP4_HAS_MPU_1GHZ             BIT(8)
-#define OMAP4_HAS_MPU_1_2GHZ           BIT(9)
-#define OMAP4_HAS_MPU_1_5GHZ           BIT(10)
+#define OMAP3_HAS_IO_CHAIN_CTRL                BIT(8)
+#define OMAP4_HAS_MPU_1GHZ             BIT(9)
+#define OMAP4_HAS_MPU_1_2GHZ           BIT(10)
+#define OMAP4_HAS_MPU_1_5GHZ           BIT(11)
 
 
 #define OMAP3_HAS_FEATURE(feat,flag)                   \
@@ -429,12 +437,11 @@ OMAP3_HAS_FEATURE(isp, ISP)
 OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
 OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
 OMAP3_HAS_FEATURE(sdrc, SDRC)
+OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
 
 /*
  * Runtime detection of OMAP4 features
  */
-extern u32 omap_features;
-
 #define OMAP4_HAS_FEATURE(feat, flag)                  \
 static inline unsigned int omap4_has_ ##feat(void)     \
 {                                                      \