[ARM] 3865/1: AT91RM9200 header updates

This is more preparation for adding support for the new Atmel AT91SAM9
processors.

Changes include:
- Replace AT91_BASE_* with AT91RM9200_BASE_*
- Replace AT91_ID_* with AT91RM9200_ID_*
- ROM, SRAM and UHP address definitions moved to at91rm9200.h.
- The raw AT91_P[ABCD]_* definitions are now depreciated in favour of
the GPIO API.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91rm9200/at91rm9200.c
index 0985b1c..e21cb84 100644 (file)
--- a/arch/arm/mach-at91rm9200/at91rm9200.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200.c
@@ -26,78 +26,78 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_SPI,
-               .pfn            = __phys_to_pfn(AT91_BASE_SPI),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_SPI),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_SSC2,
-               .pfn            = __phys_to_pfn(AT91_BASE_SSC2),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_SSC2),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_SSC1,
-               .pfn            = __phys_to_pfn(AT91_BASE_SSC1),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_SSC1),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_SSC0,
-               .pfn            = __phys_to_pfn(AT91_BASE_SSC0),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_SSC0),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_US3,
-               .pfn            = __phys_to_pfn(AT91_BASE_US3),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_US3),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_US2,
-               .pfn            = __phys_to_pfn(AT91_BASE_US2),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_US2),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_US1,
-               .pfn            = __phys_to_pfn(AT91_BASE_US1),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_US1),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_US0,
-               .pfn            = __phys_to_pfn(AT91_BASE_US0),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_US0),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_EMAC,
-               .pfn            = __phys_to_pfn(AT91_BASE_EMAC),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_EMAC),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_TWI,
-               .pfn            = __phys_to_pfn(AT91_BASE_TWI),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_TWI),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_MCI,
-               .pfn            = __phys_to_pfn(AT91_BASE_MCI),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_MCI),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_UDP,
-               .pfn            = __phys_to_pfn(AT91_BASE_UDP),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_UDP),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_TCB1,
-               .pfn            = __phys_to_pfn(AT91_BASE_TCB1),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_TCB1),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_VA_BASE_TCB0,
-               .pfn            = __phys_to_pfn(AT91_BASE_TCB0),
+               .pfn            = __phys_to_pfn(AT91RM9200_BASE_TCB0),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
        }, {
                .virtual        = AT91_SRAM_VIRT_BASE,
-               .pfn            = __phys_to_pfn(AT91_SRAM_BASE),
-               .length         = AT91_SRAM_SIZE,
+               .pfn            = __phys_to_pfn(AT91RM9200_SRAM_BASE),
+               .length         = AT91RM9200_SRAM_SIZE,
                .type           = MT_DEVICE,
        },
 };

diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c
index edc2cc8..5b78922 100644 (file)
--- a/arch/arm/mach-at91rm9200/clock.c
+++ b/arch/arm/mach-at91rm9200/clock.c
@@ -190,85 +190,85 @@ static void pmc_periph_mode(struct clk *clk, int is_on)
 static struct clk udc_clk = {
        .name           = "udc_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_UDP,
+       .pmc_mask       = 1 << AT91RM9200_ID_UDP,
        .mode           = pmc_periph_mode,
 };
 static struct clk ohci_clk = {
        .name           = "ohci_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_UHP,
+       .pmc_mask       = 1 << AT91RM9200_ID_UHP,
        .mode           = pmc_periph_mode,
 };
 static struct clk ether_clk = {
        .name           = "ether_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_EMAC,
+       .pmc_mask       = 1 << AT91RM9200_ID_EMAC,
        .mode           = pmc_periph_mode,
 };
 static struct clk mmc_clk = {
        .name           = "mci_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_MCI,
+       .pmc_mask       = 1 << AT91RM9200_ID_MCI,
        .mode           = pmc_periph_mode,
 };
 static struct clk twi_clk = {
        .name           = "twi_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_TWI,
+       .pmc_mask       = 1 << AT91RM9200_ID_TWI,
        .mode           = pmc_periph_mode,
 };
 static struct clk usart0_clk = {
        .name           = "usart0_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_US0,
+       .pmc_mask       = 1 << AT91RM9200_ID_US0,
        .mode           = pmc_periph_mode,
 };
 static struct clk usart1_clk = {
        .name           = "usart1_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_US1,
+       .pmc_mask       = 1 << AT91RM9200_ID_US1,
        .mode           = pmc_periph_mode,
 };
 static struct clk usart2_clk = {
        .name           = "usart2_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_US2,
+       .pmc_mask       = 1 << AT91RM9200_ID_US2,
        .mode           = pmc_periph_mode,
 };
 static struct clk usart3_clk = {
        .name           = "usart3_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_US3,
+       .pmc_mask       = 1 << AT91RM9200_ID_US3,
        .mode           = pmc_periph_mode,
 };
 static struct clk spi_clk = {
        .name           = "spi0_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_SPI,
+       .pmc_mask       = 1 << AT91RM9200_ID_SPI,
        .mode           = pmc_periph_mode,
 };
 static struct clk pioA_clk = {
        .name           = "pioA_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_PIOA,
+       .pmc_mask       = 1 << AT91RM9200_ID_PIOA,
        .mode           = pmc_periph_mode,
 };
 static struct clk pioB_clk = {
        .name           = "pioB_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_PIOB,
+       .pmc_mask       = 1 << AT91RM9200_ID_PIOB,
        .mode           = pmc_periph_mode,
 };
 static struct clk pioC_clk = {
        .name           = "pioC_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_PIOC,
+       .pmc_mask       = 1 << AT91RM9200_ID_PIOC,
        .mode           = pmc_periph_mode,
 };
 static struct clk pioD_clk = {
        .name           = "pioD_clk",
        .parent         = &mck,
-       .pmc_mask       = 1 << AT91_ID_PIOD,
+       .pmc_mask       = 1 << AT91RM9200_ID_PIOD,
        .mode           = pmc_periph_mode,
 };
 

diff --git a/arch/arm/mach-at91rm9200/devices.c b/arch/arm/mach-at91rm9200/devices.c
index 4352acb..db7c684 100644 (file)
--- a/arch/arm/mach-at91rm9200/devices.c
+++ b/arch/arm/mach-at91rm9200/devices.c
@@ -35,13 +35,13 @@ static struct at91_usbh_data usbh_data;
 
 static struct resource at91_usbh_resources[] = {
        [0] = {
-               .start  = AT91_UHP_BASE,
-               .end    = AT91_UHP_BASE + SZ_1M - 1,
+               .start  = AT91RM9200_UHP_BASE,
+               .end    = AT91RM9200_UHP_BASE + SZ_1M - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = AT91_ID_UHP,
-               .end    = AT91_ID_UHP,
+               .start  = AT91RM9200_ID_UHP,
+               .end    = AT91RM9200_ID_UHP,
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -80,13 +80,13 @@ static struct at91_udc_data udc_data;
 
 static struct resource at91_udc_resources[] = {
        [0] = {
-               .start  = AT91_BASE_UDP,
-               .end    = AT91_BASE_UDP + SZ_16K - 1,
+               .start  = AT91RM9200_BASE_UDP,
+               .end    = AT91RM9200_BASE_UDP + SZ_16K - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = AT91_ID_UDP,
-               .end    = AT91_ID_UDP,
+               .start  = AT91RM9200_ID_UDP,
+               .end    = AT91RM9200_ID_UDP,
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -131,13 +131,13 @@ static struct at91_eth_data eth_data;
 
 static struct resource at91_eth_resources[] = {
        [0] = {
-               .start  = AT91_BASE_EMAC,
-               .end    = AT91_BASE_EMAC + SZ_16K - 1,
+               .start  = AT91RM9200_BASE_EMAC,
+               .end    = AT91RM9200_BASE_EMAC + SZ_16K - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = AT91_ID_EMAC,
-               .end    = AT91_ID_EMAC,
+               .start  = AT91RM9200_ID_EMAC,
+               .end    = AT91RM9200_ID_EMAC,
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -263,13 +263,13 @@ static struct at91_mmc_data mmc_data;
 
 static struct resource at91_mmc_resources[] = {
        [0] = {
-               .start  = AT91_BASE_MCI,
-               .end    = AT91_BASE_MCI + SZ_16K - 1,
+               .start  = AT91RM9200_BASE_MCI,
+               .end    = AT91RM9200_BASE_MCI + SZ_16K - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = AT91_ID_MCI,
-               .end    = AT91_ID_MCI,
+               .start  = AT91RM9200_ID_MCI,
+               .end    = AT91RM9200_ID_MCI,
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -423,13 +423,13 @@ static u64 spi_dmamask = 0xffffffffUL;
 
 static struct resource at91_spi_resources[] = {
        [0] = {
-               .start  = AT91_BASE_SPI,
-               .end    = AT91_BASE_SPI + SZ_16K - 1,
+               .start  = AT91RM9200_BASE_SPI,
+               .end    = AT91RM9200_BASE_SPI + SZ_16K - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = AT91_ID_SPI,
-               .end    = AT91_ID_SPI,
+               .start  = AT91RM9200_ID_SPI,
+               .end    = AT91RM9200_ID_SPI,
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -582,13 +582,13 @@ static inline void configure_dbgu_pins(void)
 
 static struct resource uart0_resources[] = {
        [0] = {
-               .start  = AT91_BASE_US0,
-               .end    = AT91_BASE_US0 + SZ_16K - 1,
+               .start  = AT91RM9200_BASE_US0,
+               .end    = AT91RM9200_BASE_US0 + SZ_16K - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = AT91_ID_US0,
-               .end    = AT91_ID_US0,
+               .start  = AT91RM9200_ID_US0,
+               .end    = AT91RM9200_ID_US0,
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -624,13 +624,13 @@ static inline void configure_usart0_pins(void)
 
 static struct resource uart1_resources[] = {
        [0] = {
-               .start  = AT91_BASE_US1,
-               .end    = AT91_BASE_US1 + SZ_16K - 1,
+               .start  = AT91RM9200_BASE_US1,
+               .end    = AT91RM9200_BASE_US1 + SZ_16K - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = AT91_ID_US1,
-               .end    = AT91_ID_US1,
+               .start  = AT91RM9200_ID_US1,
+               .end    = AT91RM9200_ID_US1,
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -665,13 +665,13 @@ static inline void configure_usart1_pins(void)
 
 static struct resource uart2_resources[] = {
        [0] = {
-               .start  = AT91_BASE_US2,
-               .end    = AT91_BASE_US2 + SZ_16K - 1,
+               .start  = AT91RM9200_BASE_US2,
+               .end    = AT91RM9200_BASE_US2 + SZ_16K - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = AT91_ID_US2,
-               .end    = AT91_ID_US2,
+               .start  = AT91RM9200_ID_US2,
+               .end    = AT91RM9200_ID_US2,
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -700,13 +700,13 @@ static inline void configure_usart2_pins(void)
 
 static struct resource uart3_resources[] = {
        [0] = {
-               .start  = AT91_BASE_US3,
-               .end    = AT91_BASE_US3 + SZ_16K - 1,
+               .start  = AT91RM9200_BASE_US3,
+               .end    = AT91RM9200_BASE_US3 + SZ_16K - 1,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-               .start  = AT91_ID_US3,
-               .end    = AT91_ID_US3,
+               .start  = AT91RM9200_ID_US3,
+               .end    = AT91RM9200_ID_US3,
                .flags  = IORESOURCE_IRQ,
        },
 };

diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index cec199f..8476cb8 100644 (file)
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -261,10 +261,10 @@ void at91_gpio_suspend(void)
                at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]);
 
                if (!wakeups[i]) {
-                       disable_irq_wake(AT91_ID_PIOA + i);
-                       at91_sys_write(AT91_PMC_PCDR, 1 << (AT91_ID_PIOA + i));
+                       disable_irq_wake(AT91RM9200_ID_PIOA + i);
+                       at91_sys_write(AT91_PMC_PCDR, 1 << (AT91RM9200_ID_PIOA + i));
                } else {
-                       enable_irq_wake(AT91_ID_PIOA + i);
+                       enable_irq_wake(AT91RM9200_ID_PIOA + i);
 #ifdef CONFIG_PM_DEBUG
                        printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]);
 #endif
@@ -282,10 +282,10 @@ void at91_gpio_resume(void)
        }
 
        at91_sys_write(AT91_PMC_PCER,
-                         (1 << AT91_ID_PIOA)
-                       | (1 << AT91_ID_PIOB)
-                       | (1 << AT91_ID_PIOC)
-                       | (1 << AT91_ID_PIOD));
+                         (1 << AT91RM9200_ID_PIOA)
+                       | (1 << AT91RM9200_ID_PIOB)
+                       | (1 << AT91RM9200_ID_PIOC)
+                       | (1 << AT91RM9200_ID_PIOD));
 }
 
 #else
@@ -384,7 +384,7 @@ void __init at91_gpio_irq_setup(unsigned banks)
 
        if (banks > 4)
                banks = 4;
-       for (pioc = 0, pin = PIN_BASE, id = AT91_ID_PIOA;
+       for (pioc = 0, pin = PIN_BASE, id = AT91RM9200_ID_PIOA;
                        pioc < banks;
                        pioc++, id++) {
                void __iomem    *controller;

diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c
index c3a5e77..8cd60a9 100644 (file)
--- a/arch/arm/mach-at91rm9200/irq.c
+++ b/arch/arm/mach-at91rm9200/irq.c
@@ -61,12 +61,12 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
                srctype = AT91_AIC_SRCTYPE_RISING;
                break;
        case IRQT_LOW:
-               if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0))        /* only supported on external interrupts */
+               if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0))  /* only supported on external interrupts */
                        return -EINVAL;
                srctype = AT91_AIC_SRCTYPE_LOW;
                break;
        case IRQT_FALLING:
-               if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0))        /* only supported on external interrupts */
+               if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0))  /* only supported on external interrupts */
                        return -EINVAL;
                srctype = AT91_AIC_SRCTYPE_FALLING;
                break;

diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c
index 47e5480..32c95d8 100644 (file)
--- a/arch/arm/mach-at91rm9200/pm.c
+++ b/arch/arm/mach-at91rm9200/pm.c
@@ -123,13 +123,13 @@ static int at91_pm_enter(suspend_state_t state)
                        (at91_sys_read(AT91_PMC_PCSR)
                                        | (1 << AT91_ID_FIQ)
                                        | (1 << AT91_ID_SYS)
-                                       | (1 << AT91_ID_IRQ0)
-                                       | (1 << AT91_ID_IRQ1)
-                                       | (1 << AT91_ID_IRQ2)
-                                       | (1 << AT91_ID_IRQ3)
-                                       | (1 << AT91_ID_IRQ4)
-                                       | (1 << AT91_ID_IRQ5)
-                                       | (1 << AT91_ID_IRQ6))
+                                       | (1 << AT91RM9200_ID_IRQ0)
+                                       | (1 << AT91RM9200_ID_IRQ1)
+                                       | (1 << AT91RM9200_ID_IRQ2)
+                                       | (1 << AT91RM9200_ID_IRQ3)
+                                       | (1 << AT91RM9200_ID_IRQ4)
+                                       | (1 << AT91RM9200_ID_IRQ5)
+                                       | (1 << AT91RM9200_ID_IRQ6))
                                & at91_sys_read(AT91_AIC_IMR),
                        state);
 

diff --git a/drivers/mmc/at91_mci.c b/drivers/mmc/at91_mci.c
index 6b7638b..4b3d4d6 100644 (file)
--- a/drivers/mmc/at91_mci.c
+++ b/drivers/mmc/at91_mci.c
@@ -850,7 +850,7 @@ static int at91_mci_probe(struct platform_device *pdev)
        /*
         * Allocate the MCI interrupt
         */
-       ret = request_irq(AT91_ID_MCI, at91_mci_irq, IRQF_SHARED, DRIVER_NAME, host);
+       ret = request_irq(AT91RM9200_ID_MCI, at91_mci_irq, IRQF_SHARED, DRIVER_NAME, host);
        if (ret) {
                printk(KERN_ERR "Failed to request MCI interrupt\n");
                clk_disable(mci_clk);
@@ -906,7 +906,7 @@ static int at91_mci_remove(struct platform_device *pdev)
 
        mmc_remove_host(mmc);
        at91_mci_disable();
-       free_irq(AT91_ID_MCI, host);
+       free_irq(AT91RM9200_ID_MCI, host);
        mmc_free_host(mmc);
 
        clk_disable(mci_clk);                           /* Disable the peripheral clock */

diff --git a/drivers/net/arm/at91_ether.c b/drivers/net/arm/at91_ether.c
index 95b28aa..3ecf2cc 100644 (file)
--- a/drivers/net/arm/at91_ether.c
+++ b/drivers/net/arm/at91_ether.c
@@ -947,7 +947,7 @@ static int __init at91ether_setup(unsigned long phy_type, unsigned short phy_add
                return -ENOMEM;
 
        dev->base_addr = AT91_VA_BASE_EMAC;
-       dev->irq = AT91_ID_EMAC;
+       dev->irq = AT91RM9200_ID_EMAC;
        SET_MODULE_OWNER(dev);
 
        /* Install the interrupt handler */

diff --git a/drivers/serial/at91_serial.c b/drivers/serial/at91_serial.c
index 54c6b2a..bf4bf10 100644 (file)
--- a/drivers/serial/at91_serial.c
+++ b/drivers/serial/at91_serial.c
@@ -139,7 +139,7 @@ static void at91_set_mctrl(struct uart_port *port, u_int mctrl)
                 * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
                 *  We need to drive the pin manually.
                 */
-               if (port->mapbase == AT91_BASE_US0) {
+               if (port->mapbase == AT91RM9200_BASE_US0) {
                        if (mctrl & TIOCM_RTS)
                                at91_set_gpio_value(AT91_PIN_PA21, 0);
                        else

diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index cfebca0..043744f 100644 (file)
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1658,7 +1658,7 @@ static int __devinit at91udc_probe(struct platform_device *pdev)
                return -ENODEV;
        }
 
-       if (!request_mem_region(AT91_BASE_UDP, SZ_16K, driver_name)) {
+       if (!request_mem_region(AT91RM9200_BASE_UDP, SZ_16K, driver_name)) {
                DBG("someone's using UDC memory\n");
                return -EBUSY;
        }
@@ -1720,7 +1720,7 @@ static int __devinit at91udc_probe(struct platform_device *pdev)
 fail1:
        device_unregister(&udc->gadget.dev);
 fail0:
-       release_mem_region(AT91_BASE_UDP, SZ_16K);
+       release_mem_region(AT91RM9200_BASE_UDP, SZ_16K);
        DBG("%s probe failed, %d\n", driver_name, retval);
        return retval;
 }
@@ -1742,7 +1742,7 @@ static int __devexit at91udc_remove(struct platform_device *pdev)
                free_irq(udc->board.vbus_pin, udc);
        free_irq(udc->udp_irq, udc);
        device_unregister(&udc->gadget.dev);
-       release_mem_region(AT91_BASE_UDP, SZ_16K);
+       release_mem_region(AT91RM9200_BASE_UDP, SZ_16K);
 
        clk_put(udc->iclk);
        clk_put(udc->fclk);

diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200.h b/include/asm-arm/arch-at91rm9200/at91rm9200.h
index 58f4093..a5a86b1 100644 (file)
--- a/include/asm-arm/arch-at91rm9200/at91rm9200.h
+++ b/include/asm-arm/arch-at91rm9200/at91rm9200.h
@@ -19,66 +19,79 @@
 /*
  * Peripheral identifiers/interrupts.
  */
-#define AT91_ID_FIQ    0       /* Advanced Interrupt Controller (FIQ) */
-#define AT91_ID_SYS    1       /* System Peripheral */
-#define AT91_ID_PIOA   2       /* Parallel IO Controller A */
-#define AT91_ID_PIOB   3       /* Parallel IO Controller B */
-#define AT91_ID_PIOC   4       /* Parallel IO Controller C */
-#define AT91_ID_PIOD   5       /* Parallel IO Controller D */
-#define AT91_ID_US0    6       /* USART 0 */
-#define AT91_ID_US1    7       /* USART 1 */
-#define AT91_ID_US2    8       /* USART 2 */
-#define AT91_ID_US3    9       /* USART 3 */
-#define AT91_ID_MCI    10      /* Multimedia Card Interface */
-#define AT91_ID_UDP    11      /* USB Device Port */
-#define AT91_ID_TWI    12      /* Two-Wire Interface */
-#define AT91_ID_SPI    13      /* Serial Peripheral Interface */
-#define AT91_ID_SSC0   14      /* Serial Synchronous Controller 0 */
-#define AT91_ID_SSC1   15      /* Serial Synchronous Controller 1 */
-#define AT91_ID_SSC2   16      /* Serial Synchronous Controller 2 */
-#define AT91_ID_TC0    17      /* Timer Counter 0 */
-#define AT91_ID_TC1    18      /* Timer Counter 1 */
-#define AT91_ID_TC2    19      /* Timer Counter 2 */
-#define AT91_ID_TC3    20      /* Timer Counter 3 */
-#define AT91_ID_TC4    21      /* Timer Counter 4 */
-#define AT91_ID_TC5    22      /* Timer Counter 5 */
-#define AT91_ID_UHP    23      /* USB Host port */
-#define AT91_ID_EMAC   24      /* Ethernet MAC */
-#define AT91_ID_IRQ0   25      /* Advanced Interrupt Controller (IRQ0) */
-#define AT91_ID_IRQ1   26      /* Advanced Interrupt Controller (IRQ1) */
-#define AT91_ID_IRQ2   27      /* Advanced Interrupt Controller (IRQ2) */
-#define AT91_ID_IRQ3   28      /* Advanced Interrupt Controller (IRQ3) */
-#define AT91_ID_IRQ4   29      /* Advanced Interrupt Controller (IRQ4) */
-#define AT91_ID_IRQ5   30      /* Advanced Interrupt Controller (IRQ5) */
-#define AT91_ID_IRQ6   31      /* Advanced Interrupt Controller (IRQ6) */
+#define AT91_ID_FIQ            0       /* Advanced Interrupt Controller (FIQ) */
+#define AT91_ID_SYS            1       /* System Peripheral */
+#define AT91RM9200_ID_PIOA     2       /* Parallel IO Controller A */
+#define AT91RM9200_ID_PIOB     3       /* Parallel IO Controller B */
+#define AT91RM9200_ID_PIOC     4       /* Parallel IO Controller C */
+#define AT91RM9200_ID_PIOD     5       /* Parallel IO Controller D */
+#define AT91RM9200_ID_US0      6       /* USART 0 */
+#define AT91RM9200_ID_US1      7       /* USART 1 */
+#define AT91RM9200_ID_US2      8       /* USART 2 */
+#define AT91RM9200_ID_US3      9       /* USART 3 */
+#define AT91RM9200_ID_MCI      10      /* Multimedia Card Interface */
+#define AT91RM9200_ID_UDP      11      /* USB Device Port */
+#define AT91RM9200_ID_TWI      12      /* Two-Wire Interface */
+#define AT91RM9200_ID_SPI      13      /* Serial Peripheral Interface */
+#define AT91RM9200_ID_SSC0     14      /* Serial Synchronous Controller 0 */
+#define AT91RM9200_ID_SSC1     15      /* Serial Synchronous Controller 1 */
+#define AT91RM9200_ID_SSC2     16      /* Serial Synchronous Controller 2 */
+#define AT91RM9200_ID_TC0      17      /* Timer Counter 0 */
+#define AT91RM9200_ID_TC1      18      /* Timer Counter 1 */
+#define AT91RM9200_ID_TC2      19      /* Timer Counter 2 */
+#define AT91RM9200_ID_TC3      20      /* Timer Counter 3 */
+#define AT91RM9200_ID_TC4      21      /* Timer Counter 4 */
+#define AT91RM9200_ID_TC5      22      /* Timer Counter 5 */
+#define AT91RM9200_ID_UHP      23      /* USB Host port */
+#define AT91RM9200_ID_EMAC     24      /* Ethernet MAC */
+#define AT91RM9200_ID_IRQ0     25      /* Advanced Interrupt Controller (IRQ0) */
+#define AT91RM9200_ID_IRQ1     26      /* Advanced Interrupt Controller (IRQ1) */
+#define AT91RM9200_ID_IRQ2     27      /* Advanced Interrupt Controller (IRQ2) */
+#define AT91RM9200_ID_IRQ3     28      /* Advanced Interrupt Controller (IRQ3) */
+#define AT91RM9200_ID_IRQ4     29      /* Advanced Interrupt Controller (IRQ4) */
+#define AT91RM9200_ID_IRQ5     30      /* Advanced Interrupt Controller (IRQ5) */
+#define AT91RM9200_ID_IRQ6     31      /* Advanced Interrupt Controller (IRQ6) */
 
 
 /*
  * Peripheral physical base addresses.
  */
-#define AT91_BASE_TCB0         0xfffa0000
-#define AT91_BASE_TC0          0xfffa0000
-#define AT91_BASE_TC1          0xfffa0040
-#define AT91_BASE_TC2          0xfffa0080
-#define AT91_BASE_TCB1         0xfffa4000
-#define AT91_BASE_TC3          0xfffa4000
-#define AT91_BASE_TC4          0xfffa4040
-#define AT91_BASE_TC5          0xfffa4080
-#define AT91_BASE_UDP          0xfffb0000
-#define AT91_BASE_MCI          0xfffb4000
-#define AT91_BASE_TWI          0xfffb8000
-#define AT91_BASE_EMAC         0xfffbc000
-#define AT91_BASE_US0          0xfffc0000
-#define AT91_BASE_US1          0xfffc4000
-#define AT91_BASE_US2          0xfffc8000
-#define AT91_BASE_US3          0xfffcc000
-#define AT91_BASE_SSC0         0xfffd0000
-#define AT91_BASE_SSC1         0xfffd4000
-#define AT91_BASE_SSC2         0xfffd8000
-#define AT91_BASE_SPI          0xfffe0000
+#define AT91RM9200_BASE_TCB0   0xfffa0000
+#define AT91RM9200_BASE_TC0    0xfffa0000
+#define AT91RM9200_BASE_TC1    0xfffa0040
+#define AT91RM9200_BASE_TC2    0xfffa0080
+#define AT91RM9200_BASE_TCB1   0xfffa4000
+#define AT91RM9200_BASE_TC3    0xfffa4000
+#define AT91RM9200_BASE_TC4    0xfffa4040
+#define AT91RM9200_BASE_TC5    0xfffa4080
+#define AT91RM9200_BASE_UDP    0xfffb0000
+#define AT91RM9200_BASE_MCI    0xfffb4000
+#define AT91RM9200_BASE_TWI    0xfffb8000
+#define AT91RM9200_BASE_EMAC   0xfffbc000
+#define AT91RM9200_BASE_US0    0xfffc0000
+#define AT91RM9200_BASE_US1    0xfffc4000
+#define AT91RM9200_BASE_US2    0xfffc8000
+#define AT91RM9200_BASE_US3    0xfffcc000
+#define AT91RM9200_BASE_SSC0   0xfffd0000
+#define AT91RM9200_BASE_SSC1   0xfffd4000
+#define AT91RM9200_BASE_SSC2   0xfffd8000
+#define AT91RM9200_BASE_SPI    0xfffe0000
 #define AT91_BASE_SYS          0xfffff000
 
 
+/*
+ * Internal Memory.
+ */
+#define AT91RM9200_ROM_BASE    0x00100000      /* Internal ROM base address */
+#define AT91RM9200_ROM_SIZE    SZ_128K         /* Internal ROM size (128Kb) */
+
+#define AT91RM9200_SRAM_BASE   0x00200000      /* Internal SRAM base address */
+#define AT91RM9200_SRAM_SIZE   SZ_16K          /* Internal SRAM size (16Kb) */
+
+#define AT91RM9200_UHP_BASE    0x00300000      /* USB Host controller */
+
+
+#if 0
 /*
  * PIO pin definitions (peripheral A/B multiplexing).
  */
@@ -257,5 +270,6 @@
 #define AT91_PD25_TPK13                (1 << 25)       /* B: ETM Trace Packet Port 13 */
 #define AT91_PD26_TPK14                (1 << 26)       /* B: ETM Trace Packet Port 14 */
 #define AT91_PD27_TPK15                (1 << 27)       /* B: ETM Trace Packet Port 15 */
+#endif
 
 #endif

diff --git a/include/asm-arm/arch-at91rm9200/gpio.h b/include/asm-arm/arch-at91rm9200/gpio.h
index dbde1ba..6243f28 100644 (file)
--- a/include/asm-arm/arch-at91rm9200/gpio.h
+++ b/include/asm-arm/arch-at91rm9200/gpio.h
@@ -20,7 +20,7 @@
 #define PQFP_GPIO_BANKS                3       /* PQFP package has 3 banks */
 #define BGA_GPIO_BANKS         4       /* BGA package has 4 banks */
 
-/* these pin numbers double as IRQ numbers, like AT91_ID_* values */
+/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
 
 #define        AT91_PIN_PA0    (PIN_BASE + 0x00 + 0)
 #define        AT91_PIN_PA1    (PIN_BASE + 0x00 + 1)

diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h
index 235d39d..878e65f 100644 (file)
--- a/include/asm-arm/arch-at91rm9200/hardware.h
+++ b/include/asm-arm/arch-at91rm9200/hardware.h
@@ -34,27 +34,23 @@
  * Virtual to Physical Address mapping for IO devices.
  */
 #define AT91_VA_BASE_SYS       AT91_IO_P2V(AT91_BASE_SYS)
-#define AT91_VA_BASE_SPI       AT91_IO_P2V(AT91_BASE_SPI)
-#define AT91_VA_BASE_SSC2      AT91_IO_P2V(AT91_BASE_SSC2)
-#define AT91_VA_BASE_SSC1      AT91_IO_P2V(AT91_BASE_SSC1)
-#define AT91_VA_BASE_SSC0      AT91_IO_P2V(AT91_BASE_SSC0)
-#define AT91_VA_BASE_US3       AT91_IO_P2V(AT91_BASE_US3)
-#define AT91_VA_BASE_US2       AT91_IO_P2V(AT91_BASE_US2)
-#define AT91_VA_BASE_US1       AT91_IO_P2V(AT91_BASE_US1)
-#define AT91_VA_BASE_US0       AT91_IO_P2V(AT91_BASE_US0)
-#define AT91_VA_BASE_EMAC      AT91_IO_P2V(AT91_BASE_EMAC)
-#define AT91_VA_BASE_TWI       AT91_IO_P2V(AT91_BASE_TWI)
-#define AT91_VA_BASE_MCI       AT91_IO_P2V(AT91_BASE_MCI)
-#define AT91_VA_BASE_UDP       AT91_IO_P2V(AT91_BASE_UDP)
-#define AT91_VA_BASE_TCB1      AT91_IO_P2V(AT91_BASE_TCB1)
-#define AT91_VA_BASE_TCB0      AT91_IO_P2V(AT91_BASE_TCB0)
-
-/* Internal SRAM */
-#define AT91_SRAM_BASE         0x00200000      /* Internal SRAM base address */
-#define AT91_SRAM_SIZE         0x00004000      /* Internal SRAM SIZE (16Kb) */
+#define AT91_VA_BASE_SPI       AT91_IO_P2V(AT91RM9200_BASE_SPI)
+#define AT91_VA_BASE_SSC2      AT91_IO_P2V(AT91RM9200_BASE_SSC2)
+#define AT91_VA_BASE_SSC1      AT91_IO_P2V(AT91RM9200_BASE_SSC1)
+#define AT91_VA_BASE_SSC0      AT91_IO_P2V(AT91RM9200_BASE_SSC0)
+#define AT91_VA_BASE_US3       AT91_IO_P2V(AT91RM9200_BASE_US3)
+#define AT91_VA_BASE_US2       AT91_IO_P2V(AT91RM9200_BASE_US2)
+#define AT91_VA_BASE_US1       AT91_IO_P2V(AT91RM9200_BASE_US1)
+#define AT91_VA_BASE_US0       AT91_IO_P2V(AT91RM9200_BASE_US0)
+#define AT91_VA_BASE_EMAC      AT91_IO_P2V(AT91RM9200_BASE_EMAC)
+#define AT91_VA_BASE_TWI       AT91_IO_P2V(AT91RM9200_BASE_TWI)
+#define AT91_VA_BASE_MCI       AT91_IO_P2V(AT91RM9200_BASE_MCI)
+#define AT91_VA_BASE_UDP       AT91_IO_P2V(AT91RM9200_BASE_UDP)
+#define AT91_VA_BASE_TCB1      AT91_IO_P2V(AT91RM9200_BASE_TCB1)
+#define AT91_VA_BASE_TCB0      AT91_IO_P2V(AT91RM9200_BASE_TCB0)
 
  /* Internal SRAM is mapped below the IO devices */
-#define AT91_SRAM_VIRT_BASE    (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE)
+#define AT91_SRAM_VIRT_BASE    (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE)
 
 /* Serial ports */
 #define AT91_NR_UART           5               /* 4 USART3's and one DBGU port */
@@ -71,9 +67,6 @@
 /* Compact Flash */
 #define AT91_CF_BASE           0x50000000      /* NCS4-NCS6: Compact Flash physical base address */
 
-/* Multi-Master Memory controller */
-#define AT91_UHP_BASE          0x00300000      /* USB Host controller */
-
 /* Clocks */
 #define AT91_SLOW_CLOCK                32768           /* slow clock */
 

diff --git a/include/asm-arm/arch-at91rm9200/irqs.h b/include/asm-arm/arch-at91rm9200/irqs.h
index f63842c..763cb96 100644 (file)
--- a/include/asm-arm/arch-at91rm9200/irqs.h
+++ b/include/asm-arm/arch-at91rm9200/irqs.h
@@ -32,7 +32,7 @@
 
 
 /*
- * IRQ interrupt symbols are the AT91_ID_* symbols in at91rm9200.h
+ * IRQ interrupt symbols are the AT91xxx_ID_* symbols
  * for IRQs handled directly through the AIC, or else the AT91_PIN_*
  * symbols in gpio.h for ones handled indirectly as GPIOs.
  * We make provision for 4 banks of GPIO.