arm64: big-endian: write CPU holding pen address as LE

Currently when CPUs are brought online via a spin-table, the address
they should jump to is written to the cpu-release-addr in the kernel's
native endianness. As the kernel may switch endianness, secondaries
might read the value byte-reversed from what was intended, and they
would jump to the wrong address.

As the only current arm64 spin-table implementations are
little-endian, stricten up the arm64 spin-table definition such that
the value written to cpu-release-addr is _always_ little-endian
regardless of the endianness of any CPU. If a spinning CPU is
operating big-endian, it must byte-reverse the value before jumping to
handle this.

Signed-off-by: Matthew Leach <matthew.leach@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/kernel/smp_spin_table.c b/arch/arm64/kernel/smp_spin_table.c
index 27f0836..44c2280 100644 (file)
--- a/arch/arm64/kernel/smp_spin_table.c
+++ b/arch/arm64/kernel/smp_spin_table.c
@@ -72,7 +72,16 @@ static int smp_spin_table_cpu_prepare(unsigned int cpu)
                return -ENODEV;
 
        release_addr = __va(cpu_release_addr[cpu]);
-       release_addr[0] = (void *)__pa(secondary_holding_pen);
+
+       /*
+        * We write the release address as LE regardless of the native
+        * endianess of the kernel. Therefore, any boot-loaders that
+        * read this address need to convert this address to the
+        * boot-loader's endianess before jumping. This is mandated by
+        * the boot protocol.
+        */
+       release_addr[0] = (void *) cpu_to_le64(__pa(secondary_holding_pen));
+
        __flush_dcache_area(release_addr, sizeof(release_addr[0]));
 
        /*