* 'irqclean-submit1' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/misc-2.6:
drivers/isdn/act2000: kill irq2card_map
drivers/net/eepro: kill dead code
Various drivers' irq handlers: kill dead code, needless casts
drivers/net: eliminate irq handler impossible checks, needless casts
arch/i386/kernel/time: don't shadow 'irq' function arg
}
void
-apecs_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs * regs)
+apecs_machine_check(unsigned long vector, unsigned long la_ptr)
{
struct el_common *mchk_header;
struct el_apecs_procdata *mchk_procdata;
wrmces(0x7); /* reset machine check pending flag */
mb();
- process_mcheck_info(vector, la_ptr, regs, "APECS",
+ process_mcheck_info(vector, la_ptr, "APECS",
(mcheck_expected(0)
&& (mchk_sysdata->epic_dcsr & 0x0c00UL)));
}
}
void
-cia_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs * regs)
+cia_machine_check(unsigned long vector, unsigned long la_ptr)
{
int expected;
expected = mcheck_expected(0);
if (!expected && vector == 0x660)
expected = cia_decode_mchk(la_ptr);
- process_mcheck_info(vector, la_ptr, regs, "CIA", expected);
+ process_mcheck_info(vector, la_ptr, "CIA", expected);
}
#include <linux/tty.h>
#include <asm/ptrace.h>
+#include <asm/irq_regs.h>
#include <asm/smp.h>
#include "proto.h"
}
void
-lca_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs *regs)
+lca_machine_check(unsigned long vector, unsigned long la_ptr)
{
const char * reason;
union el_lca el;
wrmces(rdmces()); /* reset machine check pending flag */
printk(KERN_CRIT "LCA machine check: vector=%#lx pc=%#lx code=%#x\n",
- vector, regs->pc, (unsigned int) el.c->code);
+ vector, get_irq_regs()->pc, (unsigned int) el.c->code);
/*
* The first quadword after the common header always seems to
}
void
-mcpcia_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs * regs)
+mcpcia_machine_check(unsigned long vector, unsigned long la_ptr)
{
struct el_common *mchk_header;
struct el_MCPCIA_uncorrected_frame_mcheck *mchk_logout;
wrmces(0x7);
mb();
- process_mcheck_info(vector, la_ptr, regs, "MCPCIA", expected != 0);
+ process_mcheck_info(vector, la_ptr, "MCPCIA", expected != 0);
if (!expected && vector != 0x620 && vector != 0x630) {
mcpcia_print_uncorrectable(mchk_logout);
mcpcia_print_system_area(la_ptr);
}
void
-polaris_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs * regs)
+polaris_machine_check(unsigned long vector, unsigned long la_ptr)
{
/* Clear the error before any reporting. */
mb();
wrmces(0x7);
mb();
- process_mcheck_info(vector, la_ptr, regs, "POLARIS",
+ process_mcheck_info(vector, la_ptr, "POLARIS",
mcheck_expected(0));
}
* Hence all the taken/expected/any_expected/last_taken stuff...
*/
void
-t2_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs * regs)
+t2_machine_check(unsigned long vector, unsigned long la_ptr)
{
int cpu = smp_processor_id();
#ifdef CONFIG_VERBOSE_MCHECK
}
#endif
- process_mcheck_info(vector, la_ptr, regs, "T2", mcheck_expected(cpu));
+ process_mcheck_info(vector, la_ptr, "T2", mcheck_expected(cpu));
}
}
void
-tsunami_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs * regs)
+tsunami_machine_check(unsigned long vector, unsigned long la_ptr)
{
/* Clear error before any reporting. */
mb();
wrmces(0x7);
mb();
- process_mcheck_info(vector, la_ptr, regs, "TSUNAMI",
+ process_mcheck_info(vector, la_ptr, "TSUNAMI",
mcheck_expected(smp_processor_id()));
}
}
void
-wildfire_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs * regs)
+wildfire_machine_check(unsigned long vector, unsigned long la_ptr)
{
mb();
mb(); /* magic */
wrmces(0x7);
mb();
- process_mcheck_info(vector, la_ptr, regs, "WILDFIRE",
+ process_mcheck_info(vector, la_ptr, "WILDFIRE",
mcheck_expected(smp_processor_id()));
}
#include <linux/sched.h>
#include <asm/io.h>
+#include <asm/irq_regs.h>
#include <asm/hwrpb.h>
#include <asm/smp.h>
#include <asm/err_common.h>
}
void
-ev6_machine_check(u64 vector, u64 la_ptr, struct pt_regs *regs)
+ev6_machine_check(u64 vector, u64 la_ptr)
{
struct el_common *mchk_header = (struct el_common *)la_ptr;
(unsigned int)vector, (int)smp_processor_id());
ev6_process_logout_frame(mchk_header, 1);
- dik_show_regs(regs, NULL);
+ dik_show_regs(get_irq_regs(), NULL);
err_print_prefix = saved_err_prefix;
}
}
void
-ev7_machine_check(u64 vector, u64 la_ptr, struct pt_regs *regs)
+ev7_machine_check(u64 vector, u64 la_ptr)
{
struct el_subpacket *el_ptr = (struct el_subpacket *)la_ptr;
char *saved_err_prefix = err_print_prefix;
ev7_collect_logout_frame_subpackets(struct el_subpacket *,
struct ev7_lf_subpackets *);
extern void ev7_register_error_handlers(void);
-extern void ev7_machine_check(u64, u64, struct pt_regs *);
+extern void ev7_machine_check(u64, u64);
/*
* err_ev6.c
*/
extern void ev6_register_error_handlers(void);
extern int ev6_process_logout_frame(struct el_common *, int);
-extern void ev6_machine_check(u64, u64, struct pt_regs *);
+extern void ev6_machine_check(u64, u64);
/*
* err_marvel.c
*/
-extern void marvel_machine_check(u64, u64, struct pt_regs *);
+extern void marvel_machine_check(u64, u64);
extern void marvel_register_error_handlers(void);
/*
* err_titan.c
*/
extern int titan_process_logout_frame(struct el_common *, int);
-extern void titan_machine_check(u64, u64, struct pt_regs *);
+extern void titan_machine_check(u64, u64);
extern void titan_register_error_handlers(void);
extern int privateer_process_logout_frame(struct el_common *, int);
-extern void privateer_machine_check(u64, u64, struct pt_regs *);
+extern void privateer_machine_check(u64, u64);
}
void
-marvel_machine_check(u64 vector, u64 la_ptr, struct pt_regs *regs)
+marvel_machine_check(u64 vector, u64 la_ptr)
{
struct el_subpacket *el_ptr = (struct el_subpacket *)la_ptr;
int (*process_frame)(struct ev7_lf_subpackets *, int) = NULL;
default:
/* Don't know it - pass it up. */
- ev7_machine_check(vector, la_ptr, regs);
+ ev7_machine_check(vector, la_ptr);
return;
}
}
void
-titan_machine_check(u64 vector, u64 la_ptr, struct pt_regs *regs)
+titan_machine_check(u64 vector, u64 la_ptr)
{
struct el_common *mchk_header = (struct el_common *)la_ptr;
struct el_TITAN_sysdata_mcheck *tmchk =
* Only handle system errors here
*/
if ((vector != SCB_Q_SYSMCHK) && (vector != SCB_Q_SYSERR)) {
- ev6_machine_check(vector, la_ptr, regs);
+ ev6_machine_check(vector, la_ptr);
return;
}
#ifdef CONFIG_VERBOSE_MCHECK
titan_process_logout_frame(mchk_header, alpha_verbose_mcheck);
if (alpha_verbose_mcheck)
- dik_show_regs(regs, NULL);
+ dik_show_regs(get_irq_regs(), NULL);
#endif /* CONFIG_VERBOSE_MCHECK */
err_print_prefix = saved_err_prefix;
* machine checks to interrupts
*/
irqmask = tmchk->c_dirx & TITAN_MCHECK_INTERRUPT_MASK;
- titan_dispatch_irqs(irqmask, regs);
+ titan_dispatch_irqs(irqmask);
}
}
void
-privateer_machine_check(u64 vector, u64 la_ptr, struct pt_regs *regs)
+privateer_machine_check(u64 vector, u64 la_ptr)
{
struct el_common *mchk_header = (struct el_common *)la_ptr;
struct el_TITAN_sysdata_mcheck *tmchk =
* Only handle system events here.
*/
if (vector != SCB_Q_SYSEVENT)
- return titan_machine_check(vector, la_ptr, regs);
+ return titan_machine_check(vector, la_ptr);
/*
* Report the event - System Events should be reported even if no
/*
* Dispatch the interrupt(s).
*/
- titan_dispatch_irqs(irqmask, regs);
+ titan_dispatch_irqs(irqmask);
/*
* Release the logout frame.
#define MAX_ILLEGAL_IRQS 16
void
-handle_irq(int irq, struct pt_regs * regs)
+handle_irq(int irq)
{
/*
* We ack quickly, we don't want the irq controller
* at IPL 0.
*/
local_irq_disable();
- __do_IRQ(irq, regs);
+ __do_IRQ(irq);
irq_exit();
}
do_entInt(unsigned long type, unsigned long vector,
unsigned long la_ptr, struct pt_regs *regs)
{
+ struct pt_regs *old_regs;
switch (type) {
case 0:
#ifdef CONFIG_SMP
#endif
break;
case 1:
+ old_regs = set_irq_regs(regs);
#ifdef CONFIG_SMP
{
long cpu;
if (cpu != boot_cpuid) {
kstat_cpu(cpu).irqs[RTC_IRQ]++;
} else {
- handle_irq(RTC_IRQ, regs);
+ handle_irq(RTC_IRQ);
}
}
#else
- handle_irq(RTC_IRQ, regs);
+ handle_irq(RTC_IRQ);
#endif
+ set_irq_regs(old_regs);
return;
case 2:
- alpha_mv.machine_check(vector, la_ptr, regs);
+ old_regs = set_irq_regs(regs);
+ alpha_mv.machine_check(vector, la_ptr);
+ set_irq_regs(old_regs);
return;
case 3:
- alpha_mv.device_interrupt(vector, regs);
+ old_regs = set_irq_regs(regs);
+ alpha_mv.device_interrupt(vector);
+ set_irq_regs(old_regs);
return;
case 4:
perf_irq(la_ptr, regs);
void
process_mcheck_info(unsigned long vector, unsigned long la_ptr,
- struct pt_regs *regs, const char *machine,
- int expected)
+ const char *machine, int expected)
{
struct el_common *mchk_header;
const char *reason;
mchk_header = (struct el_common *)la_ptr;
printk(KERN_CRIT "%s machine check: vector=0x%lx pc=0x%lx code=0x%x\n",
- machine, vector, regs->pc, mchk_header->code);
+ machine, vector, get_irq_regs()->pc, mchk_header->code);
switch (mchk_header->code) {
/* Machine check reasons. Defined according to PALcode sources. */
printk(KERN_CRIT "machine check type: %s%s\n",
reason, mchk_header->retry ? " (retryable)" : "");
- dik_show_regs(regs, NULL);
+ dik_show_regs(get_irq_regs(), NULL);
#ifdef CONFIG_VERBOSE_MCHECK
if (alpha_verbose_mcheck > 1) {
#if defined(IACK_SC)
void
-isa_device_interrupt(unsigned long vector, struct pt_regs *regs)
+isa_device_interrupt(unsigned long vector)
{
/*
* Generate a PCI interrupt acknowledge cycle. The PIC will
*/
int j = *(vuip) IACK_SC;
j &= 0xff;
- handle_irq(j, regs);
+ handle_irq(j);
}
#endif
#if defined(CONFIG_ALPHA_GENERIC) || !defined(IACK_SC)
void
-isa_no_iack_sc_device_interrupt(unsigned long vector, struct pt_regs *regs)
+isa_no_iack_sc_device_interrupt(unsigned long vector)
{
unsigned long pic;
while (pic) {
int j = ffz(~pic);
pic &= pic - 1;
- handle_irq(j, regs);
+ handle_irq(j);
}
}
#endif
#define RTC_IRQ 8
-extern void isa_device_interrupt(unsigned long, struct pt_regs *);
-extern void isa_no_iack_sc_device_interrupt(unsigned long, struct pt_regs *);
-extern void srm_device_interrupt(unsigned long, struct pt_regs *);
-extern void pyxis_device_interrupt(unsigned long, struct pt_regs *);
+extern void isa_device_interrupt(unsigned long);
+extern void isa_no_iack_sc_device_interrupt(unsigned long);
+extern void srm_device_interrupt(unsigned long);
+extern void pyxis_device_interrupt(unsigned long);
extern struct irqaction timer_irqaction;
extern struct irqaction isa_cascade_irqaction;
extern struct hw_interrupt_type i8259a_irq_type;
extern void init_i8259a_irqs(void);
-extern void handle_irq(int irq, struct pt_regs * regs);
+extern void handle_irq(int irq);
};
void
-pyxis_device_interrupt(unsigned long vector, struct pt_regs *regs)
+pyxis_device_interrupt(unsigned long vector)
{
unsigned long pld;
unsigned int i;
i = ffz(~pld);
pld &= pld - 1; /* clear least bit set */
if (i == 7)
- isa_device_interrupt(vector, regs);
+ isa_device_interrupt(vector);
else
- handle_irq(16+i, regs);
+ handle_irq(16+i);
}
}
}
void
-srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+srm_device_interrupt(unsigned long vector)
{
int irq = (vector - 0x800) >> 4;
- handle_irq(irq, regs);
+ handle_irq(irq);
}
extern struct pci_ops apecs_pci_ops;
extern void apecs_init_arch(void);
extern void apecs_pci_clr_err(void);
-extern void apecs_machine_check(u64, u64, struct pt_regs *);
+extern void apecs_machine_check(u64, u64);
extern void apecs_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
/* core_cia.c */
extern void cia_init_arch(void);
extern void pyxis_init_arch(void);
extern void cia_kill_arch(int);
-extern void cia_machine_check(u64, u64, struct pt_regs *);
+extern void cia_machine_check(u64, u64);
extern void cia_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
/* core_irongate.c */
extern struct pci_ops irongate_pci_ops;
extern int irongate_pci_clr_err(void);
extern void irongate_init_arch(void);
-extern void irongate_machine_check(u64, u64, struct pt_regs *);
+extern void irongate_machine_check(u64, u64);
#define irongate_pci_tbi ((void *)0)
/* core_lca.c */
extern struct pci_ops lca_pci_ops;
extern void lca_init_arch(void);
-extern void lca_machine_check(u64, u64, struct pt_regs *);
+extern void lca_machine_check(u64, u64);
extern void lca_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
/* core_marvel.c */
extern struct pci_ops marvel_pci_ops;
extern void marvel_init_arch(void);
extern void marvel_kill_arch(int);
-extern void marvel_machine_check(u64, u64, struct pt_regs *);
+extern void marvel_machine_check(u64, u64);
extern void marvel_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
extern int marvel_pa_to_nid(unsigned long);
extern int marvel_cpuid_to_nid(int);
extern struct pci_ops mcpcia_pci_ops;
extern void mcpcia_init_arch(void);
extern void mcpcia_init_hoses(void);
-extern void mcpcia_machine_check(u64, u64, struct pt_regs *);
+extern void mcpcia_machine_check(u64, u64);
extern void mcpcia_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
/* core_polaris.c */
extern int polaris_read_config_dword(struct pci_dev *, int, u32 *);
extern int polaris_write_config_dword(struct pci_dev *, int, u32);
extern void polaris_init_arch(void);
-extern void polaris_machine_check(u64, u64, struct pt_regs *);
+extern void polaris_machine_check(u64, u64);
#define polaris_pci_tbi ((void *)0)
/* core_t2.c */
extern struct pci_ops t2_pci_ops;
extern void t2_init_arch(void);
extern void t2_kill_arch(int);
-extern void t2_machine_check(u64, u64, struct pt_regs *);
+extern void t2_machine_check(u64, u64);
extern void t2_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
/* core_titan.c */
extern struct pci_ops titan_pci_ops;
extern void titan_init_arch(void);
extern void titan_kill_arch(int);
-extern void titan_machine_check(u64, u64, struct pt_regs *);
+extern void titan_machine_check(u64, u64);
extern void titan_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
extern struct _alpha_agp_info *titan_agp_info(void);
extern struct pci_ops tsunami_pci_ops;
extern void tsunami_init_arch(void);
extern void tsunami_kill_arch(int);
-extern void tsunami_machine_check(u64, u64, struct pt_regs *);
+extern void tsunami_machine_check(u64, u64);
extern void tsunami_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
/* core_wildfire.c */
extern struct pci_ops wildfire_pci_ops;
extern void wildfire_init_arch(void);
extern void wildfire_kill_arch(int);
-extern void wildfire_machine_check(u64, u64, struct pt_regs *);
+extern void wildfire_machine_check(u64, u64);
extern void wildfire_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
extern int wildfire_pa_to_nid(unsigned long);
extern int wildfire_cpuid_to_nid(int);
/* extern void reset_for_srm(void); */
/* time.c */
-extern irqreturn_t timer_interrupt(int irq, void *dev, struct pt_regs * regs);
+extern irqreturn_t timer_interrupt(int irq, void *dev);
extern void common_init_rtc(void);
extern unsigned long est_cycle_freq;
extern void die_if_kernel(char *, struct pt_regs *, long, unsigned long *);
/* sys_titan.c */
-extern void titan_dispatch_irqs(u64, struct pt_regs *);
+extern void titan_dispatch_irqs(u64);
/* ../mm/init.c */
extern void switch_to_system_map(void);
#endif
extern void process_mcheck_info(unsigned long vector, unsigned long la_ptr,
- struct pt_regs *regs, const char *machine,
- int expected);
+ const char *machine, int expected);
void
smp_percpu_timer_interrupt(struct pt_regs *regs)
{
+ struct pt_regs *old_regs;
int cpu = smp_processor_id();
unsigned long user = user_mode(regs);
struct cpuinfo_alpha *data = &cpu_data[cpu];
+ old_regs = set_irq_regs(regs);
+
/* Record kernel PC. */
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
if (!--data->prof_counter) {
/* We need to make like a normal interrupt -- otherwise
irq_exit();
}
+ set_irq_regs(old_regs);
}
int __init
};
static void
-alcor_device_interrupt(unsigned long vector, struct pt_regs *regs)
+alcor_device_interrupt(unsigned long vector)
{
unsigned long pld;
unsigned int i;
i = ffz(~pld);
pld &= pld - 1; /* clear least bit set */
if (i == 31) {
- isa_device_interrupt(vector, regs);
+ isa_device_interrupt(vector);
} else {
- handle_irq(16 + i, regs);
+ handle_irq(16 + i);
}
}
}
};
static void
-cabriolet_device_interrupt(unsigned long v, struct pt_regs *r)
+cabriolet_device_interrupt(unsigned long v)
{
unsigned long pld;
unsigned int i;
i = ffz(~pld);
pld &= pld - 1; /* clear least bit set */
if (i == 4) {
- isa_device_interrupt(v, r);
+ isa_device_interrupt(v);
} else {
- handle_irq(16 + i, r);
+ handle_irq(16 + i);
}
}
}
static void __init
-common_init_irq(void (*srm_dev_int)(unsigned long v, struct pt_regs *r))
+common_init_irq(void (*srm_dev_int)(unsigned long v))
{
init_i8259a_irqs();
too invasive though. */
static void
-pc164_srm_device_interrupt(unsigned long v, struct pt_regs *r)
+pc164_srm_device_interrupt(unsigned long v)
{
__min_ipl = getipl();
- srm_device_interrupt(v, r);
+ srm_device_interrupt(v);
__min_ipl = 0;
}
static void
-pc164_device_interrupt(unsigned long v, struct pt_regs *r)
+pc164_device_interrupt(unsigned long v)
{
__min_ipl = getipl();
- cabriolet_device_interrupt(v, r);
+ cabriolet_device_interrupt(v);
__min_ipl = 0;
}
};
static void
-dp264_device_interrupt(unsigned long vector, struct pt_regs * regs)
+dp264_device_interrupt(unsigned long vector)
{
#if 1
printk("dp264_device_interrupt: NOT IMPLEMENTED YET!! \n");
i = ffz(~pld);
pld &= pld - 1; /* clear least bit set */
if (i == 55)
- isa_device_interrupt(vector, regs);
+ isa_device_interrupt(vector);
else
- handle_irq(16 + i, 16 + i, regs);
+ handle_irq(16 + i);
#if 0
TSUNAMI_cchip->dir0.csr = 1UL << i; mb();
tmp = TSUNAMI_cchip->dir0.csr;
}
static void
-dp264_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+dp264_srm_device_interrupt(unsigned long vector)
{
int irq;
if (irq >= 32)
irq -= 16;
- handle_irq(irq, regs);
+ handle_irq(irq);
}
static void
-clipper_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+clipper_srm_device_interrupt(unsigned long vector)
{
int irq;
*
* Eg IRQ 24 is DRIR bit 8, etc, etc
*/
- handle_irq(irq, regs);
+ handle_irq(irq);
}
static void __init
};
static void
-eb64p_device_interrupt(unsigned long vector, struct pt_regs *regs)
+eb64p_device_interrupt(unsigned long vector)
{
unsigned long pld;
unsigned int i;
pld &= pld - 1; /* clear least bit set */
if (i == 5) {
- isa_device_interrupt(vector, regs);
+ isa_device_interrupt(vector);
} else {
- handle_irq(16 + i, regs);
+ handle_irq(16 + i);
}
}
}
};
static void
-eiger_device_interrupt(unsigned long vector, struct pt_regs * regs)
+eiger_device_interrupt(unsigned long vector)
{
unsigned intstatus;
* despatch an interrupt if it's set.
*/
- if (intstatus & 8) handle_irq(16+3, regs);
- if (intstatus & 4) handle_irq(16+2, regs);
- if (intstatus & 2) handle_irq(16+1, regs);
- if (intstatus & 1) handle_irq(16+0, regs);
+ if (intstatus & 8) handle_irq(16+3);
+ if (intstatus & 4) handle_irq(16+2);
+ if (intstatus & 2) handle_irq(16+1);
+ if (intstatus & 1) handle_irq(16+0);
} else {
- isa_device_interrupt(vector, regs);
+ isa_device_interrupt(vector);
}
}
static void
-eiger_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+eiger_srm_device_interrupt(unsigned long vector)
{
int irq = (vector - 0x800) >> 4;
- handle_irq(irq, regs);
+ handle_irq(irq);
}
static void __init
};
static void
-jensen_device_interrupt(unsigned long vector, struct pt_regs * regs)
+jensen_device_interrupt(unsigned long vector)
{
int irq;
if (cc - last_msg > ((JENSEN_CYCLES_PER_SEC) * 3) ||
irq != last_irq) {
printk(KERN_CRIT " irq %d count %d cc %u @ %lx\n",
- irq, count, cc-last_cc, regs->pc);
+ irq, count, cc-last_cc, get_irq_regs()->pc);
count = 0;
last_msg = cc;
last_irq = irq;
}
#endif
- handle_irq(irq, regs);
+ handle_irq(irq);
}
static void __init
}
static void
-jensen_machine_check (u64 vector, u64 la, struct pt_regs *regs)
+jensen_machine_check (u64 vector, u64 la)
{
printk(KERN_CRIT "Machine check\n");
}
* Interrupt handling.
*/
static void
-io7_device_interrupt(unsigned long vector, struct pt_regs * regs)
+io7_device_interrupt(unsigned long vector)
{
unsigned int pid;
unsigned int irq;
irq &= MARVEL_IRQ_VEC_IRQ_MASK; /* not too many bits */
irq |= pid << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */
- handle_irq(irq, regs);
+ handle_irq(irq);
}
static volatile unsigned long *
static void
-miata_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+miata_srm_device_interrupt(unsigned long vector)
{
int irq;
if (irq >= 16)
irq = irq + 8;
- handle_irq(irq, regs);
+ handle_irq(irq);
}
static void __init
};
static void
-mikasa_device_interrupt(unsigned long vector, struct pt_regs *regs)
+mikasa_device_interrupt(unsigned long vector)
{
unsigned long pld;
unsigned int i;
i = ffz(~pld);
pld &= pld - 1; /* clear least bit set */
if (i < 16) {
- isa_device_interrupt(vector, regs);
+ isa_device_interrupt(vector);
} else {
- handle_irq(i, regs);
+ handle_irq(i);
}
}
}
#if defined(CONFIG_ALPHA_GENERIC) || !defined(CONFIG_ALPHA_PRIMO)
static void
-mikasa_apecs_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs * regs)
+mikasa_apecs_machine_check(unsigned long vector, unsigned long la_ptr)
{
#define MCHK_NO_DEVSEL 0x205U
#define MCHK_NO_TABT 0x204U
mb();
code = mchk_header->code;
- process_mcheck_info(vector, la_ptr, regs, "MIKASA APECS",
+ process_mcheck_info(vector, la_ptr, "MIKASA APECS",
(mcheck_expected(0)
&& (code == MCHK_NO_DEVSEL
|| code == MCHK_NO_TABT)));
in the system. They are analysed separately but all starts here. */
void
-nautilus_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs *regs)
+nautilus_machine_check(unsigned long vector, unsigned long la_ptr)
{
char *mchk_class;
else if (vector == SCB_Q_SYSMCHK)
mchk_class = "Fatal";
else {
- ev6_machine_check(vector, la_ptr, regs);
+ ev6_machine_check(vector, la_ptr);
return;
}
"[%s System Machine Check (NMI)]\n",
vector, mchk_class);
- naut_sys_machine_check(vector, la_ptr, regs);
+ naut_sys_machine_check(vector, la_ptr, get_irq_regs());
/* Tell the PALcode to clear the machine check */
draina();
};
static void
-noritake_device_interrupt(unsigned long vector, struct pt_regs *regs)
+noritake_device_interrupt(unsigned long vector)
{
unsigned long pld;
unsigned int i;
i = ffz(~pld);
pld &= pld - 1; /* clear least bit set */
if (i < 16) {
- isa_device_interrupt(vector, regs);
+ isa_device_interrupt(vector);
} else {
- handle_irq(i, regs);
+ handle_irq(i);
}
}
}
static void
-noritake_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+noritake_srm_device_interrupt(unsigned long vector)
{
int irq;
if (irq >= 16)
irq = irq + 1;
- handle_irq(irq, regs);
+ handle_irq(irq);
}
static void __init
#if defined(CONFIG_ALPHA_GENERIC) || !defined(CONFIG_ALPHA_PRIMO)
static void
-noritake_apecs_machine_check(unsigned long vector, unsigned long la_ptr,
- struct pt_regs * regs)
+noritake_apecs_machine_check(unsigned long vector, unsigned long la_ptr)
{
#define MCHK_NO_DEVSEL 0x205U
#define MCHK_NO_TABT 0x204U
mb();
code = mchk_header->code;
- process_mcheck_info(vector, la_ptr, regs, "NORITAKE APECS",
+ process_mcheck_info(vector, la_ptr, "NORITAKE APECS",
(mcheck_expected(0)
&& (code == MCHK_NO_DEVSEL
|| code == MCHK_NO_TABT)));
};
static void
-rawhide_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+rawhide_srm_device_interrupt(unsigned long vector)
{
int irq;
/* Adjust by which hose it is from. */
irq -= ((irq + 16) >> 2) & 0x38;
- handle_irq(irq, regs);
+ handle_irq(irq);
}
static void __init
};
static void
-rx164_device_interrupt(unsigned long vector, struct pt_regs *regs)
+rx164_device_interrupt(unsigned long vector)
{
unsigned long pld;
volatile unsigned int *dirr;
i = ffz(~pld);
pld &= pld - 1; /* clear least bit set */
if (i == 20) {
- isa_no_iack_sc_device_interrupt(vector, regs);
+ isa_no_iack_sc_device_interrupt(vector);
} else {
- handle_irq(16+i, regs);
+ handle_irq(16+i);
}
}
}
};
static void
-sable_lynx_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+sable_lynx_srm_device_interrupt(unsigned long vector)
{
/* Note that the vector reported by the SRM PALcode corresponds
to the interrupt mask bits, but we have to manage via the
printk("%s: vector 0x%lx bit 0x%x irq 0x%x\n",
__FUNCTION__, vector, bit, irq);
#endif
- handle_irq(irq, regs);
+ handle_irq(irq);
}
static void __init
};
static void
-takara_device_interrupt(unsigned long vector, struct pt_regs *regs)
+takara_device_interrupt(unsigned long vector)
{
unsigned intstatus;
* despatch an interrupt if it's set.
*/
- if (intstatus & 8) handle_irq(16+3, regs);
- if (intstatus & 4) handle_irq(16+2, regs);
- if (intstatus & 2) handle_irq(16+1, regs);
- if (intstatus & 1) handle_irq(16+0, regs);
+ if (intstatus & 8) handle_irq(16+3);
+ if (intstatus & 4) handle_irq(16+2);
+ if (intstatus & 2) handle_irq(16+1);
+ if (intstatus & 1) handle_irq(16+0);
} else {
- isa_device_interrupt (vector, regs);
+ isa_device_interrupt (vector);
}
}
static void
-takara_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+takara_srm_device_interrupt(unsigned long vector)
{
int irq = (vector - 0x800) >> 4;
- handle_irq(irq, regs);
+ handle_irq(irq);
}
static void __init
}
static void
-titan_device_interrupt(unsigned long vector, struct pt_regs * regs)
+titan_device_interrupt(unsigned long vector)
{
printk("titan_device_interrupt: NOT IMPLEMENTED YET!! \n");
}
static void
-titan_srm_device_interrupt(unsigned long vector, struct pt_regs * regs)
+titan_srm_device_interrupt(unsigned long vector)
{
int irq;
irq = (vector - 0x800) >> 4;
- handle_irq(irq, regs);
+ handle_irq(irq);
}
};
static irqreturn_t
-titan_intr_nop(int irq, void *dev_id, struct pt_regs *regs)
+titan_intr_nop(int irq, void *dev_id)
{
/*
* This is a NOP interrupt handler for the purposes of
}
void
-titan_dispatch_irqs(u64 mask, struct pt_regs *regs)
+titan_dispatch_irqs(u64 mask)
{
unsigned long vector;
vector = 0x900 + (vector << 4); /* convert to SRM vector */
/* dispatch it */
- alpha_mv.device_interrupt(vector, regs);
+ alpha_mv.device_interrupt(vector);
}
}
}
static void
-wildfire_device_interrupt(unsigned long vector, struct pt_regs * regs)
+wildfire_device_interrupt(unsigned long vector)
{
int irq;
* bits 5-0: irq in PCA
*/
- handle_irq(irq, regs);
+ handle_irq(irq);
return;
}
* timer_interrupt() needs to keep up the real-time clock,
* as well as call the "do_timer()" routine every clocktick
*/
-irqreturn_t timer_interrupt(int irq, void *dev, struct pt_regs * regs)
+irqreturn_t timer_interrupt(int irq, void *dev)
{
unsigned long delta;
__u32 now;
#ifndef CONFIG_SMP
/* Not SMP, do kernel PC profiling here. */
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
#endif
write_seqlock(&xtime_lock);
while (nticks > 0) {
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
nticks--;
}
*/
asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
{
+ struct pt_regs *old_regs = set_irq_regs(regs);
struct irqdesc *desc = irq_desc + irq;
/*
irq_enter();
- set_irq_regs(regs);
desc_handle_irq(irq, desc);
/* AT91 specific workaround */
irq_finish(irq);
irq_exit();
+ set_irq_regs(old_regs);
}
void set_irq_flags(unsigned int irq, unsigned int iflags)
}
EXPORT_SYMBOL(__ioremap);
-void __iounmap(void __iomem *addr)
+void __iounmap(volatile void __iomem *addr)
{
#ifndef CONFIG_SMP
struct vm_struct **p, *tmp;
#endif
unsigned int section_mapping = 0;
- addr = (void __iomem *)(PAGE_MASK & (unsigned long)addr);
+ addr = (volatile void __iomem *)(PAGE_MASK & (unsigned long)addr);
#ifndef CONFIG_SMP
/*
#endif
if (!section_mapping)
- vunmap(addr);
+ vunmap((void __force *)addr);
}
EXPORT_SYMBOL(__iounmap);
BUG_ON((unsigned)irq >= NR_IRQ_VECTORS);
- if (IO_APIC_VECTOR(irq) > 0)
- return IO_APIC_VECTOR(irq);
+ if (irq_vector[irq] > 0)
+ return irq_vector[irq];
current_vector += 8;
if (current_vector == SYSCALL_VECTOR)
}
vector = current_vector;
- IO_APIC_VECTOR(irq) = vector;
+ irq_vector[irq] = vector;
return vector;
}
* operation to prevent an edge-triggered interrupt escaping meanwhile.
* The idea is from Manfred Spraul. --macro
*/
- i = IO_APIC_VECTOR(irq);
+ i = irq_vector[irq];
v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1));
static int ioapic_retrigger_irq(unsigned int irq)
{
- send_IPI_self(IO_APIC_VECTOR(irq));
+ send_IPI_self(irq_vector[irq]);
return 1;
}
*/
for (irq = 0; irq < NR_IRQS ; irq++) {
int tmp = irq;
- if (IO_APIC_IRQ(tmp) && !IO_APIC_VECTOR(tmp)) {
+ if (IO_APIC_IRQ(tmp) && !irq_vector[tmp]) {
/*
* Hmm.. We don't have an entry for this,
* so default to an old-fashioned 8259
}
dev = temp_dev;
if (irq >= 0) {
-#ifdef CONFIG_PCI_MSI
- if (!platform_legacy_irq(irq))
- irq = IO_APIC_VECTOR(irq);
-#endif
printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
pci_name(dev), 'A' + pin, irq);
dev->irq = irq;
static int simeth_tx(struct sk_buff *skb, struct net_device *dev);
static int simeth_rx(struct net_device *dev);
static struct net_device_stats *simeth_get_stats(struct net_device *dev);
-static irqreturn_t simeth_interrupt(int irq, void *dev_id, struct pt_regs * regs);
+static irqreturn_t simeth_interrupt(int irq, void *dev_id);
static void set_multicast_list(struct net_device *dev);
static int simeth_device_event(struct notifier_block *this,unsigned long event, void *ptr);
* Interrupt handler (Yes, we can do it too !!!)
*/
static irqreturn_t
-simeth_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+simeth_interrupt(int irq, void *dev_id)
{
struct net_device *dev = dev_id;
#endif
}
-static void receive_chars(struct tty_struct *tty, struct pt_regs *regs)
+static void receive_chars(struct tty_struct *tty)
{
unsigned char ch;
static unsigned char seen_esc = 0;
ch = ia64_ssc(0, 0, 0, 0,
SSC_GETCHAR);
while (!ch);
- handle_sysrq(ch, regs, NULL);
+ handle_sysrq(ch, NULL);
}
#endif
seen_esc = 0;
/*
* This is the serial driver's interrupt routine for a single port
*/
-static irqreturn_t rs_interrupt_single(int irq, void *dev_id, struct pt_regs * regs)
+static irqreturn_t rs_interrupt_single(int irq, void *dev_id)
{
struct async_struct * info;
* pretty simple in our case, because we only get interrupts
* on inbound traffic
*/
- receive_chars(info->tty, regs);
+ receive_chars(info->tty);
return IRQ_HANDLED;
}
{
unsigned long flags;
int retval=0;
- irqreturn_t (*handler)(int, void *, struct pt_regs *);
+ irqreturn_t (*handler)(int, void *);
struct serial_state *state= info->state;
unsigned long page;
void hubiio_crb_error_handler(struct hubdev_info *hubdev_info);
extern void bte_crb_error_handler(cnodeid_t, int, int, ioerror_t *,
int);
-static irqreturn_t hub_eint_handler(int irq, void *arg, struct pt_regs *ep)
+static irqreturn_t hub_eint_handler(int irq, void *arg)
{
struct hubdev_info *hubdev_info;
struct ia64_sal_retval ret_stuff;
*/
void hub_error_init(struct hubdev_info *hubdev_info)
{
- if (request_irq(SGI_II_ERROR, (void *)hub_eint_handler, IRQF_SHARED,
+ if (request_irq(SGI_II_ERROR, hub_eint_handler, IRQF_SHARED,
"SN_hub_error", (void *)hubdev_info))
printk("hub_error_init: Failed to request_irq for 0x%p\n",
hubdev_info);
* Notify the heartbeat check thread that an IRQ has been received.
*/
static irqreturn_t
-xpc_act_IRQ_handler(int irq, void *dev_id, struct pt_regs *regs)
+xpc_act_IRQ_handler(int irq, void *dev_id)
{
atomic_inc(&xpc_act_IRQ_rcvd);
wake_up_interruptible(&xpc_act_IRQ_wq);
* irq - Interrupt ReQuest number. NOT USED.
*
* dev_id - partid of IPI's potential sender.
- *
- * regs - processor's context before the processor entered
- * interrupt code. NOT USED.
*/
irqreturn_t
-xpc_notify_IRQ_handler(int irq, void *dev_id, struct pt_regs *regs)
+xpc_notify_IRQ_handler(int irq, void *dev_id)
{
partid_t partid = (partid_t) (u64) dev_id;
struct xpc_partition *part = &xpc_partitions[partid];
* bridge sends an error interrupt.
*/
static irqreturn_t
-pcibr_error_intr_handler(int irq, void *arg, struct pt_regs *regs)
+pcibr_error_intr_handler(int irq, void *arg)
{
struct pcibus_info *soft = (struct pcibus_info *)arg;
/*
* register the bridge's error interrupt handler
*/
- if (request_irq(SGI_PCIASIC_ERROR, (void *)pcibr_error_intr_handler,
+ if (request_irq(SGI_PCIASIC_ERROR, pcibr_error_intr_handler,
IRQF_SHARED, "PCIBR error", (void *)(soft))) {
printk(KERN_WARNING
"pcibr cannot allocate interrupt for error handler\n");
*/
asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs)
{
+ struct pt_regs *old_regs;
+ old_regs = set_irq_regs(regs);
irq_enter();
#ifdef CONFIG_DEBUG_STACKOVERFLOW
/* FIXME M32R */
#endif
- __do_IRQ(irq, regs);
+ __do_IRQ(irq);
irq_exit();
+ set_irq_regs(old_regs);
return 1;
}
void smp_send_timer(void);
void smp_ipi_timer_interrupt(struct pt_regs *);
-void smp_local_timer_interrupt(struct pt_regs *);
+void smp_local_timer_interrupt(void);
void send_IPI_allbutself(int, int);
static void send_IPI_mask(cpumask_t, int, int);
*==========================================================================*/
void smp_ipi_timer_interrupt(struct pt_regs *regs)
{
+ struct pt_regs *old_regs;
+ old_regs = set_irq_regs(regs);
irq_enter();
- smp_local_timer_interrupt(regs);
+ smp_local_timer_interrupt();
irq_exit();
+ set_irq_regs(old_regs);
}
/*==========================================================================*
* ---------- --- --------------------------------------------------------
* 2003-06-24 hy use per_cpu structure.
*==========================================================================*/
-void smp_local_timer_interrupt(struct pt_regs *regs)
+void smp_local_timer_interrupt(void)
{
- int user = user_mode(regs);
+ int user = user_mode(get_irq_regs());
int cpu_id = smp_processor_id();
/*
* useful with a profiling multiplier != 1
*/
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
if (--per_cpu(prof_counter, cpu_id) <= 0) {
/*
#ifdef CONFIG_SMP
extern void send_IPI_allbutself(int, int);
-extern void smp_local_timer_interrupt(struct pt_regs *);
+extern void smp_local_timer_interrupt(void);
#endif
#define TICK_SIZE (tick_nsec / 1000)
* timer_interrupt() needs to keep up the real-time clock,
* as well as call the "do_timer()" routine every clocktick
*/
-irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t timer_interrupt(int irq, void *dev_id)
{
#ifndef CONFIG_SMP
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
#endif
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
/*
* If we have an externally synchronized Linux clock, then update
a hack, so don't look closely for now.. */
#ifdef CONFIG_SMP
- smp_local_timer_interrupt(regs);
+ smp_local_timer_interrupt();
smp_send_timer();
#endif
static void amiga_enable_irq(unsigned int irq);
static void amiga_disable_irq(unsigned int irq);
-static irqreturn_t ami_int1(int irq, void *dev_id, struct pt_regs *fp);
-static irqreturn_t ami_int3(int irq, void *dev_id, struct pt_regs *fp);
-static irqreturn_t ami_int4(int irq, void *dev_id, struct pt_regs *fp);
-static irqreturn_t ami_int5(int irq, void *dev_id, struct pt_regs *fp);
+static irqreturn_t ami_int1(int irq, void *dev_id);
+static irqreturn_t ami_int3(int irq, void *dev_id);
+static irqreturn_t ami_int4(int irq, void *dev_id);
+static irqreturn_t ami_int5(int irq, void *dev_id);
static struct irq_controller amiga_irq_controller = {
.name = "amiga",
* The builtin Amiga hardware interrupt handlers.
*/
-static irqreturn_t ami_int1(int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t ami_int1(int irq, void *dev_id)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if serial transmit buffer empty, interrupt */
if (ints & IF_TBE) {
amiga_custom.intreq = IF_TBE;
- m68k_handle_int(IRQ_AMIGA_TBE, fp);
+ m68k_handle_int(IRQ_AMIGA_TBE);
}
/* if floppy disk transfer complete, interrupt */
if (ints & IF_DSKBLK) {
amiga_custom.intreq = IF_DSKBLK;
- m68k_handle_int(IRQ_AMIGA_DSKBLK, fp);
+ m68k_handle_int(IRQ_AMIGA_DSKBLK);
}
/* if software interrupt set, interrupt */
if (ints & IF_SOFT) {
amiga_custom.intreq = IF_SOFT;
- m68k_handle_int(IRQ_AMIGA_SOFT, fp);
+ m68k_handle_int(IRQ_AMIGA_SOFT);
}
return IRQ_HANDLED;
}
-static irqreturn_t ami_int3(int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t ami_int3(int irq, void *dev_id)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if a blitter interrupt */
if (ints & IF_BLIT) {
amiga_custom.intreq = IF_BLIT;
- m68k_handle_int(IRQ_AMIGA_BLIT, fp);
+ m68k_handle_int(IRQ_AMIGA_BLIT);
}
/* if a copper interrupt */
if (ints & IF_COPER) {
amiga_custom.intreq = IF_COPER;
- m68k_handle_int(IRQ_AMIGA_COPPER, fp);
+ m68k_handle_int(IRQ_AMIGA_COPPER);
}
/* if a vertical blank interrupt */
if (ints & IF_VERTB) {
amiga_custom.intreq = IF_VERTB;
- m68k_handle_int(IRQ_AMIGA_VERTB, fp);
+ m68k_handle_int(IRQ_AMIGA_VERTB);
}
return IRQ_HANDLED;
}
-static irqreturn_t ami_int4(int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t ami_int4(int irq, void *dev_id)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if audio 0 interrupt */
if (ints & IF_AUD0) {
amiga_custom.intreq = IF_AUD0;
- m68k_handle_int(IRQ_AMIGA_AUD0, fp);
+ m68k_handle_int(IRQ_AMIGA_AUD0);
}
/* if audio 1 interrupt */
if (ints & IF_AUD1) {
amiga_custom.intreq = IF_AUD1;
- m68k_handle_int(IRQ_AMIGA_AUD1, fp);
+ m68k_handle_int(IRQ_AMIGA_AUD1);
}
/* if audio 2 interrupt */
if (ints & IF_AUD2) {
amiga_custom.intreq = IF_AUD2;
- m68k_handle_int(IRQ_AMIGA_AUD2, fp);
+ m68k_handle_int(IRQ_AMIGA_AUD2);
}
/* if audio 3 interrupt */
if (ints & IF_AUD3) {
amiga_custom.intreq = IF_AUD3;
- m68k_handle_int(IRQ_AMIGA_AUD3, fp);
+ m68k_handle_int(IRQ_AMIGA_AUD3);
}
return IRQ_HANDLED;
}
-static irqreturn_t ami_int5(int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t ami_int5(int irq, void *dev_id)
{
unsigned short ints = amiga_custom.intreqr & amiga_custom.intenar;
/* if serial receive buffer full interrupt */
if (ints & IF_RBF) {
/* acknowledge of IF_RBF must be done by the serial interrupt */
- m68k_handle_int(IRQ_AMIGA_RBF, fp);
+ m68k_handle_int(IRQ_AMIGA_RBF);
}
/* if a disk sync interrupt */
if (ints & IF_DSKSYN) {
amiga_custom.intreq = IF_DSKSYN;
- m68k_handle_int(IRQ_AMIGA_DSKSYN, fp);
+ m68k_handle_int(IRQ_AMIGA_DSKSYN);
}
return IRQ_HANDLED;
}
return old;
}
-static irqreturn_t cia_handler(int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t cia_handler(int irq, void *dev_id)
{
struct ciabase *base = (struct ciabase *)dev_id;
int mach_irq;
amiga_custom.intreq = base->int_mask;
for (; ints; mach_irq++, ints >>= 1) {
if (ints & 1)
- m68k_handle_int(mach_irq, fp);
+ m68k_handle_int(mach_irq);
}
return IRQ_HANDLED;
}
extern char m68k_debug_device[];
-static void amiga_sched_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
+static void amiga_sched_init(irqreturn_t (*handler)(int, void *));
/* amiga specific irq functions */
extern void amiga_init_IRQ (void);
static void amiga_get_model(char *model);
static unsigned short jiffy_ticks;
-static void __init amiga_sched_init(irqreturn_t (*timer_routine)(int, void *,
- struct pt_regs *))
+static void __init amiga_sched_init(irqreturn_t (*timer_routine)(int, void *))
{
static struct resource sched_res = {
.name = "timer", .start = 0x00bfd400, .end = 0x00bfd5ff,
u_long timer_physaddr;
u_long apollo_model;
-extern void dn_sched_init(irqreturn_t (*handler)(int,void *,struct pt_regs *));
+extern void dn_sched_init(irqreturn_t (*handler)(int,void *));
extern void dn_init_IRQ(void);
extern unsigned long dn_gettimeoffset(void);
extern int dn_dummy_hwclk(int, struct rtc_time *);
#ifdef CONFIG_HEARTBEAT
static void dn_heartbeat(int on);
#endif
-static irqreturn_t dn_timer_int(int irq,void *, struct pt_regs *);
+static irqreturn_t dn_timer_int(int irq,void *);
static void dn_get_model(char *model);
static const char *apollo_models[] = {
[APOLLO_DN3000-APOLLO_DN3000] = "DN3000 (Otter)",
}
-irqreturn_t dn_timer_int(int irq, void *dev_id, struct pt_regs *fp)
+irqreturn_t dn_timer_int(int irq, void *dev_id)
{
- irqreturn_t (*timer_handler)(int, void *, struct pt_regs *) = dev_id;
+ irqreturn_t (*timer_handler)(int, void *) = dev_id;
volatile unsigned char x;
- timer_handler(irq, dev_id, fp);
+ timer_handler(irq, dev_id);
x=*(volatile unsigned char *)(timer+3);
x=*(volatile unsigned char *)(timer+5);
return IRQ_HANDLED;
}
-void dn_sched_init(irqreturn_t (*timer_routine)(int, void *, struct pt_regs *)) {
-
+void dn_sched_init(irqreturn_t (*timer_routine)(int, void *))
+{
/* program timer 1 */
*(volatile unsigned char *)(timer+3)=0x01;
*(volatile unsigned char *)(timer+1)=0x40;
void dn_process_int(unsigned int irq, struct pt_regs *fp)
{
- m68k_handle_int(irq, fp);
+ __m68k_handle_int(irq, fp);
*(volatile unsigned char *)(pica)=0x20;
*(volatile unsigned char *)(picb)=0x20;
#endif
/* atari specific timer functions (in time.c) */
-extern void atari_sched_init(irqreturn_t (*)(int, void *, struct pt_regs *));
+extern void atari_sched_init(irqreturn_t (*)(int, void *));
extern unsigned long atari_gettimeoffset (void);
extern int atari_mste_hwclk (int, struct rtc_time *);
extern int atari_tt_hwclk (int, struct rtc_time *);
static int stdma_locked; /* the semaphore */
/* int func to be called */
-static irqreturn_t (*stdma_isr)(int, void *, struct pt_regs *);
+static irqreturn_t (*stdma_isr)(int, void *);
static void *stdma_isr_data; /* data passed to isr */
static DECLARE_WAIT_QUEUE_HEAD(stdma_wait); /* wait queue for ST-DMA */
/***************************** Prototypes *****************************/
-static irqreturn_t stdma_int (int irq, void *dummy, struct pt_regs *fp);
+static irqreturn_t stdma_int (int irq, void *dummy);
/************************* End of Prototypes **************************/
*
*/
-void stdma_lock(irqreturn_t (*handler)(int, void *, struct pt_regs *),
- void *data)
+void stdma_lock(irqreturn_t (*handler)(int, void *), void *data)
{
unsigned long flags;
*
*/
-static irqreturn_t stdma_int(int irq, void *dummy, struct pt_regs *fp)
+static irqreturn_t stdma_int(int irq, void *dummy)
{
if (stdma_isr)
- (*stdma_isr)(irq, stdma_isr_data, fp);
+ (*stdma_isr)(irq, stdma_isr_data);
return IRQ_HANDLED;
}
#include <asm/atariints.h>
void __init
-atari_sched_init(irqreturn_t (*timer_routine)(int, void *, struct pt_regs *))
+atari_sched_init(irqreturn_t (*timer_routine)(int, void *))
{
/* set Timer C data Register */
mfp.tim_dt_c = INT_TICKS;
static void bvme6000_get_model(char *model);
static int bvme6000_get_hardware_list(char *buffer);
-extern void bvme6000_sched_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
+extern void bvme6000_sched_init(irqreturn_t (*handler)(int, void *));
extern unsigned long bvme6000_gettimeoffset (void);
extern int bvme6000_hwclk (int, struct rtc_time *);
extern int bvme6000_set_clock_mmss (unsigned long);
/* Save tick handler routine pointer, will point to do_timer() in
* kernel/sched.c, called via bvme6000_process_int() */
-static irqreturn_t (*tick_handler)(int, void *, struct pt_regs *);
+static irqreturn_t (*tick_handler)(int, void *);
int bvme6000_parse_bootinfo(const struct bi_record *bi)
}
-irqreturn_t bvme6000_abort_int (int irq, void *dev_id, struct pt_regs *fp)
+irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
{
unsigned long *new = (unsigned long *)vectors;
unsigned long *old = (unsigned long *)0xf8000000;
}
-static irqreturn_t bvme6000_timer_int (int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
{
volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
unsigned char msr = rtc->msr & 0xc0;
rtc->msr = msr | 0x20; /* Ack the interrupt */
- return tick_handler(irq, dev_id, fp);
+ return tick_handler(irq, dev_id);
}
/*
* so divide by 8 to get the microsecond result.
*/
-void bvme6000_sched_init (irqreturn_t (*timer_routine)(int, void *, struct pt_regs *))
+void bvme6000_sched_init (irqreturn_t (*timer_routine)(int, void *))
{
volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
unsigned char msr = rtc->msr & 0xc0;
#define INTVAL ((10000 / 4) - 1)
-static irqreturn_t hp300_tick(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t hp300_tick(int irq, void *dev_id)
{
unsigned long tmp;
- irqreturn_t (*vector)(int, void *, struct pt_regs *) = dev_id;
+ irqreturn_t (*vector)(int, void *) = dev_id;
in_8(CLOCKBASE + CLKSR);
asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
/* Turn off the network and SCSI leds */
blinken_leds(0, 0xe0);
- return vector(irq, NULL, regs);
+ return vector(irq, NULL);
}
unsigned long hp300_gettimeoffset(void)
return (USECS_PER_JIFFY * ticks) / INTVAL;
}
-void __init hp300_sched_init(irqreturn_t (*vector)(int, void *, struct pt_regs *))
+void __init hp300_sched_init(irqreturn_t (*vector)(int, void *))
{
out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
out_8(CLOCKBASE + CLKCR1, 0x1); /* reset */
-extern void hp300_sched_init(irqreturn_t (*vector)(int, void *, struct pt_regs *));
+extern void hp300_sched_init(irqreturn_t (*vector)(int, void *));
extern unsigned long hp300_gettimeoffset (void);
endif
extra-y += vmlinux.lds
-obj-y := entry.o process.o traps.o ints.o dma.o signal.o ptrace.o \
+obj-y := entry.o process.o traps.o ints.o signal.o ptrace.o \
sys_m68k.o time.o semaphore.o setup.o m68k_ksyms.o
obj-$(CONFIG_PCI) += bios32.o
obj-$(CONFIG_MODULES) += module.o
+obj-y$(CONFIG_MMU_SUN3) += dma.o # no, it's not a typo
EXTRA_AFLAGS := -traditional
movel %sp,%sp@-
movel %d0,%sp@- | put vector # on stack
auto_irqhandler_fixup = . + 2
- jsr m68k_handle_int | process the IRQ
+ jsr __m68k_handle_int | process the IRQ
addql #8,%sp | pop parameters off stack
ret_from_interrupt:
movel %sp,%sp@-
movel %d0,%sp@- | put vector # on stack
user_irqhandler_fixup = . + 2
- jsr m68k_handle_int | process the IRQ
+ jsr __m68k_handle_int | process the IRQ
addql #8,%sp | pop parameters off stack
subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
#include <asm/page.h>
#include <asm/machdep.h>
#include <asm/cacheflush.h>
+#include <asm/irq_regs.h>
#ifdef CONFIG_Q40
#include <asm/q40ints.h>
* @handler: called from auto vector interrupts
*
* setup the handler to be called from auto vector interrupts instead of the
- * standard m68k_handle_int(), it will be called with irq numbers in the range
+ * standard __m68k_handle_int(), it will be called with irq numbers in the range
* from IRQ_AUTO_1 - IRQ_AUTO_7.
*/
void __init m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_regs *))
* setup user vector interrupts, this includes activating the specified range
* of interrupts, only then these interrupts can be requested (note: this is
* different from auto vector interrupts). An optional handler can be installed
- * to be called instead of the default m68k_handle_int(), it will be called
+ * to be called instead of the default __m68k_handle_int(), it will be called
* with irq numbers starting from IRQ_USER.
*/
void __init m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt,
}
int request_irq(unsigned int irq,
- irqreturn_t (*handler) (int, void *, struct pt_regs *),
+ irqreturn_t (*handler) (int, void *),
unsigned long flags, const char *devname, void *dev_id)
{
struct irq_node *node;
EXPORT_SYMBOL(irq_canonicalize);
-asmlinkage void m68k_handle_int(unsigned int irq, struct pt_regs *regs)
+asmlinkage void m68k_handle_int(unsigned int irq)
{
struct irq_node *node;
-
kstat_cpu(0).irqs[irq]++;
node = irq_list[irq];
do {
- node->handler(irq, node->dev_id, regs);
+ node->handler(irq, node->dev_id);
node = node->next;
} while (node);
}
+asmlinkage void __m68k_handle_int(unsigned int irq, struct pt_regs *regs)
+{
+ struct pt_regs *old_regs;
+ old_regs = set_irq_regs(regs);
+ m68k_handle_int(irq);
+ set_irq_regs(old_regs);
+}
+
asmlinkage void handle_badint(struct pt_regs *regs)
{
kstat_cpu(0).irqs[0]++;
char m68k_debug_device[6] = "";
-void (*mach_sched_init) (irqreturn_t (*handler)(int, void *, struct pt_regs *)) __initdata = NULL;
+void (*mach_sched_init) (irqreturn_t (*handler)(int, void *)) __initdata = NULL;
/* machine dependent irq functions */
void (*mach_init_IRQ) (void) __initdata = NULL;
void (*mach_get_model) (char *model);
#include <asm/machdep.h>
#include <asm/io.h>
+#include <asm/irq_regs.h>
#include <linux/time.h>
#include <linux/timex.h>
* timer_interrupt() needs to keep up the real-time clock,
* as well as call the "do_timer()" routine every clocktick
*/
-static irqreturn_t timer_interrupt(int irq, void *dummy, struct pt_regs * regs)
+static irqreturn_t timer_interrupt(int irq, void *dummy)
{
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
#ifdef CONFIG_HEARTBEAT
/* use power LED as a heartbeat instead -- much more useful
int baboon_present,baboon_active;
volatile struct baboon *baboon;
-irqreturn_t baboon_irq(int, void *, struct pt_regs *);
+irqreturn_t baboon_irq(int, void *);
#if 0
extern int macide_ack_intr(struct ata_channel *);
* Baboon interrupt handler. This works a lot like a VIA.
*/
-irqreturn_t baboon_irq(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t baboon_irq(int irq, void *dev_id)
{
int irq_bit,i;
unsigned char events;
for (i = 0, irq_bit = 1 ; i < 3 ; i++, irq_bit <<= 1) {
if (events & irq_bit/* & baboon_active*/) {
baboon_active &= ~irq_bit;
- m68k_handle_int(IRQ_BABOON_0 + i, regs);
+ m68k_handle_int(IRQ_BABOON_0 + i);
baboon_active |= irq_bit;
baboon->mb_ifr &= ~irq_bit;
}
extern void iop_preinit(void);
extern void iop_init(void);
extern void via_init(void);
-extern void via_init_clock(irqreturn_t (*func)(int, void *, struct pt_regs *));
+extern void via_init_clock(irqreturn_t (*func)(int, void *));
extern void via_flush_cache(void);
extern void oss_init(void);
extern void psc_init(void);
static void mac_get_model(char *str);
-static void mac_sched_init(irqreturn_t (*vector)(int, void *, struct pt_regs *))
+static void mac_sched_init(irqreturn_t (*vector)(int, void *))
{
via_init_clock(vector);
}
struct listener {
const char *devname;
- void (*handler)(struct iop_msg *, struct pt_regs *);
+ void (*handler)(struct iop_msg *);
};
/*
static struct iop_msg *iop_send_queue[NUM_IOPS][NUM_IOP_CHAN];
static struct listener iop_listeners[NUM_IOPS][NUM_IOP_CHAN];
-irqreturn_t iop_ism_irq(int, void *, struct pt_regs *);
+irqreturn_t iop_ism_irq(int, void *);
extern void oss_irq_enable(int);
*/
int iop_listen(uint iop_num, uint chan,
- void (*handler)(struct iop_msg *, struct pt_regs *),
+ void (*handler)(struct iop_msg *),
const char *devname)
{
if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
* has gone into the IOP_MSG_COMPLETE state.
*/
-static void iop_handle_send(uint iop_num, uint chan, struct pt_regs *regs)
+static void iop_handle_send(uint iop_num, uint chan)
{
volatile struct mac_iop *iop = iop_base[iop_num];
struct iop_msg *msg,*msg2;
for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
msg->reply[i] = iop_readb(iop, offset);
}
- if (msg->handler) (*msg->handler)(msg, regs);
+ if (msg->handler) (*msg->handler)(msg);
msg2 = msg;
msg = msg->next;
iop_free_msg(msg2);
* gone into the IOP_MSG_NEW state.
*/
-static void iop_handle_recv(uint iop_num, uint chan, struct pt_regs *regs)
+static void iop_handle_recv(uint iop_num, uint chan)
{
volatile struct mac_iop *iop = iop_base[iop_num];
int i,offset;
/* the message ourselves to avoid possible stalls. */
if (msg->handler) {
- (*msg->handler)(msg, regs);
+ (*msg->handler)(msg);
} else {
#ifdef DEBUG_IOP
printk("iop_handle_recv: unclaimed message on iop %d channel %d\n", iop_num, chan);
int iop_send_message(uint iop_num, uint chan, void *privdata,
uint msg_len, __u8 *msg_data,
- void (*handler)(struct iop_msg *, struct pt_regs *))
+ void (*handler)(struct iop_msg *))
{
struct iop_msg *msg, *q;
* Handle an ISM IOP interrupt
*/
-irqreturn_t iop_ism_irq(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t iop_ism_irq(int irq, void *dev_id)
{
uint iop_num = (uint) dev_id;
volatile struct mac_iop *iop = iop_base[iop_num];
printk(" %02X", state);
#endif
if (state == IOP_MSG_COMPLETE) {
- iop_handle_send(iop_num, i, regs);
+ iop_handle_send(iop_num, i);
}
}
#ifdef DEBUG_IOP
printk(" %02X", state);
#endif
if (state == IOP_MSG_NEW) {
- iop_handle_recv(iop_num, i, regs);
+ iop_handle_recv(iop_num, i);
}
}
#ifdef DEBUG_IOP
#include <asm/hwtest.h>
#include <asm/errno.h>
#include <asm/macints.h>
+#include <asm/irq_regs.h>
#define DEBUG_SPURIOUS
#define SHUTUP_SONIC
* console_loglevel determines NMI handler function
*/
-irqreturn_t mac_nmi_handler(int, void *, struct pt_regs *);
-irqreturn_t mac_debug_handler(int, void *, struct pt_regs *);
+irqreturn_t mac_nmi_handler(int, void *);
+irqreturn_t mac_debug_handler(int, void *);
/* #define DEBUG_MACINTS */
static int num_debug[8];
-irqreturn_t mac_debug_handler(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t mac_debug_handler(int irq, void *dev_id)
{
if (num_debug[irq] < 10) {
printk("DEBUG: Unexpected IRQ %d\n", irq);
static int in_nmi;
static volatile int nmi_hold;
-irqreturn_t mac_nmi_handler(int irq, void *dev_id, struct pt_regs *fp)
+irqreturn_t mac_nmi_handler(int irq, void *dev_id)
{
int i;
/*
if (console_loglevel >= 8) {
#if 0
+ struct pt_regs *fp = get_irq_regs();
show_state();
printk("PC: %08lx\nSR: %04x SP: %p\n", fp->pc, fp->sr, fp);
printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
* here is cleaner than hacking it into drivers/char/macserial.c.
*/
-void mac_scc_dispatch(int irq, void *dev_id, struct pt_regs *regs)
+void mac_scc_dispatch(int irq, void *dev_id)
{
volatile unsigned char *scc = (unsigned char *) mac_bi_data.sccbase + 2;
unsigned char reg;
/* pretty much kill the system. */
if (reg & 0x38)
- m68k_handle_int(IRQ_SCCA, regs);
+ m68k_handle_int(IRQ_SCCA);
if (reg & 0x07)
- m68k_handle_int(IRQ_SCCB, regs);
+ m68k_handle_int(IRQ_SCCB);
}
int oss_present;
volatile struct mac_oss *oss;
-irqreturn_t oss_irq(int, void *, struct pt_regs *);
-irqreturn_t oss_nubus_irq(int, void *, struct pt_regs *);
+irqreturn_t oss_irq(int, void *);
+irqreturn_t oss_nubus_irq(int, void *);
-extern irqreturn_t via1_irq(int, void *, struct pt_regs *);
-extern irqreturn_t mac_scc_dispatch(int, void *, struct pt_regs *);
+extern irqreturn_t via1_irq(int, void *);
+extern irqreturn_t mac_scc_dispatch(int, void *);
/*
* Initialize the OSS
* and SCSI; everything else is routed to its own autovector IRQ.
*/
-irqreturn_t oss_irq(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t oss_irq(int irq, void *dev_id)
{
int events;
oss->irq_pending &= ~OSS_IP_SOUND;
} else if (events & OSS_IP_SCSI) {
oss->irq_level[OSS_SCSI] = OSS_IRQLEV_DISABLED;
- m68k_handle_int(IRQ_MAC_SCSI, regs);
+ m68k_handle_int(IRQ_MAC_SCSI);
oss->irq_pending &= ~OSS_IP_SCSI;
oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
} else {
* Unlike the VIA/RBV this is on its own autovector interrupt level.
*/
-irqreturn_t oss_nubus_irq(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t oss_nubus_irq(int irq, void *dev_id)
{
int events, irq_bit, i;
for (i = 0, irq_bit = 1 ; i < 6 ; i++, irq_bit <<= 1) {
if (events & irq_bit) {
oss->irq_level[i] = OSS_IRQLEV_DISABLED;
- m68k_handle_int(NUBUS_SOURCE_BASE + i, regs);
+ m68k_handle_int(NUBUS_SOURCE_BASE + i);
oss->irq_pending &= ~irq_bit;
oss->irq_level[i] = OSS_IRQLEV_NUBUS;
}
int psc_present;
volatile __u8 *psc;
-irqreturn_t psc_irq(int, void *, struct pt_regs *);
+irqreturn_t psc_irq(int, void *);
/*
* Debugging dump, used in various places to see what's going on.
* PSC interrupt handler. It's a lot like the VIA interrupt handler.
*/
-irqreturn_t psc_irq(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t psc_irq(int irq, void *dev_id)
{
int pIFR = pIFRbase + ((int) dev_id);
int pIER = pIERbase + ((int) dev_id);
for (i = 0, irq_bit = 1 ; i < 4 ; i++, irq_bit <<= 1) {
if (events & irq_bit) {
psc_write_byte(pIER, irq_bit);
- m68k_handle_int(base_irq + i, regs);
+ m68k_handle_int(base_irq + i);
psc_write_byte(pIFR, irq_bit);
psc_write_byte(pIER, irq_bit | 0x80);
}
static int nubus_active;
void via_debug_dump(void);
-irqreturn_t via1_irq(int, void *, struct pt_regs *);
-irqreturn_t via2_irq(int, void *, struct pt_regs *);
-irqreturn_t via_nubus_irq(int, void *, struct pt_regs *);
+irqreturn_t via1_irq(int, void *);
+irqreturn_t via2_irq(int, void *);
+irqreturn_t via_nubus_irq(int, void *);
void via_irq_enable(int irq);
void via_irq_disable(int irq);
void via_irq_clear(int irq);
-extern irqreturn_t mac_scc_dispatch(int, void *, struct pt_regs *);
+extern irqreturn_t mac_scc_dispatch(int, void *);
extern int oss_present;
/*
* Start the 100 Hz clock
*/
-void __init via_init_clock(irqreturn_t (*func)(int, void *, struct pt_regs *))
+void __init via_init_clock(irqreturn_t (*func)(int, void *))
{
via1[vACR] |= 0x40;
via1[vT1LL] = MAC_CLOCK_LOW;
* the machspec interrupt number after clearing the interrupt.
*/
-irqreturn_t via1_irq(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t via1_irq(int irq, void *dev_id)
{
int irq_bit, i;
unsigned char events, mask;
for (i = 0, irq_bit = 1 ; i < 7 ; i++, irq_bit <<= 1)
if (events & irq_bit) {
via1[vIER] = irq_bit;
- m68k_handle_int(VIA1_SOURCE_BASE + i, regs);
+ m68k_handle_int(VIA1_SOURCE_BASE + i);
via1[vIFR] = irq_bit;
via1[vIER] = irq_bit | 0x80;
}
/* No, it won't be set. that's why we're doing this. */
via_irq_disable(IRQ_MAC_NUBUS);
via_irq_clear(IRQ_MAC_NUBUS);
- m68k_handle_int(IRQ_MAC_NUBUS, regs);
+ m68k_handle_int(IRQ_MAC_NUBUS);
via_irq_enable(IRQ_MAC_NUBUS);
}
#endif
return IRQ_HANDLED;
}
-irqreturn_t via2_irq(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t via2_irq(int irq, void *dev_id)
{
int irq_bit, i;
unsigned char events, mask;
if (events & irq_bit) {
via2[gIER] = irq_bit;
via2[gIFR] = irq_bit | rbv_clear;
- m68k_handle_int(VIA2_SOURCE_BASE + i, regs);
+ m68k_handle_int(VIA2_SOURCE_BASE + i);
via2[gIER] = irq_bit | 0x80;
}
return IRQ_HANDLED;
* VIA2 dispatcher as a fast interrupt handler.
*/
-irqreturn_t via_nubus_irq(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t via_nubus_irq(int irq, void *dev_id)
{
int irq_bit, i;
unsigned char events;
for (i = 0, irq_bit = 1 ; i < 7 ; i++, irq_bit <<= 1) {
if (events & irq_bit) {
via_irq_disable(NUBUS_SOURCE_BASE + i);
- m68k_handle_int(NUBUS_SOURCE_BASE + i, regs);
+ m68k_handle_int(NUBUS_SOURCE_BASE + i);
via_irq_enable(NUBUS_SOURCE_BASE + i);
}
}
static void mvme147_get_model(char *model);
static int mvme147_get_hardware_list(char *buffer);
-extern void mvme147_sched_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
+extern void mvme147_sched_init(irqreturn_t (*handler)(int, void *));
extern unsigned long mvme147_gettimeoffset (void);
extern int mvme147_hwclk (int, struct rtc_time *);
extern int mvme147_set_clock_mmss (unsigned long);
/* Save tick handler routine pointer, will point to do_timer() in
* kernel/sched.c, called via mvme147_process_int() */
-irqreturn_t (*tick_handler)(int, void *, struct pt_regs *);
+irqreturn_t (*tick_handler)(int, void *);
int mvme147_parse_bootinfo(const struct bi_record *bi)
/* Using pcc tick timer 1 */
-static irqreturn_t mvme147_timer_int (int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
{
m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;
m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1;
- return tick_handler(irq, dev_id, fp);
+ return tick_handler(irq, dev_id);
}
-void mvme147_sched_init (irqreturn_t (*timer_routine)(int, void *, struct pt_regs *))
+void mvme147_sched_init (irqreturn_t (*timer_routine)(int, void *))
{
tick_handler = timer_routine;
request_irq (PCC_IRQ_TIMER1, mvme147_timer_int,
static void mvme16x_get_model(char *model);
static int mvme16x_get_hardware_list(char *buffer);
-extern void mvme16x_sched_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
+extern void mvme16x_sched_init(irqreturn_t (*handler)(int, void *));
extern unsigned long mvme16x_gettimeoffset (void);
extern int mvme16x_hwclk (int, struct rtc_time *);
extern int mvme16x_set_clock_mmss (unsigned long);
/* Save tick handler routine pointer, will point to do_timer() in
* kernel/sched.c, called via mvme16x_process_int() */
-static irqreturn_t (*tick_handler)(int, void *, struct pt_regs *);
+static irqreturn_t (*tick_handler)(int, void *);
unsigned short mvme16x_config;
}
}
-static irqreturn_t mvme16x_abort_int (int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
{
p_bdid p = &mvme_bdid;
unsigned long *new = (unsigned long *)vectors;
return IRQ_HANDLED;
}
-static irqreturn_t mvme16x_timer_int (int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
{
*(volatile unsigned char *)0xfff4201b |= 8;
- return tick_handler(irq, dev_id, fp);
+ return tick_handler(irq, dev_id);
}
-void mvme16x_sched_init (irqreturn_t (*timer_routine)(int, void *, struct pt_regs *))
+void mvme16x_sched_init (irqreturn_t (*timer_routine)(int, void *))
{
p_bdid p = &mvme_bdid;
int irq;
extern void q40_init_IRQ (void);
static void q40_get_model(char *model);
static int q40_get_hardware_list(char *buffer);
-extern void q40_sched_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
+extern void q40_sched_init(irqreturn_t (*handler)(int, void *));
extern unsigned long q40_gettimeoffset (void);
extern int q40_hwclk (int, struct rtc_time *);
sound_ticks = ticks << 1;
}
-static irqreturn_t (*q40_timer_routine)(int, void *, struct pt_regs *);
+static irqreturn_t (*q40_timer_routine)(int, void *);
-static irqreturn_t q40_timer_int (int irq, void * dev, struct pt_regs * regs)
+static irqreturn_t q40_timer_int (int irq, void * dev)
{
ql_ticks = ql_ticks ? 0 : 1;
if (sound_ticks) {
}
if (!ql_ticks)
- q40_timer_routine(irq, dev, regs);
+ q40_timer_routine(irq, dev);
return IRQ_HANDLED;
}
-void q40_sched_init (irqreturn_t (*timer_routine)(int, void *, struct pt_regs *))
+void q40_sched_init (irqreturn_t (*timer_routine)(int, void *))
{
int timer_irq;
switch (irq) {
case 4:
case 6:
- m68k_handle_int(Q40_IRQ_SAMPLE, fp);
+ __m68k_handle_int(Q40_IRQ_SAMPLE, fp);
return;
}
if (mir & Q40_IRQ_FRAME_MASK) {
- m68k_handle_int(Q40_IRQ_FRAME, fp);
+ __m68k_handle_int(Q40_IRQ_FRAME, fp);
master_outb(-1, FRAME_CLEAR_REG);
}
if ((mir & Q40_IRQ_SER_MASK) || (mir & Q40_IRQ_EXT_MASK)) {
goto iirq;
}
q40_state[irq] |= IRQ_INPROGRESS;
- m68k_handle_int(irq, fp);
+ __m68k_handle_int(irq, fp);
q40_state[irq] &= ~IRQ_INPROGRESS;
/* naively enable everything, if that fails than */
mir = master_inb(IIRQ_REG);
/* should test whether keyboard irq is really enabled, doing it in defhand */
if (mir & Q40_IRQ_KEYB_MASK)
- m68k_handle_int(Q40_IRQ_KEYBOARD, fp);
+ __m68k_handle_int(Q40_IRQ_KEYBOARD, fp);
return;
}
char sun3_reserved_pmeg[SUN3_PMEGS_NUM];
extern unsigned long sun3_gettimeoffset(void);
-extern void sun3_sched_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
+extern void sun3_sched_init(irqreturn_t (*handler)(int, void *));
extern void sun3_get_model (char* model);
extern void idprom_init (void);
extern int sun3_hwclk(int set, struct rtc_time *t);
sun3_bootmem_alloc(memory_start, memory_end);
}
-void __init sun3_sched_init(irqreturn_t (*timer_routine)(int, void *, struct pt_regs *))
+void __init sun3_sched_init(irqreturn_t (*timer_routine)(int, void *))
{
sun3_disable_interrupts();
intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_DISABLE|INTERSIL_24H_MODE);
#include <asm/intersil.h>
#include <asm/oplib.h>
#include <asm/sun3ints.h>
+#include <asm/irq_regs.h>
#include <linux/seq_file.h>
extern void sun3_leds (unsigned char);
*sun3_intreg &= ~(1 << irq);
}
-static irqreturn_t sun3_int7(int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t sun3_int7(int irq, void *dev_id)
{
*sun3_intreg |= (1 << irq);
if (!(kstat_cpu(0).irqs[irq] % 2000))
return IRQ_HANDLED;
}
-static irqreturn_t sun3_int5(int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t sun3_int5(int irq, void *dev_id)
{
#ifdef CONFIG_SUN3
intersil_clear();
#endif
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(fp));
+ update_process_times(user_mode(get_irq_regs()));
#endif
if (!(kstat_cpu(0).irqs[irq] % 20))
sun3_leds(led_pattern[(kstat_cpu(0).irqs[irq] % 160) / 20]);
return IRQ_HANDLED;
}
-static irqreturn_t sun3_vec255(int irq, void *dev_id, struct pt_regs *fp)
+static irqreturn_t sun3_vec255(int irq, void *dev_id)
{
// intersil_clear();
return IRQ_HANDLED;
{
*sun3_intreg &= ~(1 << irq);
- m68k_handle_int(irq, fp);
+ __m68k_handle_int(irq, fp);
}
static struct irq_controller sun3_irq_controller = {
}
#endif
-void __init sun3x_sched_init(irqreturn_t (*vector)(int, void *, struct pt_regs *))
+void __init sun3x_sched_init(irqreturn_t (*vector)(int, void *))
{
sun3_disable_interrupts();
extern int sun3x_hwclk(int set, struct rtc_time *t);
unsigned long sun3x_gettimeoffset (void);
-void sun3x_sched_init(irqreturn_t (*vector)(int, void *, struct pt_regs *));
+void sun3x_sched_init(irqreturn_t (*vector)(int, void *));
struct mostek_dt {
volatile unsigned char csr;
the option of an MT-enabled processor this option will be the only
option in this menu.
-config MIPS_MT_SMTC
- bool "SMTC: Use all TCs on all VPEs for SMP"
- depends on CPU_MIPS32_R2
- #depends on CPU_MIPS64_R2 # once there is hardware ...
+config MIPS_MT_SMP
+ bool "Use 1 TC on each available VPE for SMP"
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS
select SMP
select SYS_SUPPORTS_SMP
help
- This is a kernel model which is known a SMTC or lately has been
- marketesed into SMVP.
+ This is a kernel model which is also known a VSMP or lately
+ has been marketesed into SMVP.
-config MIPS_MT_SMP
- bool "Use 1 TC on each available VPE for SMP"
+config MIPS_MT_SMTC
+ bool "SMTC: Use all TCs on all VPEs for SMP"
+ depends on CPU_MIPS32_R2
+ #depends on CPU_MIPS64_R2 # once there is hardware ...
depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS
select SMP
select SYS_SUPPORTS_SMP
help
- This is a kernel model which is also known a VSMP or lately
- has been marketesed into SMVP.
+ This is a kernel model which is known a SMTC or lately has been
+ marketesed into SMVP.
config MIPS_VPE_LOADER
bool "VPE loader support."
* Requests the DMA done IRQ if irqhandler != NULL.
*/
int request_au1000_dma(int dev_id, const char *dev_str,
- irqreturn_t (*irqhandler)(int, void *, struct pt_regs *),
+ irqreturn_t (*irqhandler)(int, void *),
unsigned long irqflags,
void *irq_dev_id)
{
extern void set_debug_traps(void);
extern irq_cpustat_t irq_stat [NR_CPUS];
-extern void mips_timer_interrupt(struct pt_regs *regs);
+extern void mips_timer_interrupt(void);
static void setup_local_irq(unsigned int irq, int type, int int_req);
static unsigned int startup_irq(unsigned int irq);
void (*board_init_irq)(void);
-#ifdef CONFIG_PM
-extern irqreturn_t counter0_irq(int irq, void *dev_id, struct pt_regs *regs);
-#endif
-
static DEFINE_SPINLOCK(irq_lock);
};
#ifdef CONFIG_PM
-void startup_match20_interrupt(irqreturn_t (*handler)(int, void *, struct pt_regs *))
+void startup_match20_interrupt(irqreturn_t (*handler)(int, void *))
{
struct irq_desc *desc = &irq_desc[AU1000_TOY_MATCH2_INT];
* intcX_reqX_irqdispatch().
*/
-void intc0_req0_irqdispatch(struct pt_regs *regs)
+static void intc0_req0_irqdispatch(void)
{
int irq = 0;
static unsigned long intc0_req0 = 0;
intc0_req0 |= au_readl(IC0_REQ0INT);
- if (!intc0_req0) return;
+ if (!intc0_req0)
+ return;
#ifdef AU1000_USB_DEV_REQ_INT
/*
* Because of the tight timing of SETUP token to reply
*/
if ((intc0_req0 & (1<<AU1000_USB_DEV_REQ_INT))) {
intc0_req0 &= ~(1<<AU1000_USB_DEV_REQ_INT);
- do_IRQ(AU1000_USB_DEV_REQ_INT, regs);
+ do_IRQ(AU1000_USB_DEV_REQ_INT);
return;
}
#endif
irq = au_ffs(intc0_req0) - 1;
intc0_req0 &= ~(1<<irq);
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
-void intc0_req1_irqdispatch(struct pt_regs *regs)
+static void intc0_req1_irqdispatch(void)
{
int irq = 0;
static unsigned long intc0_req1 = 0;
intc0_req1 |= au_readl(IC0_REQ1INT);
- if (!intc0_req1) return;
+ if (!intc0_req1)
+ return;
irq = au_ffs(intc0_req1) - 1;
intc0_req1 &= ~(1<<irq);
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
* Interrupt Controller 1:
* interrupts 32 - 63
*/
-void intc1_req0_irqdispatch(struct pt_regs *regs)
+static void intc1_req0_irqdispatch(void)
{
int irq = 0;
static unsigned long intc1_req0 = 0;
intc1_req0 |= au_readl(IC1_REQ0INT);
- if (!intc1_req0) return;
+ if (!intc1_req0)
+ return;
irq = au_ffs(intc1_req0) - 1;
intc1_req0 &= ~(1<<irq);
irq += 32;
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
-void intc1_req1_irqdispatch(struct pt_regs *regs)
+static void intc1_req1_irqdispatch(void)
{
int irq = 0;
static unsigned long intc1_req1 = 0;
intc1_req1 |= au_readl(IC1_REQ1INT);
- if (!intc1_req1) return;
+ if (!intc1_req1)
+ return;
irq = au_ffs(intc1_req1) - 1;
intc1_req1 &= ~(1<<irq);
irq += 32;
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
#ifdef CONFIG_PM
}
#endif /* CONFIG_PM */
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
if (pending & CAUSEF_IP7)
- mips_timer_interrupt(regs);
+ mips_timer_interrupt();
else if (pending & CAUSEF_IP2)
- intc0_req0_irqdispatch(regs);
+ intc0_req0_irqdispatch();
else if (pending & CAUSEF_IP3)
- intc0_req1_irqdispatch(regs);
+ intc0_req1_irqdispatch();
else if (pending & CAUSEF_IP4)
- intc1_req0_irqdispatch(regs);
+ intc1_req0_irqdispatch();
else if (pending & CAUSEF_IP5)
- intc1_req1_irqdispatch(regs);
+ intc1_req1_irqdispatch();
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
#include <asm/compiler.h>
#include <asm/mipsregs.h>
-#include <asm/ptrace.h>
#include <asm/time.h>
#include <asm/div64.h>
#include <asm/mach-au1x00/au1000.h>
#error "unsupported HZ value! Must be in [100,1000]"
#endif
#define MATCH20_INC (328*100/HZ) /* magic number 328 is for HZ=100... */
-extern void startup_match20_interrupt(irqreturn_t (*handler)(int, void *, struct pt_regs *));
+extern void startup_match20_interrupt(irqreturn_t (*handler)(int, void *));
static unsigned long last_pc0, last_match20;
#endif
* is provably more robust.
*/
unsigned long wtimer;
-void mips_timer_interrupt(struct pt_regs *regs)
+
+void mips_timer_interrupt(void)
{
int irq = 63;
unsigned long count;
kstat_this_cpu.irqs[irq]++;
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
r4k_cur += r4k_offset;
ack_r4ktimer(r4k_cur);
}
#ifdef CONFIG_PM
-irqreturn_t counter0_irq(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t counter0_irq(int irq, void *dev_id)
{
unsigned long pc0;
int time_elapsed;
while (time_elapsed > 0) {
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
time_elapsed -= MATCH20_INC;
last_match20 += MATCH20_INC;
jiffie_drift -= 999;
do_timer(1); /* increment jiffies by one */
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
}
/* This ISR handles the receive complete and suspend events */
-static void
-req_sus_intr (int irq, void *dev_id, struct pt_regs *regs)
+static void req_sus_intr (int irq, void *dev_id)
{
struct usb_dev *dev = (struct usb_dev *) dev_id;
u32 status;
/* This ISR handles the DMA done events on EP0 */
-static void
-dma_done_ep0_intr(int irq, void *dev_id, struct pt_regs *regs)
+static void dma_done_ep0_intr(int irq, void *dev_id)
{
struct usb_dev *dev = (struct usb_dev *) dev_id;
usbdev_pkt_t* pkt;
}
/* This ISR handles the DMA done events on endpoints 2,3,4,5 */
-static void
-dma_done_ep_intr(int irq, void *dev_id, struct pt_regs *regs)
+static void dma_done_ep_intr(int irq, void *dev_id)
{
struct usb_dev *dev = (struct usb_dev *) dev_id;
int i;
*/
static volatile int pb1200_cascade_en=0;
-irqreturn_t pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
{
unsigned short bisr = bcsr->int_status;
int extirq_nr = 0;
{
extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
/* Ack and dispatch IRQ */
- do_IRQ(extirq_nr,regs);
+ do_IRQ(extirq_nr);
}
+
return IRQ_RETVAL(1);
}
}
/* KGDB interrupt handler */
-asmlinkage void excite_kgdb_inthdl(struct pt_regs *regs)
+asmlinkage void excite_kgdb_inthdl(void)
{
if (unlikely(
((titan_readl(UAIIR) & 0x7) == 4)
static int iodev_release(struct inode *, struct file *);
static ssize_t iodev_read(struct file *, char __user *, size_t s, loff_t *);
static unsigned int iodev_poll(struct file *, struct poll_table_struct *);
-static irqreturn_t iodev_irqhdl(int, void *, struct pt_regs *);
+static irqreturn_t iodev_irqhdl(int, void *);
return misc_deregister(&miscdev);
}
-
-
static int iodev_open(struct inode *i, struct file *f)
{
return request_irq(iodev_irq, iodev_irqhdl, IRQF_DISABLED,
iodev_name, &miscdev);
}
-
-
static int iodev_release(struct inode *i, struct file *f)
{
free_irq(iodev_irq, &miscdev);
return POLLOUT | POLLWRNORM;
}
-
-
-
-static irqreturn_t iodev_irqhdl(int irq, void *ctxt, struct pt_regs *regs)
+static irqreturn_t iodev_irqhdl(int irq, void *ctxt)
{
wake_up(&wq);
+
return IRQ_HANDLED;
}
-
-
static int __init iodev_init_module(void)
{
return driver_register(&iodev_driver);
#endif
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
const u32
interrupts = read_c0_cause() >> 8,
/* process timer interrupt */
if (pending & (1 << TIMER_IRQ)) {
- do_IRQ(TIMER_IRQ, regs);
+ do_IRQ(TIMER_IRQ);
return;
}
#else
if (pending & (1 << USB_IRQ)) {
#endif
- do_IRQ(USB_IRQ, regs);
+ do_IRQ(USB_IRQ);
return;
}
if ((pending & (1 << TITAN_IRQ)) && msgint) {
ocd_writel(msgint, INTP0Clear0 + (TITAN_MSGINT / 0x20 * 0x10));
#if defined(CONFIG_KGDB)
- excite_kgdb_inthdl(regs);
+ excite_kgdb_inthdl();
#endif
- do_IRQ(TITAN_IRQ, regs);
+ do_IRQ(TITAN_IRQ);
return;
}
msgintmask = ocd_readl(INTP0Mask0 + (FPGA0_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (FPGA0_MSGINT % 0x20));
if ((pending & (1 << FPGA0_IRQ)) && msgint) {
- do_IRQ(FPGA0_IRQ, regs);
+ do_IRQ(FPGA0_IRQ);
return;
}
msgintmask = ocd_readl(INTP0Mask0 + (FPGA1_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (FPGA1_MSGINT % 0x20));
if ((pending & (1 << FPGA1_IRQ)) && msgint) {
- do_IRQ(FPGA1_IRQ, regs);
+ do_IRQ(FPGA1_IRQ);
return;
}
msgintmask = ocd_readl(INTP0Mask0 + (PHY_MSGINT / 0x20 * 0x10));
msgint = msgintflags & msgintmask & (0x1 << (PHY_MSGINT % 0x20));
if ((pending & (1 << PHY_IRQ)) && msgint) {
- do_IRQ(PHY_IRQ, regs);
+ do_IRQ(PHY_IRQ);
return;
}
/* Process spurious interrupts */
- spurious_interrupt(regs);
+ spurious_interrupt();
}
#include <asm/i8259.h>
#include <asm/irq_cpu.h>
#include <asm/gt64120.h>
-#include <asm/ptrace.h>
#include <asm/mach-cobalt/cobalt.h>
* 15 - IDE1
*/
-static inline void galileo_irq(struct pt_regs *regs)
+static inline void galileo_irq(void)
{
unsigned int mask, pending, devfn;
if (pending & GALILEO_INTR_T0EXP) {
GALILEO_OUTL(~GALILEO_INTR_T0EXP, GT_INTRCAUSE_OFS);
- do_IRQ(COBALT_GALILEO_IRQ, regs);
+ do_IRQ(COBALT_GALILEO_IRQ);
} else if (pending & GALILEO_INTR_RETRY_CTR) {
}
}
-static inline void via_pic_irq(struct pt_regs *regs)
+static inline void via_pic_irq(void)
{
int irq;
irq = i8259_irq();
if (irq >= 0)
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
- unsigned pending;
-
- pending = read_c0_status() & read_c0_cause();
-
- if (pending & CAUSEF_IP2) /* COBALT_GALILEO_IRQ (18) */
-
- galileo_irq(regs);
-
- else if (pending & CAUSEF_IP6) /* COBALT_VIA_IRQ (22) */
-
- via_pic_irq(regs);
-
- else if (pending & CAUSEF_IP3) /* COBALT_ETH0_IRQ (19) */
-
- do_IRQ(COBALT_CPU_IRQ + 3, regs);
-
- else if (pending & CAUSEF_IP4) /* COBALT_ETH1_IRQ (20) */
-
- do_IRQ(COBALT_CPU_IRQ + 4, regs);
-
- else if (pending & CAUSEF_IP5) /* COBALT_SERIAL_IRQ (21) */
-
- do_IRQ(COBALT_CPU_IRQ + 5, regs);
-
- else if (pending & CAUSEF_IP7) /* IRQ 23 */
-
- do_IRQ(COBALT_CPU_IRQ + 7, regs);
+ unsigned pending = read_c0_status() & read_c0_cause();
+
+ if (pending & CAUSEF_IP2) /* COBALT_GALILEO_IRQ (18) */
+ galileo_irq();
+ else if (pending & CAUSEF_IP6) /* COBALT_VIA_IRQ (22) */
+ via_pic_irq();
+ else if (pending & CAUSEF_IP3) /* COBALT_ETH0_IRQ (19) */
+ do_IRQ(COBALT_CPU_IRQ + 3);
+ else if (pending & CAUSEF_IP4) /* COBALT_ETH1_IRQ (20) */
+ do_IRQ(COBALT_CPU_IRQ + 4);
+ else if (pending & CAUSEF_IP5) /* COBALT_SERIAL_IRQ (21) */
+ do_IRQ(COBALT_CPU_IRQ + 5);
+ else if (pending & CAUSEF_IP7) /* IRQ 23 */
+ do_IRQ(COBALT_CPU_IRQ + 7);
}
static struct irqaction irq_via = {
void __init plat_timer_setup(struct irqaction *irq)
{
- /* Load timer value for 1KHz (TCLK is 50MHz) */
- GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS);
+ /* Load timer value for HZ (TCLK is 50MHz) */
+ GALILEO_OUTL(50*1000*1000 / HZ, GT_TC0_OFS);
/* Enable timer */
GALILEO_OUTL(GALILEO_ENTC0 | GALILEO_SELTC0, GT_TC_CONTROL_OFS);
--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.19-rc1
+# Sun Oct 8 19:03:07 2006
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MIPS_MTX1 is not set
+# CONFIG_MIPS_BOSPORUS is not set
+# CONFIG_MIPS_PB1000 is not set
+# CONFIG_MIPS_PB1100 is not set
+# CONFIG_MIPS_PB1500 is not set
+# CONFIG_MIPS_PB1550 is not set
+# CONFIG_MIPS_PB1200 is not set
+# CONFIG_MIPS_DB1000 is not set
+# CONFIG_MIPS_DB1100 is not set
+# CONFIG_MIPS_DB1500 is not set
+# CONFIG_MIPS_DB1550 is not set
+# CONFIG_MIPS_DB1200 is not set
+# CONFIG_MIPS_MIRAGE is not set
+# CONFIG_BASLER_EXCITE is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+CONFIG_MACH_JAZZ=y
+# CONFIG_LASAT is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MIPS_XXS1500 is not set
+# CONFIG_PNX8550_V2PCI is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_QEMU is not set
+# CONFIG_MARKEINS is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_PTSWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+# CONFIG_TOSHIBA_RBTX4938 is not set
+# CONFIG_ACER_PICA_61 is not set
+# CONFIG_MIPS_MAGNUM_4000 is not set
+CONFIG_OLIVETTI_M700=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_TIME=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARC=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_I8259=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_ARC32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_ARC_MEMORY=y
+CONFIG_ARC_PROMLIB=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32_R1 is not set
+# CONFIG_CPU_MIPS32_R2 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+CONFIG_CPU_R4X00=y
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_SYS_HAS_CPU_R4X00=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_MT_SMTC is not set
+# CONFIG_MIPS_VPE_LOADER is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_HZ_48 is not set
+CONFIG_HZ_100=y
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_100HZ=y
+CONFIG_HZ=100
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_IPC_NS is not set
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_UTS_NS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_RELAY=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Block layer
+#
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_ISA=y
+CONFIG_MMU=y
+CONFIG_I8253=y
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=m
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+CONFIG_NET_KEY=m
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=m
+CONFIG_INET_XFRM_MODE_TUNNEL=m
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_TUNNEL=m
+# CONFIG_IPV6_SUBTREES is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+CONFIG_NETWORK_SECMARK=y
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+CONFIG_NETFILTER_XT_TARGET_SECMARK=m
+# CONFIG_NETFILTER_XT_TARGET_CONNSECMARK is not set
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+# CONFIG_IP_NF_CT_ACCT is not set
+CONFIG_IP_NF_CONNTRACK_MARK=y
+CONFIG_IP_NF_CONNTRACK_SECMARK=y
+CONFIG_IP_NF_CONNTRACK_EVENTS=y
+CONFIG_IP_NF_CONNTRACK_NETLINK=m
+CONFIG_IP_NF_CT_PROTO_SCTP=m
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+# CONFIG_IP_NF_NETBIOS_NS is not set
+CONFIG_IP_NF_TFTP=m
+CONFIG_IP_NF_AMANDA=m
+CONFIG_IP_NF_PPTP=m
+CONFIG_IP_NF_H323=m
+CONFIG_IP_NF_SIP=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_HASHLIMIT=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_TARGET_TCPMSS=m
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_IP_NF_NAT_SNMP_BASIC=m
+CONFIG_IP_NF_NAT_IRC=m
+CONFIG_IP_NF_NAT_FTP=m
+CONFIG_IP_NF_NAT_TFTP=m
+CONFIG_IP_NF_NAT_AMANDA=m
+CONFIG_IP_NF_NAT_PPTP=m
+CONFIG_IP_NF_NAT_H323=m
+CONFIG_IP_NF_NAT_SIP=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_RAW=m
+
+#
+# DECnet: Netfilter Configuration
+#
+CONFIG_DECNET_NF_GRABULATOR=m
+
+#
+# Bridge: Netfilter Configuration
+#
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_LOG=m
+CONFIG_BRIDGE_EBT_ULOG=m
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+# CONFIG_VLAN_8021Q is not set
+CONFIG_DECNET=m
+# CONFIG_DECNET_ROUTER is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CLK_JIFFIES=y
+# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
+# CONFIG_NET_SCH_CLK_CPU is not set
+
+#
+# Queueing/Scheduling
+#
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_INGRESS=m
+
+#
+# Classification
+#
+CONFIG_NET_CLS=y
+CONFIG_NET_CLS_BASIC=m
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+# CONFIG_CLS_U32_PERF is not set
+# CONFIG_CLS_U32_MARK is not set
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_CLS_ACT is not set
+CONFIG_NET_CLS_POLICE=y
+# CONFIG_NET_CLS_IND is not set
+CONFIG_NET_ESTIMATOR=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+CONFIG_HAMRADIO=y
+
+#
+# Packet Radio protocols
+#
+CONFIG_AX25=m
+CONFIG_AX25_DAMA_SLAVE=y
+CONFIG_NETROM=m
+CONFIG_ROSE=m
+
+#
+# AX.25 network device drivers
+#
+CONFIG_MKISS=m
+CONFIG_6PACK=m
+CONFIG_BPQETHER=m
+# CONFIG_BAYCOM_SER_FDX is not set
+# CONFIG_BAYCOM_SER_HDX is not set
+# CONFIG_BAYCOM_PAR is not set
+# CONFIG_BAYCOM_EPP is not set
+# CONFIG_YAM is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_SOFTMAC=m
+# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
+CONFIG_WIRELESS_EXT=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+CONFIG_CONNECTOR=m
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+CONFIG_PARPORT=m
+CONFIG_PARPORT_PC=m
+# CONFIG_PARPORT_PC_FIFO is not set
+# CONFIG_PARPORT_PC_SUPERIO is not set
+# CONFIG_PARPORT_GSC is not set
+# CONFIG_PARPORT_AX88796 is not set
+CONFIG_PARPORT_1284=y
+
+#
+# Plug and Play support
+#
+# CONFIG_PNP is not set
+
+#
+# Block devices
+#
+CONFIG_BLK_DEV_FD=m
+CONFIG_PARIDE=m
+CONFIG_PARIDE_PARPORT=m
+
+#
+# Parallel IDE high-level drivers
+#
+CONFIG_PARIDE_PD=m
+CONFIG_PARIDE_PCD=m
+CONFIG_PARIDE_PF=m
+CONFIG_PARIDE_PT=m
+CONFIG_PARIDE_PG=m
+
+#
+# Parallel IDE protocol modules
+#
+CONFIG_PARIDE_ATEN=m
+CONFIG_PARIDE_BPCK=m
+CONFIG_PARIDE_BPCK6=m
+CONFIG_PARIDE_COMM=m
+CONFIG_PARIDE_DSTR=m
+CONFIG_PARIDE_FIT2=m
+CONFIG_PARIDE_FIT3=m
+CONFIG_PARIDE_EPAT=m
+# CONFIG_PARIDE_EPATC8 is not set
+CONFIG_PARIDE_EPIA=m
+CONFIG_PARIDE_FRIQ=m
+CONFIG_PARIDE_FRPW=m
+CONFIG_PARIDE_KBIC=m
+CONFIG_PARIDE_KTTI=m
+CONFIG_PARIDE_ON20=m
+CONFIG_PARIDE_ON26=m
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+CONFIG_ATA_OVER_ETH=m
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_RAID_ATTRS=m
+CONFIG_SCSI=y
+CONFIG_SCSI_NETLINK=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=m
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+CONFIG_BLK_DEV_SR_VENDOR=y
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transports
+#
+CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_SCSI_FC_ATTRS=y
+CONFIG_SCSI_ISCSI_ATTRS=m
+CONFIG_SCSI_SAS_ATTRS=m
+# CONFIG_SCSI_SAS_LIBSAS is not set
+
+#
+# SCSI low-level drivers
+#
+CONFIG_ISCSI_TCP=m
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
+CONFIG_SCSI_PPA=m
+CONFIG_SCSI_IMM=m
+# CONFIG_SCSI_IZIP_EPP16 is not set
+# CONFIG_SCSI_IZIP_SLOW_CTR is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_DEBUG is not set
+CONFIG_JAZZ_ESP=y
+
+#
+# Serial ATA (prod) and Parallel ATA (experimental) drivers
+#
+# CONFIG_ATA is not set
+
+#
+# Old CD-ROM drivers (not SCSI, not IDE)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=m
+CONFIG_MD_LINEAR=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+CONFIG_MD_RAID10=m
+CONFIG_MD_RAID456=m
+CONFIG_MD_RAID5_RESHAPE=y
+CONFIG_MD_MULTIPATH=m
+CONFIG_MD_FAULTY=m
+CONFIG_BLK_DEV_DM=m
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_CRYPT is not set
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_MIRROR=m
+CONFIG_DM_ZERO=m
+CONFIG_DM_MULTIPATH=m
+CONFIG_DM_MULTIPATH_EMC=m
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# I2O device support
+#
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+CONFIG_EQUALIZER=m
+CONFIG_TUN=m
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# PHY device support
+#
+CONFIG_PHYLIB=m
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=m
+CONFIG_DAVICOM_PHY=m
+CONFIG_QSEMI_PHY=m
+CONFIG_LXT_PHY=m
+CONFIG_CICADA_PHY=m
+CONFIG_VITESSE_PHY=m
+CONFIG_SMSC_PHY=m
+# CONFIG_FIXED_PHY is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_MIPS_JAZZ_SONIC=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_DM9000 is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_AT1700 is not set
+# CONFIG_DEPCA is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_ISA=y
+# CONFIG_E2100 is not set
+# CONFIG_EWRK3 is not set
+# CONFIG_EEXPRESS is not set
+# CONFIG_EEXPRESS_PRO is not set
+# CONFIG_HPLAN_PLUS is not set
+# CONFIG_HPLAN is not set
+# CONFIG_LP486E is not set
+# CONFIG_ETH16I is not set
+CONFIG_NE2000=m
+# CONFIG_SEEQ8005 is not set
+CONFIG_NET_PCI=y
+# CONFIG_AC3200 is not set
+# CONFIG_APRICOT is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_LAN_SAA9730 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+CONFIG_PLIP=m
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_INPORT is not set
+# CONFIG_MOUSE_LOGIBM is not set
+# CONFIG_MOUSE_PC110PAD is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_PARKBD=m
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=m
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=m
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_PRINTER=m
+# CONFIG_LP_CONSOLE is not set
+CONFIG_PPDEV=m
+CONFIG_TIPAR=m
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
+CONFIG_RTC=m
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
+#
+# Dallas's 1-wire bus
+#
+CONFIG_W1=m
+CONFIG_W1_CON=y
+
+#
+# 1-wire Bus Masters
+#
+
+#
+# 1-wire Slaves
+#
+# CONFIG_W1_SLAVE_THERM is not set
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+
+#
+# Hardware Monitoring support
+#
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_VID is not set
+
+#
+# Misc devices
+#
+# CONFIG_TIFM_CORE is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB is not set
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# InfiniBand support
+#
+
+#
+# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+#
+
+#
+# Real Time Clock
+#
+# CONFIG_RTC_CLASS is not set
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_REISERFS_FS_XATTR=y
+CONFIG_REISERFS_FS_POSIX_ACL=y
+CONFIG_REISERFS_FS_SECURITY=y
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_SECURITY=y
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_MINIX_FS=m
+CONFIG_ROMFS_FS=m
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=m
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+# CONFIG_NTFS_RW is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+CONFIG_ADFS_FS=m
+# CONFIG_ADFS_FS_RW is not set
+CONFIG_AFFS_FS=m
+# CONFIG_ECRYPT_FS is not set
+CONFIG_HFS_FS=m
+# CONFIG_HFSPLUS_FS is not set
+CONFIG_BEFS_FS=m
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BFS_FS=m
+CONFIG_EFS_FS=m
+CONFIG_CRAMFS=m
+CONFIG_VXFS_FS=m
+CONFIG_HPFS_FS=m
+CONFIG_QNX4FS_FS=m
+CONFIG_SYSV_FS=m
+CONFIG_UFS_FS=m
+# CONFIG_UFS_FS_WRITE is not set
+# CONFIG_UFS_DEBUG is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=m
+CONFIG_SUNRPC_GSS=m
+CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_RPCSEC_GSS_SPKM3=m
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+CONFIG_NCP_FS=m
+CONFIG_NCPFS_PACKET_SIGNING=y
+CONFIG_NCPFS_IOCTL_LOCKING=y
+CONFIG_NCPFS_STRONG=y
+CONFIG_NCPFS_NFS_NS=y
+CONFIG_NCPFS_OS2_NS=y
+CONFIG_NCPFS_SMALLDOS=y
+CONFIG_NCPFS_NLS=y
+CONFIG_NCPFS_EXTRAS=y
+CONFIG_CODA_FS=m
+CONFIG_CODA_FS_OLD_API=y
+CONFIG_AFS_FS=m
+CONFIG_RXRPC=m
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+
+#
+# Distributed Lock Manager
+#
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_DEBUG_FS is not set
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_DEFLATE=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_CRC32C=m
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Hardware crypto devices
+#
+
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=m
+CONFIG_CRC32=y
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=m
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_PLIST=y
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.18-rc1
-# Thu Jul 6 10:04:13 2006
+# Linux kernel version: 2.6.19-rc1
+# Fri Oct 6 17:34:55 2006
#
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_MIPS_ATLAS is not set
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_TIME=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_MIPS_MT_DISABLED is not set
# CONFIG_MIPS_MT_SMTC is not set
-# CONFIG_MIPS_MT_SMP is not set
-CONFIG_MIPS_VPE_LOADER=y
+CONFIG_MIPS_MT_SMP=y
+# CONFIG_MIPS_VPE_LOADER is not set
CONFIG_MIPS_MT=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
CONFIG_MIPS_MT_FPAFF=y
-CONFIG_MIPS_VPE_LOADER_TOM=y
-CONFIG_MIPS_VPE_APSP_API=y
-CONFIG_MIPS_APSP_KSPD=y
# CONFIG_64BIT_PHYS_ADDR is not set
CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_MIPSR2_IRQ_VI=y
+CONFIG_CPU_MIPSR2_SRS=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_SELECT_MEMORY_MODEL=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
+CONFIG_SMP=y
+CONFIG_SYS_SUPPORTS_SMP=y
+CONFIG_NR_CPUS=2
# CONFIG_HZ_48 is not set
CONFIG_HZ_100=y
# CONFIG_HZ_128 is not set
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
+CONFIG_PREEMPT_BKL=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
+# CONFIG_IPC_NS is not set
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
+# CONFIG_CPUSETS is not set
CONFIG_RELAY=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
-CONFIG_RT_MUTEXES=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
+CONFIG_STOP_MACHINE=y
#
# Block layer
#
+CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
#
CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y
+# CONFIG_PCI_MULTITHREAD_PROBE is not set
CONFIG_MMU=y
#
CONFIG_UNIX=y
CONFIG_XFRM=y
CONFIG_XFRM_USER=m
+# CONFIG_XFRM_SUB_POLICY is not set
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_INET_TUNNEL=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m
+CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
#
# IP: Virtual Server Configuration
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
+# CONFIG_IPV6_MIP6 is not set
CONFIG_INET6_XFRM_TUNNEL=m
CONFIG_INET6_TUNNEL=m
CONFIG_INET6_XFRM_MODE_TRANSPORT=m
CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_IPV6_TUNNEL=m
+# CONFIG_IPV6_SUBTREES is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
CONFIG_NETWORK_SECMARK=y
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
CONFIG_NETFILTER_XTABLES=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
CONFIG_NETFILTER_XT_TARGET_MARK=m
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
CONFIG_NETFILTER_XT_MATCH_DCCP=m
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
CONFIG_NETFILTER_XT_MATCH_ESP=m
CONFIG_NETFILTER_XT_MATCH_HELPER=m
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
CONFIG_IP_NF_MATCH_TOS=m
CONFIG_IP_NF_MATCH_RECENT=m
CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_DSCP=m
CONFIG_IP_NF_MATCH_AH=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_TOS=m
CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_DSCP=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_RAW=m
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
CONFIG_ATALK=m
-CONFIG_DEV_APPLETALK=y
+CONFIG_DEV_APPLETALK=m
CONFIG_IPDDP=m
CONFIG_IPDDP_ENCAP=y
CONFIG_IPDDP_DECAP=y
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
-CONFIG_NET_DIVERT=y
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
CONFIG_IEEE80211_SOFTMAC=m
# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
CONFIG_WIRELESS_EXT=y
+CONFIG_FIB_RULES=y
#
# Device Drivers
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CDROM_PKTCDVD=m
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
+CONFIG_IDE_MAX_HWIFS=4
CONFIG_BLK_DEV_IDE=y
#
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_JMICRON is not set
# CONFIG_BLK_DEV_SC1200 is not set
CONFIG_BLK_DEV_PIIX=y
# CONFIG_BLK_DEV_IT821X is not set
#
CONFIG_RAID_ATTRS=m
CONFIG_SCSI=m
+CONFIG_SCSI_NETLINK=y
CONFIG_SCSI_PROC_FS=y
#
CONFIG_SCSI_LOGGING=y
#
-# SCSI Transport Attributes
+# SCSI Transports
#
CONFIG_SCSI_SPI_ATTRS=m
CONFIG_SCSI_FC_ATTRS=m
CONFIG_SCSI_ISCSI_ATTRS=m
CONFIG_SCSI_SAS_ATTRS=m
+# CONFIG_SCSI_SAS_LIBSAS is not set
#
# SCSI low-level drivers
CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_MEGARAID_SAS is not set
-# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_HPTIOP is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_IPR is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
# CONFIG_SCSI_LPFC is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_NSP32 is not set
# CONFIG_SCSI_DEBUG is not set
+#
+# Serial ATA (prod) and Parallel ATA (experimental) drivers
+#
+# CONFIG_ATA is not set
+
#
# Multi-device support (RAID and LVM)
#
CONFIG_MD_MULTIPATH=m
CONFIG_MD_FAULTY=m
CONFIG_BLK_DEV_DM=m
+# CONFIG_DM_DEBUG is not set
CONFIG_DM_CRYPT=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
CONFIG_CICADA_PHY=m
CONFIG_VITESSE_PHY=m
CONFIG_SMSC_PHY=m
+# CONFIG_FIXED_PHY is not set
#
# Ethernet (10 or 100Mbit)
# CONFIG_HP100 is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=y
+# CONFIG_PCNET32_NAPI is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
#
# Ethernet (10000 Mbit)
# Input device support
#
CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
#
# Userland interfaces
#
# Misc devices
#
+# CONFIG_TIFM_CORE is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
-CONFIG_VIDEO_V4L2=y
#
# Digital Video Broadcasting Devices
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
CONFIG_XFS_SECURITY=y
CONFIG_XFS_POSIX_ACL=y
# CONFIG_XFS_RT is not set
+# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
CONFIG_MINIX_FS=m
CONFIG_ROMFS_FS=m
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
-# CONFIG_CIFS_DEBUG2 is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=m
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
#
# Profiling support
#
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=14
+CONFIG_LOG_BUF_SHIFT=15
# CONFIG_DEBUG_FS is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
# Cryptographic options
#
CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_CAST5=m
* the first level int-handler will jump here if it is a vrc5477 irq
*/
#define NUM_5477_IRQS 32
-static void
-vrc5477_irq_dispatch(struct pt_regs *regs)
+static void vrc5477_irq_dispatch(void)
{
u32 intStatus;
u32 bitmask;
/* check for i8259 interrupts */
if (intStatus & (1 << VRC5477_I8259_CASCADE)) {
int i8259_irq = i8259_interrupt_ack();
- do_IRQ(I8259_IRQ_BASE + i8259_irq, regs);
+ do_IRQ(I8259_IRQ_BASE + i8259_irq);
return;
}
}
for (i=0, bitmask=1; i<= NUM_5477_IRQS; bitmask <<=1, i++) {
/* do we need to "and" with the int mask? */
if (intStatus & bitmask) {
- do_IRQ(VRC5477_IRQ_BASE + i, regs);
+ do_IRQ(VRC5477_IRQ_BASE + i);
return;
}
}
#define VR5477INTS (STATUSF_IP2|STATUSF_IP3|STATUSF_IP4|STATUSF_IP5|STATUSF_IP6)
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status();
if (pending & STATUSF_IP7)
- do_IRQ(CPU_IRQ_BASE + 7, regs);
+ do_IRQ(CPU_IRQ_BASE + 7);
else if (pending & VR5477INTS)
- vrc5477_irq_dispatch(regs);
+ vrc5477_irq_dispatch();
else if (pending & STATUSF_IP0)
- do_IRQ(CPU_IRQ_BASE, regs);
+ do_IRQ(CPU_IRQ_BASE);
else if (pending & STATUSF_IP1)
- do_IRQ(CPU_IRQ_BASE + 1, regs);
+ do_IRQ(CPU_IRQ_BASE + 1);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
+#include <asm/irq_regs.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/traps.h>
return dec_ecc_be_backend(regs, is_fixup, 0);
}
-irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id)
{
+ struct pt_regs *regs = get_irq_regs();
+
int action = dec_ecc_be_backend(regs, 0, 1);
if (action == MIPS_BE_DISCARD)
srlv t3,t1,t2
handle_it:
+ LONG_L s0, TI_REGS($28)
+ LONG_S sp, TI_REGS($28)
jal do_IRQ
- move a1,sp
+ LONG_S s0, TI_REGS($28)
j ret_from_irq
nop
return dec_kn01_be_backend(regs, is_fixup, 0);
}
-irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
+irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id)
{
volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
+ struct pt_regs *regs = get_irq_regs();
int action;
if (!(*csr & KN01_CSR_MEMERR))
#include <linux/types.h>
#include <asm/addrspace.h>
+#include <asm/irq_regs.h>
+#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/traps.h>
return dec_kn02xa_be_backend(regs, is_fixup, 0);
}
-irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
+irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id)
{
+ struct pt_regs *regs = get_irq_regs();
int action = dec_kn02xa_be_backend(regs, 0, 1);
if (action == MIPS_BE_DISCARD)
#include <linux/linkage.h>
#include <asm/addrspace.h>
-#include <asm/ptrace.h>
typedef void ATTRIB_NORET (* noret_func_t)(void);
back_to_prom();
}
-irqreturn_t dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t dec_intr_halt(int irq, void *dev_id)
{
dec_machine_halt();
}
extern void dec_machine_restart(char *command);
extern void dec_machine_halt(void);
extern void dec_machine_power_off(void);
-extern irqreturn_t dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs);
+extern irqreturn_t dec_intr_halt(int irq, void *dev_id);
unsigned long dec_kn_slot_base, dec_kn_slot_size;
/*
* the first level int-handler will jump here if it is a emma2rh irq
*/
-asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
+void emma2rh_irq_dispatch(void)
{
u32 intStatus;
u32 bitmask;
& emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (swIntStatus & bitmask) {
- do_IRQ(EMMA2RH_SW_IRQ_BASE + i, regs);
+ do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
return;
}
}
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
& emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
if (gpioIntStatus & bitmask) {
- do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i, regs);
+ do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
return;
}
}
for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
return;
}
}
extern void emma2rh_sw_irq_init(u32 base);
extern void emma2rh_gpio_irq_init(u32 base);
extern void emma2rh_irq_init(u32 base);
-extern asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs);
+extern void emma2rh_irq_dispatch(void);
static struct irqaction irq_cascade = {
.handler = no_action,
setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade);
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();
if (pending & STATUSF_IP7)
- do_IRQ(CPU_IRQ_BASE + 7, regs);
+ do_IRQ(CPU_IRQ_BASE + 7);
else if (pending & STATUSF_IP2)
- emma2rh_irq_dispatch(regs);
+ emma2rh_irq_dispatch();
else if (pending & STATUSF_IP1)
- do_IRQ(CPU_IRQ_BASE + 1, regs);
+ do_IRQ(CPU_IRQ_BASE + 1);
else if (pending & STATUSF_IP0)
- do_IRQ(CPU_IRQ_BASE + 0, regs);
+ do_IRQ(CPU_IRQ_BASE + 0);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
-#include <asm/ptrace.h>
+#include <asm/irq_regs.h>
#include <asm/gt64120.h>
/*
* differently than other MIPS interrupts.
*/
-static void gt64120_irq(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t gt64120_irq(int irq, void *dev_id)
{
unsigned int irq_src, int_high_src, irq_src_mask, int_high_src_mask;
int handled = 0;
irq_src &= ~0x00000800;
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
}
GT_WRITE(GT_INTRCAUSE_OFS, 0);
GT_WRITE(GT_HINTRCAUSE_OFS, 0);
+
+ return IRQ_HANDLED;
}
/*
#include <asm/system.h>
#include <asm/gt64120.h>
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();
if (pending & STATUSF_IP4) /* int2 hardware line (timer) */
- do_IRQ(4, regs);
+ do_IRQ(4);
else if (pending & STATUSF_IP2) /* int0 hardware line */
- do_IRQ(GT_INTA, regs);
+ do_IRQ(GT_INTA);
else if (pending & STATUSF_IP5) /* int3 hardware line */
- do_IRQ(GT_INTD, regs);
+ do_IRQ(GT_INTD);
else if (pending & STATUSF_IP6) /* int4 hardware line */
- do_IRQ(6, regs);
+ do_IRQ(6);
else if (pending & STATUSF_IP7) /* compare int */
- do_IRQ(7, regs);
+ do_IRQ(7);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
static void disable_ev64120_irq(unsigned int irq_nr)
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/time.h>
#include <asm/reboot.h>
#include <asm/traps.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();
if (pending & STATUSF_IP2) /* int0 hardware line */
- do_IRQ(2, regs);
+ do_IRQ(2);
else if (pending & STATUSF_IP3) /* int1 hardware line */
- do_IRQ(3, regs);
+ do_IRQ(3);
else if (pending & STATUSF_IP4) /* int2 hardware line */
- do_IRQ(4, regs);
+ do_IRQ(4);
else if (pending & STATUSF_IP5) /* int3 hardware line */
- do_IRQ(5, regs);
+ do_IRQ(5);
else if (pending & STATUSF_IP6) /* int4 hardware line */
- do_IRQ(6, regs);
+ do_IRQ(6);
else if (pending & STATUSF_IP7) /* cpu timer */
- do_IRQ(7, regs);
+ do_IRQ(7);
else {
/*
* Now look at the extended interrupts
pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16;
if (pending & STATUSF_IP8) /* int6 hardware line */
- do_IRQ(8, regs);
+ do_IRQ(8);
else if (pending & STATUSF_IP9) /* int7 hardware line */
- do_IRQ(9, regs);
+ do_IRQ(9);
else if (pending & STATUSF_IP10) /* int8 hardware line */
- do_IRQ(10, regs);
+ do_IRQ(10);
else if (pending & STATUSF_IP11) /* int9 hardware line */
- do_IRQ(11, regs);
+ do_IRQ(11);
}
}
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/traps.h>
#include <linux/bootmem.h>
#include <asm/irq_cpu.h>
#include <asm/gt64120.h>
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();
if (pending & STATUSF_IP7)
- do_IRQ(WRPPMC_MIPS_TIMER_IRQ, regs); /* CPU Compare/Count internal timer */
+ do_IRQ(WRPPMC_MIPS_TIMER_IRQ); /* CPU Compare/Count internal timer */
else if (pending & STATUSF_IP6)
- do_IRQ(WRPPMC_UART16550_IRQ, regs); /* UART 16550 port */
+ do_IRQ(WRPPMC_UART16550_IRQ); /* UART 16550 port */
else if (pending & STATUSF_IP3)
- do_IRQ(WRPPMC_PCI_INTA_IRQ, regs); /* PCI INT_A */
+ do_IRQ(WRPPMC_PCI_INTA_IRQ); /* PCI INT_A */
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
/**
change_c0_status(ST0_IM, IE_IRQ4 | IE_IRQ3 | IE_IRQ2 | IE_IRQ1);
}
-static void loc_call(unsigned int irq, struct pt_regs *regs, unsigned int mask)
+static void loc_call(unsigned int irq, unsigned int mask)
{
r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
r4030_read_reg16(JAZZ_IO_IRQ_ENABLE) & mask);
- do_IRQ(irq, regs);
+ do_IRQ(irq);
r4030_write_reg16(JAZZ_IO_IRQ_ENABLE,
r4030_read_reg16(JAZZ_IO_IRQ_ENABLE) | mask);
}
-static void ll_local_dev(struct pt_regs *regs)
+static void ll_local_dev(void)
{
switch (r4030_read_reg32(JAZZ_IO_IRQ_SOURCE)) {
case 0:
panic("Unimplemented loc_no_irq handler");
break;
case 4:
- loc_call(JAZZ_PARALLEL_IRQ, regs, JAZZ_IE_PARALLEL);
+ loc_call(JAZZ_PARALLEL_IRQ, JAZZ_IE_PARALLEL);
break;
case 8:
- loc_call(JAZZ_PARALLEL_IRQ, regs, JAZZ_IE_FLOPPY);
+ loc_call(JAZZ_PARALLEL_IRQ, JAZZ_IE_FLOPPY);
break;
case 12:
panic("Unimplemented loc_sound handler");
panic("Unimplemented loc_video handler");
break;
case 20:
- loc_call(JAZZ_ETHERNET_IRQ, regs, JAZZ_IE_ETHERNET);
+ loc_call(JAZZ_ETHERNET_IRQ, JAZZ_IE_ETHERNET);
break;
case 24:
- loc_call(JAZZ_SCSI_IRQ, regs, JAZZ_IE_SCSI);
+ loc_call(JAZZ_SCSI_IRQ, JAZZ_IE_SCSI);
break;
case 28:
- loc_call(JAZZ_KEYBOARD_IRQ, regs, JAZZ_IE_KEYBOARD);
+ loc_call(JAZZ_KEYBOARD_IRQ, JAZZ_IE_KEYBOARD);
break;
case 32:
- loc_call(JAZZ_MOUSE_IRQ, regs, JAZZ_IE_MOUSE);
+ loc_call(JAZZ_MOUSE_IRQ, JAZZ_IE_MOUSE);
break;
case 36:
- loc_call(JAZZ_SERIAL1_IRQ, regs, JAZZ_IE_SERIAL1);
+ loc_call(JAZZ_SERIAL1_IRQ, JAZZ_IE_SERIAL1);
break;
case 40:
- loc_call(JAZZ_SERIAL2_IRQ, regs, JAZZ_IE_SERIAL2);
+ loc_call(JAZZ_SERIAL2_IRQ, JAZZ_IE_SERIAL2);
break;
}
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
write_c0_compare(0);
else if (pending & IE_IRQ4) {
r4030_read_reg32(JAZZ_TIMER_REGISTER);
- do_IRQ(JAZZ_TIMER_IRQ, regs);
+ do_IRQ(JAZZ_TIMER_IRQ);
} else if (pending & IE_IRQ3)
panic("Unimplemented ISA NMI handler");
else if (pending & IE_IRQ2)
- do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK), regs);
+ do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK));
else if (pending & IE_IRQ1) {
- ll_local_dev(regs);
+ ll_local_dev();
} else if (unlikely(pending & IE_IRQ0))
panic("Unimplemented local_dma handler");
else if (pending & IE_SW1) {
#include <linux/fb.h>
#include <linux/ide.h>
#include <linux/pm.h>
+#include <linux/screen_info.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/jazz.h>
#include <asm/jazzdma.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/io.h>
#include <asm/pgtable.h>
}
static struct resource jazz_io_resources[] = {
- { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
- { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
- { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
- { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
+ {
+ .start = 0x00,
+ .end = 0x1f,
+ .name = "dma1",
+ .flags = IORESOURCE_BUSY
+ }, {
+ .start = 0x40,
+ .end = 0x5f,
+ .name = "timer",
+ .end = IORESOURCE_BUSY
+ }, {
+ .start = 0x80,
+ .end = 0x8f,
+ .name = "dma page reg",
+ .flags = IORESOURCE_BUSY
+ }, {
+ .start = 0xc0,
+ .end = 0xdf,
+ .name = "dma2",
+ .flags = IORESOURCE_BUSY
+ }
};
void __init plat_mem_setup(void)
_machine_halt = jazz_machine_halt;
pm_power_off = jazz_machine_power_off;
-#warning "Somebody should check if screen_info is ok for Jazz."
-
screen_info = (struct screen_info) {
0, 0, /* orig-x, orig-y */
0, /* unused */
#include <linux/smp_lock.h>
#include <linux/bitops.h>
+#include <asm/irq_regs.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
.space_id = 0,
can_share : 1
};
+
struct tb_irq_space jmr3927_irc_irqspace = {
- .next = NULL,
- .start_irqno = JMR3927_IRQ_IRC,
- nr_irqs : JMR3927_NR_IRQ_IRC,
- .mask_func = mask_irq_irc,
- .unmask_func = unmask_irq_irc,
- .name = "on-chip",
- .space_id = 0,
- can_share : 0
+ .next = NULL,
+ .start_irqno = JMR3927_IRQ_IRC,
+ .nr_irqs = JMR3927_NR_IRQ_IRC,
+ .mask_func = mask_irq_irc,
+ .unmask_func = unmask_irq_irc,
+ .name = "on-chip",
+ .space_id = 0,
+ .can_share = 0
};
-void jmr3927_spurious(struct pt_regs *regs)
+
+#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
+static int tx_branch_likely_bug_count = 0;
+static int have_tx_branch_likely_bug = 0;
+
+static void tx_branch_likely_bug_fixup(void)
+{
+ struct pt_regs *regs = get_irq_regs();
+
+ /* TX39/49-BUG: Under this condition, the insn in delay slot
+ of the branch likely insn is executed (not nullified) even
+ the branch condition is false. */
+ if (!have_tx_branch_likely_bug)
+ return;
+ if ((regs->cp0_epc & 0xfff) == 0xffc &&
+ KSEGX(regs->cp0_epc) != KSEG0 &&
+ KSEGX(regs->cp0_epc) != KSEG1) {
+ unsigned int insn = *(unsigned int*)(regs->cp0_epc - 4);
+ /* beql,bnel,blezl,bgtzl */
+ /* bltzl,bgezl,blezall,bgezall */
+ /* bczfl, bcztl */
+ if ((insn & 0xf0000000) == 0x50000000 ||
+ (insn & 0xfc0e0000) == 0x04020000 ||
+ (insn & 0xf3fe0000) == 0x41020000) {
+ regs->cp0_epc -= 4;
+ tx_branch_likely_bug_count++;
+ printk(KERN_INFO
+ "fix branch-likery bug in %s (insn %08x)\n",
+ current->comm, insn);
+ }
+ }
+}
+#endif
+
+static void jmr3927_spurious(void)
{
#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
- tx_branch_likely_bug_fixup(regs);
+ tx_branch_likely_bug_fixup();
#endif
printk(KERN_WARNING "spurious interrupt (cause 0x%lx, pc 0x%lx, ra 0x%lx).\n",
regs->cp0_cause, regs->cp0_epc, regs->regs[31]);
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
int irq;
#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
- tx_branch_likely_bug_fixup(regs);
+ tx_branch_likely_bug_fixup();
#endif
if ((regs->cp0_cause & CAUSEF_IP7) == 0) {
#if 0
- jmr3927_spurious(regs);
+ jmr3927_spurious();
#endif
return;
}
irq = (regs->cp0_cause >> CAUSEB_IP2) & 0x0f;
- do_IRQ(irq + JMR3927_IRQ_IRC, regs);
+ do_IRQ(irq + JMR3927_IRQ_IRC);
}
-static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id)
{
unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR);
int i;
for (i = 0; i < JMR3927_NR_IRQ_IOC; i++) {
if (istat & (1 << i)) {
irq = JMR3927_IRQ_IOC + i;
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
}
return IRQ_HANDLED;
jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL,
};
-static irqreturn_t jmr3927_isac_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t jmr3927_isac_interrupt(int irq, void *dev_id)
{
unsigned char istat = jmr3927_isac_reg_in(JMR3927_ISAC_INTS2_ADDR);
int i;
for (i = 0; i < JMR3927_NR_IRQ_ISAC; i++) {
if (istat & (1 << i)) {
irq = JMR3927_IRQ_ISAC + i;
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
}
return IRQ_HANDLED;
};
-static irqreturn_t jmr3927_isaerr_interrupt(int irq, void * dev_id, struct pt_regs * regs)
+static irqreturn_t jmr3927_isaerr_interrupt(int irq, void *dev_id)
{
printk(KERN_WARNING "ISA error interrupt (irq 0x%x).\n", irq);
jmr3927_isaerr_interrupt, 0, CPU_MASK_NONE, "ISA error", NULL, NULL,
};
-static irqreturn_t jmr3927_pcierr_interrupt(int irq, void * dev_id, struct pt_regs * regs)
+static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
{
printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq);
printk(KERN_WARNING "pcistat:%02x, lbstat:%04lx\n",
jmr3927_irq_base = irq_base;
}
-
-#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
-static int tx_branch_likely_bug_count = 0;
-static int have_tx_branch_likely_bug = 0;
-void tx_branch_likely_bug_fixup(struct pt_regs *regs)
-{
- /* TX39/49-BUG: Under this condition, the insn in delay slot
- of the branch likely insn is executed (not nullified) even
- the branch condition is false. */
- if (!have_tx_branch_likely_bug)
- return;
- if ((regs->cp0_epc & 0xfff) == 0xffc &&
- KSEGX(regs->cp0_epc) != KSEG0 &&
- KSEGX(regs->cp0_epc) != KSEG1) {
- unsigned int insn = *(unsigned int*)(regs->cp0_epc - 4);
- /* beql,bnel,blezl,bgtzl */
- /* bltzl,bgezl,blezall,bgezall */
- /* bczfl, bcztl */
- if ((insn & 0xf0000000) == 0x50000000 ||
- (insn & 0xfc0e0000) == 0x04020000 ||
- (insn & 0xf3fe0000) == 0x41020000) {
- regs->cp0_epc -= 4;
- tx_branch_likely_bug_count++;
- printk(KERN_INFO
- "fix branch-likery bug in %s (insn %08x)\n",
- current->comm, insn);
- }
- }
-}
-#endif
offset("#define TI_TASK ", struct thread_info, task);
offset("#define TI_EXEC_DOMAIN ", struct thread_info, exec_domain);
offset("#define TI_FLAGS ", struct thread_info, flags);
+ offset("#define TI_TP_VALUE ", struct thread_info, tp_value);
offset("#define TI_CPU ", struct thread_info, cpu);
offset("#define TI_PRE_COUNT ", struct thread_info, preempt_count);
offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
- offset("#define TI_TP_VALUE ", struct thread_info, tp_value);
+ offset("#define TI_REGS ", struct thread_info, regs);
constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER);
constant("#define _THREAD_SIZE ", THREAD_SIZE);
constant("#define _THREAD_MASK ", THREAD_MASK);
FEXPORT(restore_all) # restore full frame
#ifdef CONFIG_MIPS_MT_SMTC
/* Detect and execute deferred IPI "interrupts" */
- move a0,sp
jal deferred_smtc_ipi
/* Re-arm any temporarily masked interrupts not explicitly "acked" */
mfc0 v0, CP0_TCSTATUS
CLI
TRACE_IRQS_OFF
- PTR_LA ra, ret_from_irq
- move a0, sp
- j plat_irq_dispatch
+ LONG_L s0, TI_REGS($28)
+ LONG_S sp, TI_REGS($28)
+ jal plat_irq_dispatch
+ LONG_S s0, TI_REGS($28)
+ j ret_from_irq
END(handle_int)
__INIT
#endif /* CONFIG_MIPS_MT_SMTC */
CLI
TRACE_IRQS_OFF
- move a0, sp
+
+ LONG_L s0, TI_REGS($28)
+ LONG_S sp, TI_REGS($28)
+ jalr v0
+ LONG_S s0, TI_REGS($28)
PTR_LA ra, ret_from_irq
- jr v0
END(except_vec_vi_handler)
/*
/*
- * Copyright (c) 2004 MIPS Inc
- * Author: chris@mips.com
- *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
+ *
+ * Copyright (c) 2004 MIPS Inc
+ * Author: chris@mips.com
+ *
+ * Copyright (C) 2004, 06 Ralf Baechle <ralf@linux-mips.org>
*/
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
-#include <asm/ptrace.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <asm/io.h>
/*
* Interrupt handler for interrupts coming from SOC-it.
*/
-void ll_msc_irq(struct pt_regs *regs)
+void ll_msc_irq(void)
{
unsigned int irq;
/* read the interrupt vector register */
MSCIC_READ(MSC01_IC_VEC, irq);
if (irq < 64)
- do_IRQ(irq + irq_base, regs);
+ do_IRQ(irq + irq_base);
else {
/* Ignore spurious interrupt */
}
/*
* Copyright 2002 Momentum Computer
* Author: mdharm@momenco.com
- * Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org>
+ * Copyright (C) 2004, 06 Ralf Baechle <ralf@linux-mips.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
#include <linux/mv643xx.h>
#include <linux/sched.h>
-#include <asm/ptrace.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/marvell.h>
* Interrupt handler for interrupts coming from the Marvell chip.
* It could be built in ethernet ports etc...
*/
-void ll_mv64340_irq(struct pt_regs *regs)
+void ll_mv64340_irq(void)
{
unsigned int irq_src_low, irq_src_high;
unsigned int irq_mask_low, irq_mask_high;
irq_src_high &= irq_mask_high;
if (irq_src_low)
- do_IRQ(ls1bit32(irq_src_low) + irq_base, regs);
+ do_IRQ(ls1bit32(irq_src_low) + irq_base);
else
- do_IRQ(ls1bit32(irq_src_high) + irq_base + 32, regs);
+ do_IRQ(ls1bit32(irq_src_high) + irq_base + 32);
}
#define shutdown_mv64340_irq disable_mv64340_irq
* SMP cross-CPU interrupts have their own specific
* handlers).
*/
-asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs)
+asmlinkage unsigned int do_IRQ(unsigned int irq)
{
- struct pt_regs *old_regs = set_irq_regs(regs);
irq_enter();
__DO_IRQ_SMTC_HOOK();
irq_exit();
- set_irq_regs(old_regs);
return 1;
}
return 0;
}
-asmlinkage void spurious_interrupt(struct pt_regs *regs)
+asmlinkage void spurious_interrupt(void)
{
atomic_inc(&irq_err_count);
}
static int show_cpuinfo(struct seq_file *m, void *v)
{
- unsigned int version = current_cpu_data.processor_id;
- unsigned int fp_vers = current_cpu_data.fpu_id;
unsigned long n = (unsigned long) v - 1;
+ unsigned int version = cpu_data[n].processor_id;
+ unsigned int fp_vers = cpu_data[n].fpu_id;
char fmt [64];
#ifdef CONFIG_SMP
seq_printf(m, "processor\t\t: %ld\n", n);
sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
cpu_has_fpu ? " FPU V%d.%d" : "");
- seq_printf(m, fmt, cpu_name[current_cpu_data.cputype <= CPU_LAST ?
- current_cpu_data.cputype : CPU_UNKNOWN],
+ seq_printf(m, fmt, cpu_name[cpu_data[n].cputype <= CPU_LAST ?
+ cpu_data[n].cputype : CPU_UNKNOWN],
(version >> 4) & 0x0f, version & 0x0f,
(fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
seq_printf(m, "microsecond timers\t: %s\n",
cpu_has_counter ? "yes" : "no");
- seq_printf(m, "tlb_entries\t\t: %d\n", current_cpu_data.tlbsize);
+ seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
seq_printf(m, "extra interrupt vector\t: %s\n",
cpu_has_divec ? "yes" : "no");
seq_printf(m, "hardware watchpoint\t: %s\n",
extern void *vpe_get_shared(int index);
-static void rtlx_dispatch(struct pt_regs *regs)
+static void rtlx_dispatch(void)
{
- do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ, regs);
+ do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ);
}
/* Interrupt handler may be called before rtlx_init has otherwise had
a chance to run.
*/
-static irqreturn_t rtlx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t rtlx_interrupt(int irq, void *dev_id)
{
int i;
clear_c0_mvpcontrol(MVPCONTROL_VPC);
}
-static void ipi_resched_dispatch (struct pt_regs *regs)
+static void ipi_resched_dispatch(void)
{
- do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ, regs);
+ do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ);
}
-static void ipi_call_dispatch (struct pt_regs *regs)
+static void ipi_call_dispatch(void)
{
- do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ, regs);
+ do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ);
}
-irqreturn_t ipi_resched_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
{
return IRQ_HANDLED;
}
-irqreturn_t ipi_call_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
{
smp_call_function_interrupt();
{
/* set up ipi interrupts */
if (cpu_has_vint) {
- set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
- set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
+ set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
+ set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
}
cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
/* Forward declarations */
-void ipi_decode(struct pt_regs *, struct smtc_ipi *);
+void ipi_decode(struct smtc_ipi *);
void post_direct_ipi(int cpu, struct smtc_ipi *pipi);
void setup_cross_vpe_interrupts(void);
void init_smtc_stats(void);
write_tc_c0_tcrestart(__smtc_ipi_vector);
}
-void ipi_resched_interrupt(struct pt_regs *regs)
+static void ipi_resched_interrupt(void)
{
/* Return from interrupt should be enough to cause scheduler check */
}
-void ipi_call_interrupt(struct pt_regs *regs)
+static void ipi_call_interrupt(void)
{
/* Invoke generic function invocation code in smp.c */
smp_call_function_interrupt();
}
-void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi)
+void ipi_decode(struct smtc_ipi *pipi)
{
void *arg_copy = pipi->arg;
int type_copy = pipi->type;
#ifdef SMTC_IDLE_HOOK_DEBUG
clock_hang_reported[dest_copy] = 0;
#endif /* SMTC_IDLE_HOOK_DEBUG */
- local_timer_interrupt(0, NULL, regs);
+ local_timer_interrupt(0, NULL);
break;
case LINUX_SMP_IPI:
switch ((int)arg_copy) {
case SMP_RESCHEDULE_YOURSELF:
- ipi_resched_interrupt(regs);
+ ipi_resched_interrupt();
break;
case SMP_CALL_FUNCTION:
- ipi_call_interrupt(regs);
+ ipi_call_interrupt();
break;
default:
printk("Impossible SMTC IPI Argument 0x%x\n",
}
}
-void deferred_smtc_ipi(struct pt_regs *regs)
+void deferred_smtc_ipi(void)
{
struct smtc_ipi *pipi;
unsigned long flags;
while((pipi = smtc_ipi_dq(&IPIQ[q])) != NULL) {
/* ipi_decode() should be called with interrupts off */
local_irq_save(flags);
- ipi_decode(regs, pipi);
+ ipi_decode(pipi);
local_irq_restore(flags);
}
}
static int cpu_ipi_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_IRQ;
-static irqreturn_t ipi_interrupt(int irq, void *dev_idm, struct pt_regs *regs)
+static irqreturn_t ipi_interrupt(int irq, void *dev_idm)
{
int my_vpe = cpu_data[smp_processor_id()].vpe_id;
int my_tc = cpu_data[smp_processor_id()].tc_id;
* with interrupts off
*/
local_irq_save(flags);
- ipi_decode(regs, pipi);
+ ipi_decode(pipi);
local_irq_restore(flags);
}
}
return IRQ_HANDLED;
}
-static void ipi_irq_dispatch(struct pt_regs *regs)
+static void ipi_irq_dispatch(void)
{
- do_IRQ(cpu_ipi_irq, regs);
+ do_IRQ(cpu_ipi_irq);
}
static struct irqaction irq_ipi;
*/
void local_timer_interrupt(int irq, void *dev_id)
{
- if (current->pid)
- profile_tick(CPU_PROFILING);
+ profile_tick(CPU_PROFILING);
update_process_times(user_mode(get_irq_regs()));
}
EXPORT_SYMBOL(null_perf_irq);
EXPORT_SYMBOL(perf_irq);
-asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
+asmlinkage void ll_timer_interrupt(int irq)
{
- struct pt_regs *old_regs = set_irq_regs(regs);
int r2 = cpu_has_mips_r2;
irq_enter();
out:
irq_exit();
- set_irq_regs(old_regs);
}
-asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
+asmlinkage void ll_local_timer_interrupt(int irq)
{
- struct pt_regs *old_regs = set_irq_regs(regs);
irq_enter();
if (smp_processor_id() != 0)
kstat_this_cpu.irqs[irq]++;
local_timer_interrupt(irq, NULL);
irq_exit();
- set_irq_regs(old_regs);
}
/*
return int_status;
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned long int_status;
unsigned int cause = read_c0_cause();
int irq;
if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */
- ll_timer_interrupt(7, regs);
+ ll_timer_interrupt(7);
return;
}
if (int_status) {
irq = ls1bit32(int_status);
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
}
return b;
}
-static inline void atlas_hw0_irqdispatch(struct pt_regs *regs)
+static inline void atlas_hw0_irqdispatch(void)
{
unsigned long int_status;
int irq;
DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
static inline int clz(unsigned long x)
* then we just return, if multiple IRQs are pending then we will just take
* another exception, big deal.
*/
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
int irq;
irq = irq_ffs(pending);
if (irq == MIPSCPU_INT_ATLAS)
- atlas_hw0_irqdispatch(regs);
+ atlas_hw0_irqdispatch();
else if (irq >= 0)
- do_IRQ(MIPSCPU_INT_BASE + irq, regs);
+ do_IRQ(MIPSCPU_INT_BASE + irq);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
static inline void init_atlas_irqs (int base)
#include <asm/mipsregs.h>
#include <asm/mipsmtregs.h>
-#include <asm/ptrace.h>
#include <asm/hardirq.h>
#include <asm/irq.h>
#include <asm/div64.h>
}
}
-static void mips_timer_dispatch (struct pt_regs *regs)
+static void mips_timer_dispatch(void)
{
- do_IRQ (mips_cpu_timer_irq, regs);
+ do_IRQ(mips_cpu_timer_irq);
}
/*
* Redeclare until I get around mopping the timer code insanity on MIPS.
*/
-extern int null_perf_irq(struct pt_regs *regs);
+extern int null_perf_irq(void);
-extern int (*perf_irq)(struct pt_regs *regs);
+extern int (*perf_irq)(void);
-irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t mips_timer_interrupt(int irq, void *dev_id)
{
int cpu = smp_processor_id();
* perf counter overflow, or both.
*/
if (read_c0_cause() & (1 << 26))
- perf_irq(regs);
+ perf_irq();
if (read_c0_cause() & (1 << 30)) {
/* If timer interrupt, make it de-assert */
* the tick on VPE 0 to run the full timer_interrupt().
*/
if (cpu_data[cpu].vpe_id == 0) {
- timer_interrupt(irq, NULL, regs);
+ timer_interrupt(irq, NULL);
smtc_timer_broadcast(cpu_data[cpu].vpe_id);
scroll_display_message();
} else {
write_c0_compare(read_c0_count() +
(mips_hpt_frequency/HZ));
- local_timer_interrupt(irq, dev_id, regs);
+ local_timer_interrupt(irq, dev_id);
smtc_timer_broadcast(cpu_data[cpu].vpe_id);
}
}
* timer int.
*/
if (!r2 || (read_c0_cause() & (1 << 26)))
- if (perf_irq(regs))
+ if (perf_irq())
goto out;
/* we keep interrupt disabled all the time */
if (!r2 || (read_c0_cause() & (1 << 30)))
- timer_interrupt(irq, NULL, regs);
+ timer_interrupt(irq, NULL);
scroll_display_message();
} else {
/*
* Other CPUs should do profiling and process accounting
*/
- local_timer_interrupt(irq, dev_id, regs);
+ local_timer_interrupt(irq, dev_id);
}
out:
#endif /* CONFIG_MIPS_MT_SMTC */
return irq;
}
-static void malta_hw0_irqdispatch(struct pt_regs *regs)
+static void malta_hw0_irqdispatch(void)
{
int irq;
return; /* interrupt has already been cleared */
}
- do_IRQ(MALTA_INT_BASE+irq, regs);
+ do_IRQ(MALTA_INT_BASE + irq);
}
-void corehi_irqdispatch(struct pt_regs *regs)
+static void corehi_irqdispatch(void)
{
+ unsigned int intedge, intsteer, pcicmd, pcibadaddr;
+ unsigned int pcimstat, intisr, inten, intpol;
unsigned int intrcause,datalo,datahi;
- unsigned int pcimstat, intisr, inten, intpol, intedge, intsteer, pcicmd, pcibadaddr;
+ struct pt_regs *regs;
printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n");
- printk("epc : %08lx\nStatus: %08lx\nCause : %08lx\nbadVaddr : %08lx\n"
-, regs->cp0_epc, regs->cp0_status, regs->cp0_cause, regs->cp0_badvaddr);
+ printk("epc : %08lx\nStatus: %08lx\n"
+ "Cause : %08lx\nbadVaddr : %08lx\n",
+ regs->cp0_epc, regs->cp0_status,
+ regs->cp0_cause, regs->cp0_badvaddr);
/* Read all the registers and then print them as there is a
problem with interspersed printk's upsetting the Bonito controller.
case MIPS_REVISION_CORID_CORE_FPGA3:
case MIPS_REVISION_CORID_CORE_24K:
case MIPS_REVISION_CORID_CORE_EMUL_MSC:
- ll_msc_irq(regs);
+ ll_msc_irq();
break;
case MIPS_REVISION_CORID_QED_RM5261:
case MIPS_REVISION_CORID_CORE_LV:
* another exception, big deal.
*/
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
int irq;
irq = irq_ffs(pending);
if (irq == MIPSCPU_INT_I8259A)
- malta_hw0_irqdispatch(regs);
+ malta_hw0_irqdispatch();
else if (irq > 0)
- do_IRQ(MIPSCPU_INT_BASE + irq, regs);
+ do_IRQ(MIPSCPU_INT_BASE + irq);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
static struct irqaction i8259irq = {
* then we just return, if multiple IRQs are pending then we will just take
* another exception, big deal.
*/
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
int irq;
irq = irq_ffs(pending);
if (irq >= 0)
- do_IRQ(MIPSCPU_INT_BASE + irq, regs);
+ do_IRQ(MIPSCPU_INT_BASE + irq);
else
spurious_interrupt(regs);
}
#endif
}
-static inline void sim_hw0_irqdispatch(struct pt_regs *regs)
-{
- do_IRQ(2, regs);
-}
-
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
int irq;
irq = irq_ffs(pending);
if (irq > 0)
- do_IRQ(MIPSCPU_INT_BASE + irq, regs);
+ do_IRQ(MIPSCPU_INT_BASE + irq);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
void __init arch_init_irq(void)
#include <linux/mc146818rtc.h>
#include <linux/timex.h>
#include <asm/mipsregs.h>
-#include <asm/ptrace.h>
#include <asm/hardirq.h>
#include <asm/irq.h>
#include <asm/div64.h>
unsigned long cpu_khz;
-irqreturn_t sim_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t sim_timer_interrupt(int irq, void *dev_id)
{
#ifdef CONFIG_SMP
int cpu = smp_processor_id();
*/
#ifndef CONFIG_MIPS_MT_SMTC
if (cpu == 0) {
- timer_interrupt(irq, dev_id, regs);
+ timer_interrupt(irq, dev_id);
}
else {
/* Everyone else needs to reset the timer int here as
irq_enable_hazard();
evpe(vpflags);
- if(cpu_data[cpu].vpe_id == 0) timer_interrupt(irq, dev_id, regs);
+ if(cpu_data[cpu].vpe_id == 0) timer_interrupt(irq, dev_id);
else write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ));
smtc_timer_broadcast(cpu_data[cpu].vpe_id);
/*
* every CPU should do profiling and process accounting
*/
- local_timer_interrupt (irq, dev_id, regs);
+ local_timer_interrupt (irq, dev_id);
return IRQ_HANDLED;
#else
- return timer_interrupt (irq, dev_id, regs);
+ return timer_interrupt (irq, dev_id);
#endif
}
static int mips_cpu_timer_irq;
-static void mips_timer_dispatch (struct pt_regs *regs)
+static void mips_timer_dispatch(void)
{
- do_IRQ (mips_cpu_timer_irq, regs);
+ do_IRQ(mips_cpu_timer_irq);
}
#include <asm/mipsregs.h>
#include <asm/time.h>
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status();
if (pending & STATUSF_IP0)
- do_IRQ(0, regs);
+ do_IRQ(0);
else if (pending & STATUSF_IP1)
- do_IRQ(1, regs);
+ do_IRQ(1);
else if (pending & STATUSF_IP2)
- do_IRQ(2, regs);
+ do_IRQ(2);
else if (pending & STATUSF_IP3)
- do_IRQ(3, regs);
+ do_IRQ(3);
else if (pending & STATUSF_IP4)
- do_IRQ(4, regs);
+ do_IRQ(4);
else if (pending & STATUSF_IP5)
- do_IRQ(5, regs);
+ do_IRQ(5);
else if (pending & STATUSF_IP6)
- do_IRQ(6, regs);
+ do_IRQ(6);
else if (pending & STATUSF_IP7)
- ll_timer_interrupt(7, regs);
+ ll_timer_interrupt(7);
else {
/*
* Now look at the extended interrupts
*/
pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16;
if (pending & STATUSF_IP8)
- ll_mv64340_irq(regs);
+ ll_mv64340_irq();
}
}
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/tlbflush.h>
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status();
if (pending & STATUSF_IP0)
- do_IRQ(0, regs);
+ do_IRQ(0);
else if (pending & STATUSF_IP1)
- do_IRQ(1, regs);
+ do_IRQ(1);
else if (pending & STATUSF_IP2)
- do_IRQ(2, regs);
+ do_IRQ(2);
else if (pending & STATUSF_IP3)
- do_IRQ(3, regs);
+ do_IRQ(3);
else if (pending & STATUSF_IP4)
- do_IRQ(4, regs);
+ do_IRQ(4);
else if (pending & STATUSF_IP5)
- do_IRQ(5, regs);
+ do_IRQ(5);
else if (pending & STATUSF_IP6)
- do_IRQ(6, regs);
+ do_IRQ(6);
else if (pending & STATUSF_IP7)
- do_IRQ(7, regs);
+ do_IRQ(7);
else {
/*
* Now look at the extended interrupts
pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16;
if (pending & STATUSF_IP8)
- ll_mv64340_irq(regs);
+ ll_mv64340_irq();
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
}
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/mc146818rtc.h>
#include <asm/tlbflush.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel.h>
-#include <asm/ptrace.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <asm/io.h>
* Interrupt handler for interrupts coming from the FPGA chip.
* It could be built in ethernet ports etc...
*/
-void ll_cpci_irq(struct pt_regs *regs)
+void ll_cpci_irq(void)
{
unsigned int irq_src, irq_mask;
/* mask for just the interrupts we want */
irq_src &= ~irq_mask;
- do_IRQ(ls1bit8(irq_src) + CPCI_IRQ_BASE, regs);
+ do_IRQ(ls1bit8(irq_src) + CPCI_IRQ_BASE);
}
#define shutdown_cpci_irq disable_cpci_irq
no_action, IRQF_DISABLED, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL
};
-extern void ll_uart_irq(struct pt_regs *regs);
-extern void ll_cpci_irq(struct pt_regs *regs);
+extern void ll_uart_irq(void);
+extern void ll_cpci_irq(void);
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status();
if (pending & STATUSF_IP0)
- do_IRQ(0, regs);
+ do_IRQ(0);
else if (pending & STATUSF_IP1)
- do_IRQ(1, regs);
+ do_IRQ(1);
else if (pending & STATUSF_IP2)
- do_IRQ(2, regs);
+ do_IRQ(2);
else if (pending & STATUSF_IP3)
- ll_uart_irq(regs);
+ ll_uart_irq();
else if (pending & STATUSF_IP4)
- do_IRQ(4, regs);
+ do_IRQ(4);
else if (pending & STATUSF_IP5)
- ll_cpci_irq(regs);
+ ll_cpci_irq();
else if (pending & STATUSF_IP6)
- ll_mv64340_irq(regs);
+ ll_mv64340_irq();
else if (pending & STATUSF_IP7)
- do_IRQ(7, regs);
+ do_IRQ(7);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
void __init arch_init_irq(void)
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/marvell.h>
#include <linux/bootmem.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel.h>
-#include <asm/ptrace.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <asm/io.h>
/*
* Interrupt handler for interrupts coming from the FPGA chip.
*/
-void ll_uart_irq(struct pt_regs *regs)
+void ll_uart_irq(void)
{
unsigned int irq_src, irq_mask;
/* mask for just the interrupts we want */
irq_src &= ~irq_mask;
- do_IRQ(ls1bit8(irq_src) + 74, regs);
+ do_IRQ(ls1bit8(irq_src) + 74);
}
#define shutdown_uart_irq disable_uart_irq
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
-#include <asm/ptrace.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <asm/gt64240.h>
* we keep this particular structure in the function.
*/
-static irqreturn_t gt64240_p0int_irq(int irq, void *dev, struct pt_regs *regs)
+static irqreturn_t gt64240_p0int_irq(int irq, void *dev)
{
uint32_t irq_src, irq_src_mask;
int handled;
/* handle the timer call */
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
}
#include <asm/mipsregs.h>
#include <asm/system.h>
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status();
if (pending & STATUSF_IP2)
- do_IRQ(2, regs);
+ do_IRQ(2);
else if (pending & STATUSF_IP3)
- do_IRQ(3, regs);
+ do_IRQ(3);
else if (pending & STATUSF_IP4)
- do_IRQ(4, regs);
+ do_IRQ(4);
else if (pending & STATUSF_IP5)
- do_IRQ(5, regs);
+ do_IRQ(5);
else if (pending & STATUSF_IP6)
- do_IRQ(6, regs);
+ do_IRQ(6);
else if (pending & STATUSF_IP7)
- do_IRQ(7, regs);
+ do_IRQ(7);
else {
/*
* Now look at the extended interrupts
pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16;
if (pending & STATUSF_IP8)
- do_IRQ(8, regs);
+ do_IRQ(8);
else if (pending & STATUSF_IP9)
- do_IRQ(9, regs);
+ do_IRQ(9);
else if (pending & STATUSF_IP10)
- do_IRQ(10, regs);
+ do_IRQ(10);
else if (pending & STATUSF_IP11)
- do_IRQ(11, regs);
+ do_IRQ(11);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
}
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <linux/bootmem.h>
struct pt_regs;
-extern int null_perf_irq(struct pt_regs *regs);
-extern int (*perf_irq)(struct pt_regs *regs);
+extern int null_perf_irq(void);
+extern int (*perf_irq)(void);
/* Per-counter configuration as set via oprofilefs. */
struct op_counter_config {
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2004, 2005 by Ralf Baechle
+ * Copyright (C) 2004, 05, 06 by Ralf Baechle
* Copyright (C) 2005 by MIPS Technologies, Inc.
*/
#include <linux/oprofile.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
+#include <asm/irq_regs.h>
#include "op_impl.h"
}
}
-static int mipsxx_perfcount_handler(struct pt_regs *regs)
+static int mipsxx_perfcount_handler(void)
{
unsigned int counters = op_model_mipsxx_ops.num_counters;
unsigned int control;
counter = r_c0_perfcntr ## n(); \
if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \
(counter & M_COUNTER_OVERFLOW)) { \
- oprofile_add_sample(regs, n); \
+ oprofile_add_sample(get_irq_regs(), n); \
w_c0_perfcntr ## n(reg.counter[n]); \
handled = 1; \
}
* registered on the bridge error irq. It's conceivable that some of these
* conditions warrant a panic. Anybody care to say which ones?
*/
-static irqreturn_t macepci_error(int irq, void *dev, struct pt_regs *regs)
+static irqreturn_t macepci_error(int irq, void *dev)
{
char s;
unsigned int flags = mace->pci.error;
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
*/
+#include <linux/compiler.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/sched.h>
1 // 70
};
-static void hw0_irqdispatch(int irq, struct pt_regs *regs)
+static void hw0_irqdispatch(int irq)
{
/* find out which interrupt */
irq = PNX8550_GIC_VECTOR_0 >> 3;
printk("hw0_irqdispatch: irq 0, spurious interrupt?\n");
return;
}
- do_IRQ(PNX8550_INT_GIC_MIN + irq, regs);
+ do_IRQ(PNX8550_INT_GIC_MIN + irq);
}
-static void timer_irqdispatch(int irq, struct pt_regs *regs)
+static void timer_irqdispatch(int irq)
{
irq = (0x01c0 & read_c0_config7()) >> 6;
- if (irq == 0) {
+ if (unlikely(irq == 0)) {
printk("timer_irqdispatch: irq 0, spurious interrupt?\n");
return;
}
- if (irq & 0x1) {
- do_IRQ(PNX8550_INT_TIMER1, regs);
- }
- if (irq & 0x2) {
- do_IRQ(PNX8550_INT_TIMER2, regs);
- }
- if (irq & 0x4) {
- do_IRQ(PNX8550_INT_TIMER3, regs);
- }
+ if (irq & 0x1)
+ do_IRQ(PNX8550_INT_TIMER1);
+ if (irq & 0x2)
+ do_IRQ(PNX8550_INT_TIMER2);
+ if (irq & 0x4)
+ do_IRQ(PNX8550_INT_TIMER3);
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();
if (pending & STATUSF_IP2)
- hw0_irqdispatch(2, regs);
+ hw0_irqdispatch(2);
else if (pending & STATUSF_IP7) {
if (read_c0_config7() & 0x01c0)
- timer_irqdispatch(7, regs);
+ timer_irqdispatch(7);
}
- spurious_interrupt(regs);
+ spurious_interrupt();
}
static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
#define HYPERTRANSPORT_INTC 0x7a /* INTC# */
#define HYPERTRANSPORT_INTD 0x7b /* INTD# */
-extern void jaguar_mailbox_irq(struct pt_regs *);
-
/*
* Handle hypertransport & SMP interrupts. The interrupt lines are scarce.
* For interprocessor interrupts, the best thing to do is to use the INTMSG
* register. We use the same external interrupt line, i.e. INTB3 and monitor
* another status bit
*/
-asmlinkage void ll_ht_smp_irq_handler(int irq, struct pt_regs *regs)
+static void ll_ht_smp_irq_handler(int irq)
{
u32 status = OCD_READ(RM9000x2_OCD_INTP0STATUS4);
}
#endif /* CONFIG_HT_LEVEL_TRIGGER */
- do_IRQ(irq, regs);
-}
-
-asmlinkage void do_extended_irq(struct pt_regs *regs)
-{
- unsigned int intcontrol = read_c0_intcontrol();
- unsigned int cause = read_c0_cause();
- unsigned int status = read_c0_status();
- unsigned int pending_sr, pending_ic;
-
- pending_sr = status & cause & 0xff00;
- pending_ic = (cause >> 8) & intcontrol & 0xff00;
-
- if (pending_ic & (1 << 13))
- do_IRQ(13, regs);
-
+ do_IRQ(irq);
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int cause = read_c0_cause();
unsigned int status = read_c0_status();
unsigned int pending = cause & status;
if (pending & STATUSF_IP7) {
- do_IRQ(7, regs);
+ do_IRQ(7);
} else if (pending & STATUSF_IP2) {
#ifdef CONFIG_HYPERTRANSPORT
- ll_ht_smp_irq_handler(2, regs);
+ ll_ht_smp_irq_handler(2);
#else
- do_IRQ(2, regs);
+ do_IRQ(2);
#endif
} else if (pending & STATUSF_IP3) {
- do_IRQ(3, regs);
+ do_IRQ(3);
} else if (pending & STATUSF_IP4) {
- do_IRQ(4, regs);
+ do_IRQ(4);
} else if (pending & STATUSF_IP5) {
#ifdef CONFIG_SMP
- titan_mailbox_irq(regs);
+ titan_mailbox_irq();
#else
- do_IRQ(5, regs);
+ do_IRQ(5);
#endif
} else if (pending & STATUSF_IP6) {
- do_IRQ(4, regs);
+ do_IRQ(4);
}
}
register_gdb_console();
#endif
}
-
-#ifdef CONFIG_KGDB
-/*
- * The 16550 DUART has two ports, but is allocated one IRQ
- * for the serial console. Hence, a generic framework for
- * serial IRQ routing in place. Currently, just calls the
- * do_IRQ fuction. But, going in the future, need to check
- * DUART registers for channel A and B, then decide the
- * appropriate action
- */
-asmlinkage void yosemite_kgdb_irq(int irq, struct pt_regs *regs)
-{
- do_IRQ(irq, regs);
-}
-#endif
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/serial.h>
#include <asm/titan_dep.h>
{
}
-asmlinkage void titan_mailbox_irq(struct pt_regs *regs)
+asmlinkage void titan_mailbox_irq(void)
{
int cpu = smp_processor_id();
unsigned long status;
extern asmlinkage void qemu_handle_int(void);
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();
if (pending & 0x8000) {
- ll_timer_interrupt(Q_COUNT_COMPARE_IRQ, regs);
+ ll_timer_interrupt(Q_COUNT_COMPARE_IRQ);
return;
}
if (pending & 0x0400) {
int irq = i8259_irq();
if (likely(irq >= 0))
- do_IRQ(irq, regs);
+ do_IRQ(irq);
return;
}
#include <asm/system.h>
#include <asm/traps.h>
#include <asm/branch.h>
+#include <asm/irq_regs.h>
#include <asm/sgi/mc.h>
#include <asm/sgi/hpc3.h>
#include <asm/sgi/ioc.h>
* and then clear the interrupt when this happens.
*/
-void ip22_be_interrupt(int irq, struct pt_regs *regs)
+void ip22_be_interrupt(int irq)
{
const int field = 2 * sizeof(unsigned long);
+ const struct pt_regs *regs = get_irq_regs();
save_and_clear_buserr();
print_buserr();
return sig_str;
}
-static irqreturn_t ip22_eisa_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t ip22_eisa_intr(int irq, void *dev_id)
{
u8 eisa_irq;
u8 dma1, dma2;
dma2 = inb(EISA_DMA2_STATUS);
if (eisa_irq < EISA_MAX_IRQ) {
- do_IRQ(eisa_irq, regs);
+ do_IRQ(eisa_irq);
return IRQ_HANDLED;
}
outb(0x20, EISA_INT2_CTRL);
outb(0x20, EISA_INT1_CTRL);
+
return IRQ_NONE;
}
.end = end_local3_irq,
};
-static void indy_local0_irqdispatch(struct pt_regs *regs)
+static void indy_local0_irqdispatch(void)
{
u8 mask = sgint->istat0 & sgint->imask0;
u8 mask2;
/* if irq == 0, then the interrupt has already been cleared */
if (irq)
- do_IRQ(irq, regs);
- return;
+ do_IRQ(irq);
}
-static void indy_local1_irqdispatch(struct pt_regs *regs)
+static void indy_local1_irqdispatch(void)
{
u8 mask = sgint->istat1 & sgint->imask1;
u8 mask2;
/* if irq == 0, then the interrupt has already been cleared */
if (irq)
- do_IRQ(irq, regs);
- return;
+ do_IRQ(irq);
}
-extern void ip22_be_interrupt(int irq, struct pt_regs *regs);
+extern void ip22_be_interrupt(int irq);
-static void indy_buserror_irq(struct pt_regs *regs)
+static void indy_buserror_irq(void)
{
int irq = SGI_BUSERR_IRQ;
irq_enter();
kstat_this_cpu.irqs[irq]++;
- ip22_be_interrupt(irq, regs);
+ ip22_be_interrupt(irq);
irq_exit();
}
#define SGI_INTERRUPTS SGINT_LOCAL3
#endif
-extern void indy_r4k_timer_interrupt(struct pt_regs *regs);
-extern void indy_8254timer_irq(struct pt_regs *regs);
+extern void indy_r4k_timer_interrupt(void);
+extern void indy_8254timer_irq(void);
/*
* IRQs on the INDY look basically (barring software IRQs which we don't use
* another exception, big deal.
*/
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause();
* First we check for r4k counter/timer IRQ.
*/
if (pending & CAUSEF_IP7)
- indy_r4k_timer_interrupt(regs);
+ indy_r4k_timer_interrupt();
else if (pending & CAUSEF_IP2)
- indy_local0_irqdispatch(regs);
+ indy_local0_irqdispatch();
else if (pending & CAUSEF_IP3)
- indy_local1_irqdispatch(regs);
+ indy_local1_irqdispatch();
else if (pending & CAUSEF_IP6)
- indy_buserror_irq(regs);
+ indy_buserror_irq();
else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
- indy_8254timer_irq(regs);
+ indy_8254timer_irq();
}
extern void mips_cpu_irq_init(unsigned int irq_base);
}
/* Generic SGI handler for (spurious) 8254 interrupts */
-void indy_8254timer_irq(struct pt_regs *regs)
+void indy_8254timer_irq(void)
{
int irq = SGI_8254_0_IRQ;
ULONG cnt;
irq_exit();
}
-void indy_r4k_timer_interrupt(struct pt_regs *regs)
+void indy_r4k_timer_interrupt(void)
{
- struct pt_regs *old_regs = set_irq_regs(regs);
int irq = SGI_TIMER_IRQ;
irq_enter();
kstat_this_cpu.irqs[irq]++;
timer_interrupt(irq, NULL);
irq_exit();
- set_irq_regs(old_regs);
}
void __init plat_timer_setup(struct irqaction *irq)
#include <asm/mipsregs.h>
#include <asm/system.h>
-#include <asm/ptrace.h>
#include <asm/processor.h>
#include <asm/pci/bridge.h>
#include <asm/sn/addrs.h>
* Kanoj 05.13.00
*/
-static void ip27_do_irq_mask0(struct pt_regs *regs)
+static void ip27_do_irq_mask0(void)
{
int irq, swlevel;
hubreg_t pend0, mask0;
struct slice_data *si = cpu_data[cpu].data;
irq = si->level_to_irq[swlevel];
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
LOCAL_HUB_L(PI_INT_PEND0);
}
-static void ip27_do_irq_mask1(struct pt_regs *regs)
+static void ip27_do_irq_mask1(void)
{
int irq, swlevel;
hubreg_t pend1, mask1;
/* "map" swlevel to irq */
irq = si->level_to_irq[swlevel];
LOCAL_HUB_CLR_INTR(swlevel);
- do_IRQ(irq, regs);
+ do_IRQ(irq);
LOCAL_HUB_L(PI_INT_PEND1);
}
-static void ip27_prof_timer(struct pt_regs *regs)
+static void ip27_prof_timer(void)
{
panic("CPU %d got a profiling interrupt", smp_processor_id());
}
-static void ip27_hub_error(struct pt_regs *regs)
+static void ip27_hub_error(void)
{
panic("CPU %d got a hub error interrupt", smp_processor_id());
}
return irq;
}
-extern void ip27_rt_timer_interrupt(struct pt_regs *regs);
+extern void ip27_rt_timer_interrupt(void);
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned long pending = read_c0_cause() & read_c0_status();
if (pending & CAUSEF_IP4)
- ip27_rt_timer_interrupt(regs);
+ ip27_rt_timer_interrupt();
else if (pending & CAUSEF_IP2) /* PI_INT_PEND_0 or CC_PEND_{A|B} */
- ip27_do_irq_mask0(regs);
+ ip27_do_irq_mask0();
else if (pending & CAUSEF_IP3) /* PI_INT_PEND_1 */
- ip27_do_irq_mask1(regs);
+ ip27_do_irq_mask1();
else if (pending & CAUSEF_IP5)
- ip27_prof_timer(regs);
+ ip27_prof_timer();
else if (pending & CAUSEF_IP6)
- ip27_hub_error(regs);
+ ip27_hub_error();
}
void __init arch_init_irq(void)
static unsigned int rt_timer_irq;
-void ip27_rt_timer_interrupt(struct pt_regs *regs)
+void ip27_rt_timer_interrupt(void)
{
int cpu = smp_processor_id();
int cpuA = cputoslice(cpu) == 0;
if (cpu == 0)
do_timer(1);
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
/*
* If we have an externally synchronized Linux clock, then update
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
-#include <asm/ptrace.h>
#include <asm/page.h>
#include <asm/ip32/crime.h>
#include <asm/ip32/mace.h>
id, rev, field, (unsigned long) CRIME_BASE);
}
-irqreturn_t
-crime_memerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id)
{
unsigned long stat, addr;
int fatal = 0;
return IRQ_HANDLED;
}
-irqreturn_t
-crime_cpuerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t crime_cpuerr_intr(unsigned int irq, void *dev_id)
{
unsigned long stat = crime->cpu_error_stat & CRIME_CPU_ERROR_MASK;
unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK;
static DEFINE_SPINLOCK(ip32_irq_lock);
/* Some initial interrupts to set up */
-extern irqreturn_t crime_memerr_intr (int irq, void *dev_id,
- struct pt_regs *regs);
-extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id,
- struct pt_regs *regs);
+extern irqreturn_t crime_memerr_intr(int irq, void *dev_id);
+extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id);
struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED,
CPU_MASK_NONE, "CRIME memory error", NULL, NULL };
.end = end_mace_irq,
};
-static void ip32_unknown_interrupt(struct pt_regs *regs)
+static void ip32_unknown_interrupt(void)
{
printk ("Unknown interrupt occurred!\n");
printk ("cp0_status: %08x\n", read_c0_status());
printk ("MACE PCI control register: %08x\n", mace->pci.control);
printk("Register dump:\n");
- show_regs(regs);
+ show_regs(get_irq_regs());
printk("Please mail this report to linux-mips@linux-mips.org\n");
printk("Spinning...");
/* CRIME 1.1 appears to deliver all interrupts to this one pin. */
/* change this to loop over all edge-triggered irqs, exception masked out ones */
-static void ip32_irq0(struct pt_regs *regs)
+static void ip32_irq0(void)
{
uint64_t crime_int;
int irq = 0;
}
irq++;
DBG("*irq %u*\n", irq);
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
-static void ip32_irq1(struct pt_regs *regs)
+static void ip32_irq1(void)
{
- ip32_unknown_interrupt(regs);
+ ip32_unknown_interrupt();
}
-static void ip32_irq2(struct pt_regs *regs)
+static void ip32_irq2(void)
{
- ip32_unknown_interrupt(regs);
+ ip32_unknown_interrupt();
}
-static void ip32_irq3(struct pt_regs *regs)
+static void ip32_irq3(void)
{
- ip32_unknown_interrupt(regs);
+ ip32_unknown_interrupt();
}
-static void ip32_irq4(struct pt_regs *regs)
+static void ip32_irq4(void)
{
- ip32_unknown_interrupt(regs);
+ ip32_unknown_interrupt();
}
-static void ip32_irq5(struct pt_regs *regs)
+static void ip32_irq5(void)
{
- ll_timer_interrupt(IP32_R4K_TIMER_IRQ, regs);
+ ll_timer_interrupt(IP32_R4K_TIMER_IRQ);
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause();
if (likely(pending & IE_IRQ0))
- ip32_irq0(regs);
+ ip32_irq0();
else if (unlikely(pending & IE_IRQ1))
- ip32_irq1(regs);
+ ip32_irq1();
else if (unlikely(pending & IE_IRQ2))
- ip32_irq2(regs);
+ ip32_irq2();
else if (unlikely(pending & IE_IRQ3))
- ip32_irq3(regs);
+ ip32_irq3();
else if (unlikely(pending & IE_IRQ4))
- ip32_irq4(regs);
+ ip32_irq4();
else if (likely(pending & IE_IRQ5))
- ip32_irq5(regs);
+ ip32_irq5();
}
void __init arch_init_irq(void)
#include <linux/kernel_stat.h>
#include <asm/errno.h>
+#include <asm/irq_regs.h>
#include <asm/signal.h>
#include <asm/system.h>
-#include <asm/ptrace.h>
#include <asm/io.h>
#include <asm/sibyte/bcm1480_regs.h>
}
-static irqreturn_t bcm1480_dummy_handler(int irq, void *dev_id,
- struct pt_regs *regs)
+static irqreturn_t bcm1480_dummy_handler(int irq, void *dev_id)
{
return IRQ_NONE;
}
#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
-void bcm1480_kgdb_interrupt(struct pt_regs *regs)
+static void bcm1480_kgdb_interrupt(void)
{
/*
* Clear break-change status (allow some time for the remote
mdelay(500);
duart_out(R_DUART_CMD, V_DUART_MISC_CMD_RESET_BREAK_INT |
M_DUART_RX_EN | M_DUART_TX_EN);
- set_async_breakpoint(®s->cp0_epc);
+ set_async_breakpoint(&get_irq_regs()->cp0_epc);
}
#endif /* CONFIG_KGDB */
-extern void bcm1480_timer_interrupt(struct pt_regs *regs);
-extern void bcm1480_mailbox_interrupt(struct pt_regs *regs);
-extern void bcm1480_kgdb_interrupt(struct pt_regs *regs);
+extern void bcm1480_timer_interrupt(void);
+extern void bcm1480_mailbox_interrupt(void);
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending;
#ifdef CONFIG_SIBYTE_BCM1480_PROF
if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */
- sbprof_cpu_intr(exception_epc(regs));
+ sbprof_cpu_intr();
else
#endif
if (pending & CAUSEF_IP4)
- bcm1480_timer_interrupt(regs);
+ bcm1480_timer_interrupt();
#ifdef CONFIG_SMP
else if (pending & CAUSEF_IP3)
- bcm1480_mailbox_interrupt(regs);
+ bcm1480_mailbox_interrupt();
#endif
#ifdef CONFIG_KGDB
else if (pending & CAUSEF_IP6)
- bcm1480_kgdb_interrupt(regs); /* KGDB (uart 1) */
+ bcm1480_kgdb_interrupt(); /* KGDB (uart 1) */
#endif
else if (pending & CAUSEF_IP2) {
if (mask_h) {
if (mask_h ^ 1)
- do_IRQ(fls64(mask_h) - 1, regs);
+ do_IRQ(fls64(mask_h) - 1);
else
- do_IRQ(63 + fls64(mask_l), regs);
+ do_IRQ(63 + fls64(mask_l));
}
}
}
__raw_writeq((((u64)action)<< 48), mailbox_0_set_regs[cpu]);
}
-void bcm1480_mailbox_interrupt(struct pt_regs *regs)
+void bcm1480_mailbox_interrupt(void)
{
int cpu = smp_processor_id();
unsigned int action;
#include <linux/kernel_stat.h>
#include <asm/irq.h>
-#include <asm/ptrace.h>
#include <asm/addrspace.h>
#include <asm/time.h>
#include <asm/io.h>
#include <asm/sibyte/sb1250.h>
-void bcm1480_timer_interrupt(struct pt_regs *regs)
+void bcm1480_timer_interrupt(void)
{
int cpu = smp_processor_id();
- int irq = K_BCM1480_INT_TIMER_0+cpu;
+ int irq = K_BCM1480_INT_TIMER_0 + cpu;
/* Reset the timer */
__raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
/*
* CPU 0 handles the global timer interrupt job
*/
- ll_timer_interrupt(irq, regs);
+ ll_timer_interrupt(irq);
}
else {
/*
* other CPUs should just do profiling and process accounting
*/
- ll_local_timer_interrupt(irq, regs);
+ ll_local_timer_interrupt(irq);
}
}
#include <asm/errno.h>
#include <asm/signal.h>
#include <asm/system.h>
-#include <asm/ptrace.h>
#include <asm/io.h>
#include <asm/sibyte/sb1250_regs.h>
}
-static irqreturn_t sb1250_dummy_handler(int irq, void *dev_id,
- struct pt_regs *regs)
+static irqreturn_t sb1250_dummy_handler(int irq, void *dev_id)
{
return IRQ_NONE;
}
#define duart_out(reg, val) csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
#define duart_in(reg) csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
-static void sb1250_kgdb_interrupt(struct pt_regs *regs)
+static void sb1250_kgdb_interrupt(void)
{
/*
* Clear break-change status (allow some time for the remote
mdelay(500);
duart_out(R_DUART_CMD, V_DUART_MISC_CMD_RESET_BREAK_INT |
M_DUART_RX_EN | M_DUART_TX_EN);
- set_async_breakpoint(®s->cp0_epc);
+ set_async_breakpoint(&get_irq_regs()->cp0_epc);
}
#endif /* CONFIG_KGDB */
-extern void sb1250_timer_interrupt(struct pt_regs *regs);
-extern void sb1250_mailbox_interrupt(struct pt_regs *regs);
-extern void sb1250_kgdb_interrupt(struct pt_regs *regs);
+extern void sb1250_timer_interrupt(void);
+extern void sb1250_mailbox_interrupt(void);
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending;
#ifdef CONFIG_SIBYTE_SB1250_PROF
if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */
- sbprof_cpu_intr(exception_epc(regs));
+ sbprof_cpu_intr();
else
#endif
if (pending & CAUSEF_IP4)
- sb1250_timer_interrupt(regs);
+ sb1250_timer_interrupt();
#ifdef CONFIG_SMP
else if (pending & CAUSEF_IP3)
- sb1250_mailbox_interrupt(regs);
+ sb1250_mailbox_interrupt();
#endif
#ifdef CONFIG_KGDB
else if (pending & CAUSEF_IP6) /* KGDB (uart 1) */
- sb1250_kgdb_interrupt(regs);
+ sb1250_kgdb_interrupt();
#endif
else if (pending & CAUSEF_IP2) {
mask = __raw_readq(IOADDR(A_IMR_REGISTER(smp_processor_id(),
R_IMR_INTERRUPT_STATUS_BASE)));
if (mask)
- do_IRQ(fls64(mask) - 1, regs);
+ do_IRQ(fls64(mask) - 1);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
} else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
__raw_writeq((((u64)action) << 48), mailbox_set_regs[cpu]);
}
-void sb1250_mailbox_interrupt(struct pt_regs *regs)
+void sb1250_mailbox_interrupt(void)
{
int cpu = smp_processor_id();
unsigned int action;
#include <linux/kernel_stat.h>
#include <asm/irq.h>
-#include <asm/ptrace.h>
#include <asm/addrspace.h>
#include <asm/time.h>
#include <asm/io.h>
*/
}
-void sb1250_timer_interrupt(struct pt_regs *regs)
+void sb1250_timer_interrupt(void)
{
int cpu = smp_processor_id();
int irq = K_INT_TIMER_0 + cpu;
/*
* CPU 0 handles the global timer interrupt job
*/
- ll_timer_interrupt(irq, regs);
+ ll_timer_interrupt(irq);
}
else {
/*
* other CPUs should just do profiling and process accounting
*/
- ll_local_timer_interrupt(irq, regs);
+ ll_local_timer_interrupt(irq);
}
}
* hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug
* button interrupts. Later ...
*/
-static void pciasic_hwint0(struct pt_regs *regs)
+static void pciasic_hwint0(void)
{
panic("Received int0 but no handler yet ...");
}
/* This interrupt was used for the com1 console on the first prototypes. */
-static void pciasic_hwint2(struct pt_regs *regs)
+static void pciasic_hwint2(void)
{
/* I think this shouldn't happen on production machines. */
panic("hwint2 and no handler yet");
}
/* hwint5 is the r4k count / compare interrupt */
-static void pciasic_hwint5(struct pt_regs *regs)
+static void pciasic_hwint5(void)
{
panic("hwint5 and no handler yet");
}
*
* The EISA_INT bit in CSITPEND is high active, all others are low active.
*/
-static void pciasic_hwint1(struct pt_regs *regs)
+static void pciasic_hwint1(void)
{
u8 pend = *(volatile char *)PCIMT_CSITPEND;
unsigned long flags;
if (unlikely(irq < 0))
return;
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
if (!(pend & IT_SCSI)) {
flags = read_c0_status();
clear_c0_status(ST0_IM);
- do_IRQ(PCIMT_IRQ_SCSI, regs);
+ do_IRQ(PCIMT_IRQ_SCSI);
write_c0_status(flags);
}
}
/*
* hwint 3 should deal with the PCI A - D interrupts,
*/
-static void pciasic_hwint3(struct pt_regs *regs)
+static void pciasic_hwint3(void)
{
u8 pend = *(volatile char *)PCIMT_CSITPEND;
int irq;
pend &= (IT_INTA | IT_INTB | IT_INTC | IT_INTD);
clear_c0_status(IE_IRQ3);
irq = PCIMT_IRQ_INT2 + ls1bit8(pend);
- do_IRQ(irq, regs);
+ do_IRQ(irq);
set_c0_status(IE_IRQ3);
}
/*
* hwint 4 is used for only the onboard PCnet 32.
*/
-static void pciasic_hwint4(struct pt_regs *regs)
+static void pciasic_hwint4(void)
{
clear_c0_status(IE_IRQ4);
- do_IRQ(PCIMT_IRQ_ETHERNET, regs);
+ do_IRQ(PCIMT_IRQ_ETHERNET);
set_c0_status(IE_IRQ4);
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();
static unsigned char led_cache;
*(volatile unsigned char *) PCIMT_CSLED = ++led_cache;
if (pending & 0x0800)
- pciasic_hwint1(regs);
+ pciasic_hwint1();
else if (pending & 0x4000)
- pciasic_hwint4(regs);
+ pciasic_hwint4();
else if (pending & 0x2000)
- pciasic_hwint3(regs);
+ pciasic_hwint3();
else if (pending & 0x1000)
- pciasic_hwint2(regs);
+ pciasic_hwint2();
else if (pending & 0x8000)
- pciasic_hwint5(regs);
+ pciasic_hwint5();
else if (pending & 0x0400)
- pciasic_hwint0(regs);
+ pciasic_hwint0();
}
void __init init_pciasic(void)
#include <asm/irq.h>
#include <asm/mc146818-time.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/sni.h>
#include <asm/time.h>
return (sw_irq);
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_status() & read_c0_cause();
if (pending & STATUSF_IP7) /* cpu timer */
- do_IRQ(TX4927_IRQ_CPU_TIMER, regs);
+ do_IRQ(TX4927_IRQ_CPU_TIMER);
else if (pending & STATUSF_IP2) { /* tx4927 pic */
unsigned int irq = tx4927_irq_nested();
if (unlikely(irq == 0)) {
- spurious_interrupt(regs);
+ spurious_interrupt();
return;
}
- do_IRQ(irq, regs);
+ do_IRQ(irq);
} else if (pending & STATUSF_IP0) /* user line 0 */
- do_IRQ(TX4927_IRQ_USER0, regs);
+ do_IRQ(TX4927_IRQ_USER0);
else if (pending & STATUSF_IP1) /* user line 1 */
- do_IRQ(TX4927_IRQ_USER1, regs);
+ do_IRQ(TX4927_IRQ_USER1);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <linux/bootmem.h>
#include <asm/page.h>
#include <asm/io.h>
#include <asm/irq.h>
+#include <asm/irq_regs.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <linux/bootmem.h>
char *toshiba_name = "";
#ifdef CONFIG_PCI
-static void tx4927_pcierr_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
+static void tx4927_pcierr_interrupt(int irq, void *dev_id)
{
#ifdef CONFIG_BLK_DEV_IDEPCI
/* ignore MasterAbort for ide probing... */
(unsigned long) tx4927_ccfgptr->ccfg,
(unsigned long) (tx4927_ccfgptr->tear >> 32),
(unsigned long) tx4927_ccfgptr->tear);
- show_regs(regs);
+ show_regs(get_irq_regs());
}
void __init toshiba_rbtx4927_pci_irq_init(void)
irq_desc[i].depth = 1;
irq_desc[i].chip = &tx4938_irq_cp0_type;
}
-
- return;
}
static unsigned int
{
tx4938_irq_cp0_enable(irq);
- return (0);
+ return 0;
}
static void
clear_c0_status(tx4938_irq_cp0_mask(irq));
spin_unlock_irqrestore(&tx4938_cp0_lock, flags);
-
- return;
}
static void
tx4938_irq_cp0_mask_and_ack(unsigned int irq)
{
tx4938_irq_cp0_disable(irq);
-
- return;
}
static void
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
tx4938_irq_cp0_enable(irq);
}
-
- return;
}
/**********************************************************************************/
}
}
- return (0);
+ return 0;
}
u32
return (0x00000007);
}
}
- return (0x00000000);
+ return 0x00000000;
}
static void
TX4938_WR(pic_reg, val);
mmiowb();
TX4938_RD(pic_reg);
-
- return;
}
static void __init
TX4938_WR(0xff1ff600, TX4938_RD(0xff1ff600) | 0x1); /* irq enable */
spin_unlock_irqrestore(&tx4938_pic_lock, flags);
-
- return;
}
static unsigned int
{
tx4938_irq_pic_enable(irq);
- return (0);
+ return 0;
}
static void
tx4938_irq_pic_shutdown(unsigned int irq)
{
tx4938_irq_pic_disable(irq);
-
- return;
}
static void
tx4938_irq_pic_mask(irq));
spin_unlock_irqrestore(&tx4938_pic_lock, flags);
-
- return;
}
static void
tx4938_irq_pic_mask(irq), 0);
spin_unlock_irqrestore(&tx4938_pic_lock, flags);
-
- return;
}
static void
tx4938_irq_pic_mask_and_ack(unsigned int irq)
{
tx4938_irq_pic_disable(irq);
-
- return;
}
static void
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
tx4938_irq_pic_enable(irq);
}
-
- return;
}
/**********************************************************************************/
{
tx4938_irq_cp0_init();
tx4938_irq_pic_init();
-
- return;
}
int
}
wbflush();
- return (sw_irq);
+ return sw_irq;
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status();
if (pending & STATUSF_IP7)
- do_IRQ(TX4938_IRQ_CPU_TIMER, regs);
+ do_IRQ(TX4938_IRQ_CPU_TIMER);
else if (pending & STATUSF_IP2) {
int irq = tx4938_irq_nested();
if (irq)
- do_IRQ(irq, regs);
+ do_IRQ(irq);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
} else if (pending & STATUSF_IP1)
- do_IRQ(TX4938_IRQ_USER1, regs);
+ do_IRQ(TX4938_IRQ_USER1);
else if (pending & STATUSF_IP0)
- do_IRQ(TX4938_IRQ_USER0, regs);
+ do_IRQ(TX4938_IRQ_USER0);
}
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <linux/bootmem.h>
}
static DECLARE_WAIT_QUEUE_HEAD(txx9_spi_wait);
-static void txx9_spi_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+
+static void txx9_spi_interrupt(int irq, void *dev_id)
{
/* disable rx intr */
tx4938_spiptr->cr0 &= ~TXx9_SPCR0_RBSIE;
EXPORT_SYMBOL(vr41xx_set_intassign);
-static int icu_get_irq(unsigned int irq, struct pt_regs *regs)
+static int icu_get_irq(unsigned int irq)
{
uint16_t pend1, pend2;
uint16_t mask1, mask2;
#include <asm/vr41xx/irq.h>
typedef struct irq_cascade {
- int (*get_irq)(unsigned int, struct pt_regs *);
+ int (*get_irq)(unsigned int);
} irq_cascade_t;
static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned;
.name = "cascade",
};
-int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *))
+int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int))
{
int retval = 0;
EXPORT_SYMBOL_GPL(cascade_irq);
-static void irq_dispatch(unsigned int irq, struct pt_regs *regs)
+static void irq_dispatch(unsigned int irq)
{
irq_cascade_t *cascade;
struct irq_desc *desc;
unsigned int source_irq = irq;
desc = irq_desc + source_irq;
desc->chip->ack(source_irq);
- irq = cascade->get_irq(irq, regs);
+ irq = cascade->get_irq(irq);
if (irq < 0)
atomic_inc(&irq_err_count);
else
- irq_dispatch(irq, regs);
+ irq_dispatch(irq);
desc->chip->end(source_irq);
} else
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
if (pending & CAUSEF_IP7)
- do_IRQ(7, regs);
+ do_IRQ(7);
else if (pending & 0x7800) {
if (pending & CAUSEF_IP3)
- irq_dispatch(3, regs);
+ irq_dispatch(3);
else if (pending & CAUSEF_IP4)
- irq_dispatch(4, regs);
+ irq_dispatch(4);
else if (pending & CAUSEF_IP5)
- irq_dispatch(5, regs);
+ irq_dispatch(5);
else if (pending & CAUSEF_IP6)
- irq_dispatch(6, regs);
+ irq_dispatch(6);
} else if (pending & CAUSEF_IP2)
- irq_dispatch(2, regs);
+ irq_dispatch(2);
else if (pending & CAUSEF_IP0)
- do_IRQ(0, regs);
+ do_IRQ(0);
else if (pending & CAUSEF_IP1)
- do_IRQ(1, regs);
+ do_IRQ(1);
else
- spurious_interrupt(regs);
+ spurious_interrupt();
}
void __init arch_init_irq(void)
/* make the generic dma mask a pointer to the parisc one */
dev->dev.dma_mask = &dev->dma_mask;
dev->dev.coherent_dma_mask = dev->dma_mask;
- if (!device_register(&dev->dev)) {
+ if (device_register(&dev->dev)) {
kfree(dev);
return NULL;
}
*/
void init_parisc_bus(void)
{
- if (!bus_register(&parisc_bus_type))
+ if (bus_register(&parisc_bus_type))
panic("Could not register PA-RISC bus type\n");
- if (!device_register(&root))
+ if (device_register(&root))
panic("Could not register PA-RISC root device\n");
get_device(&root);
}
{
#ifdef __LP64__
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_MODEL, PDC_MODEL_CAPABILITIES, __pa(pdc_result), 0);
convert_to_wide(pdc_result);
if(pdc_result[0] != NARROW_FIRMWARE)
parisc_narrow_firmware = 0;
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
#endif
}
int pdc_add_valid(unsigned long address)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_ADD_VALID, PDC_ADD_VALID_VERIFY, address);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int __init pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
memcpy(&pdc_result, chassis_info, sizeof(*chassis_info));
memcpy(&pdc_result2, led_info, len);
retval = mem_pdc_call(PDC_CHASSIS, PDC_RETURN_CHASSIS_INFO,
__pa(pdc_result), __pa(pdc_result2), len);
memcpy(chassis_info, pdc_result, sizeof(*chassis_info));
memcpy(led_info, pdc_result2, len);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_pat_chassis_send_log(unsigned long state, unsigned long data)
{
int retval = 0;
+ unsigned long flags;
if (!is_pdc_pat())
return -1;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_PAT_CHASSIS_LOG, PDC_PAT_CHASSIS_WRITE_LOG, __pa(&state), __pa(&data));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_chassis_disp(unsigned long disp)
{
int retval = 0;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_CHASSIS, PDC_CHASSIS_DISP, disp);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_chassis_warn(unsigned long *warn)
{
int retval = 0;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_CHASSIS, PDC_CHASSIS_WARN, __pa(pdc_result));
*warn = pdc_result[0];
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int __init pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_COPROC, PDC_COPROC_CFG, __pa(pdc_result));
convert_to_wide(pdc_result);
pdc_coproc_info->ccr_functional = pdc_result[0];
pdc_coproc_info->ccr_present = pdc_result[1];
pdc_coproc_info->revision = pdc_result[17];
pdc_coproc_info->model = pdc_result[18];
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
void *iodc_data, unsigned int iodc_data_size)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_IODC, PDC_IODC_READ, __pa(pdc_result), hpa,
index, __pa(pdc_result2), iodc_data_size);
convert_to_wide(pdc_result);
*actcnt = pdc_result[0];
memcpy(iodc_data, pdc_result2, iodc_data_size);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
struct pdc_module_path *mod_path, long mod_index)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_SYSTEM_MAP, PDC_FIND_MODULE, __pa(pdc_result),
__pa(pdc_result2), mod_index);
convert_to_wide(pdc_result);
memcpy(pdc_mod_info, pdc_result, sizeof(*pdc_mod_info));
memcpy(mod_path, pdc_result2, sizeof(*mod_path));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
pdc_mod_info->mod_addr = f_extend(pdc_mod_info->mod_addr);
return retval;
long mod_index, long addr_index)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_SYSTEM_MAP, PDC_FIND_ADDRESS, __pa(pdc_result),
mod_index, addr_index);
convert_to_wide(pdc_result);
memcpy(pdc_addr_info, pdc_result, sizeof(*pdc_addr_info));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
pdc_addr_info->mod_addr = f_extend(pdc_addr_info->mod_addr);
return retval;
int pdc_model_info(struct pdc_model *model)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_MODEL, PDC_MODEL_INFO, __pa(pdc_result), 0);
convert_to_wide(pdc_result);
memcpy(model, pdc_result, sizeof(*model));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_model_sysmodel(char *name)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_MODEL, PDC_MODEL_SYSMODEL, __pa(pdc_result),
OS_ID_HPUX, __pa(name));
convert_to_wide(pdc_result);
} else {
name[0] = 0;
}
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_model_versions(unsigned long *versions, int id)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_MODEL, PDC_MODEL_VERSIONS, __pa(pdc_result), id);
convert_to_wide(pdc_result);
*versions = pdc_result[0];
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_model_cpuid(unsigned long *cpu_id)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
pdc_result[0] = 0; /* preset zero (call may not be implemented!) */
retval = mem_pdc_call(PDC_MODEL, PDC_MODEL_CPU_ID, __pa(pdc_result), 0);
convert_to_wide(pdc_result);
*cpu_id = pdc_result[0];
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_model_capabilities(unsigned long *capabilities)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
pdc_result[0] = 0; /* preset zero (call may not be implemented!) */
retval = mem_pdc_call(PDC_MODEL, PDC_MODEL_CAPABILITIES, __pa(pdc_result), 0);
convert_to_wide(pdc_result);
*capabilities = pdc_result[0];
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_cache_info(struct pdc_cache_info *cache_info)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_CACHE, PDC_CACHE_INFO, __pa(pdc_result), 0);
convert_to_wide(pdc_result);
memcpy(cache_info, pdc_result, sizeof(*cache_info));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_spaceid_bits(unsigned long *space_bits)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
pdc_result[0] = 0;
retval = mem_pdc_call(PDC_CACHE, PDC_CACHE_RET_SPID, __pa(pdc_result), 0);
convert_to_wide(pdc_result);
*space_bits = pdc_result[0];
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_btlb_info(struct pdc_btlb_info *btlb)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_BLOCK_TLB, PDC_BTLB_INFO, __pa(pdc_result), 0);
memcpy(btlb, pdc_result, sizeof(*btlb));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
if(retval < 0) {
btlb->max_size = 0;
struct pdc_module_path *mod_path)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
memcpy(pdc_result2, mod_path, sizeof(*mod_path));
retval = mem_pdc_call(PDC_MEM_MAP, PDC_MEM_MAP_HPA, __pa(pdc_result),
__pa(pdc_result2));
memcpy(address, pdc_result, sizeof(*address));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_lan_station_id(char *lan_addr, unsigned long hpa)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_LAN_STATION_ID, PDC_LAN_STATION_ID_READ,
__pa(pdc_result), hpa);
if (retval < 0) {
} else {
memcpy(lan_addr, pdc_result, PDC_LAN_STATION_ID_SIZE);
}
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_STABLE, PDC_STABLE_READ, staddr,
__pa(pdc_result), count);
convert_to_wide(pdc_result);
memcpy(memaddr, pdc_result, count);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
memcpy(pdc_result, memaddr, count);
convert_to_wide(pdc_result);
retval = mem_pdc_call(PDC_STABLE, PDC_STABLE_WRITE, staddr,
__pa(pdc_result), count);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_stable_get_size(unsigned long *size)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_STABLE, PDC_STABLE_RETURN_SIZE, __pa(pdc_result));
*size = pdc_result[0];
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_stable_verify_contents(void)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_STABLE, PDC_STABLE_VERIFY_CONTENTS);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_stable_initialize(void)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_STABLE, PDC_STABLE_INITIALIZE);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_get_initiator(struct hardware_path *hwpath, struct pdc_initiator *initiator)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
/* BCJ-XXXX series boxes. E.G. "9000/785/C3000" */
#define IS_SPROCKETS() (strlen(boot_cpu_data.pdc.sys_model_name) == 14 && \
}
out:
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
+
return (retval >= PDC_OK);
}
EXPORT_SYMBOL(pdc_get_initiator);
int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_PCI_INDEX, PDC_PCI_GET_INT_TBL_SIZE,
__pa(pdc_result), hpa);
convert_to_wide(pdc_result);
*num_entries = pdc_result[0];
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl)
{
int retval;
+ unsigned long flags;
BUG_ON((unsigned long)tbl & 0x7);
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
pdc_result[0] = num_entries;
retval = mem_pdc_call(PDC_PCI_INDEX, PDC_PCI_GET_INT_TBL,
__pa(pdc_result), hpa, __pa(tbl));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
unsigned int pdc_pci_config_read(void *hpa, unsigned long cfg_addr)
{
int retval;
- spin_lock_irq(&pdc_lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pdc_lock, flags);
pdc_result[0] = 0;
pdc_result[1] = 0;
retval = mem_pdc_call(PDC_PCI_INDEX, PDC_PCI_READ_CONFIG,
__pa(pdc_result), hpa, cfg_addr&~3UL, 4UL);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
+
return retval ? ~0 : (unsigned int) pdc_result[0];
}
void pdc_pci_config_write(void *hpa, unsigned long cfg_addr, unsigned int val)
{
int retval;
- spin_lock_irq(&pdc_lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pdc_lock, flags);
pdc_result[0] = 0;
retval = mem_pdc_call(PDC_PCI_INDEX, PDC_PCI_WRITE_CONFIG,
__pa(pdc_result), hpa,
cfg_addr&~3UL, 4UL, (unsigned long) val);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
+
return retval;
}
#endif /* UNTESTED CODE */
int pdc_tod_read(struct pdc_tod *tod)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_TOD, PDC_TOD_READ, __pa(pdc_result), 0);
convert_to_wide(pdc_result);
memcpy(tod, pdc_result, sizeof(*tod));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_tod_set(unsigned long sec, unsigned long usec)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_TOD, PDC_TOD_WRITE, sec, usec);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
struct pdc_memory_table *tbl, unsigned long entries)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_MEM, PDC_MEM_TABLE, __pa(pdc_result), __pa(pdc_result2), entries);
convert_to_wide(pdc_result);
memcpy(r_addr, pdc_result, sizeof(*r_addr));
memcpy(tbl, pdc_result2, entries * sizeof(*tbl));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_do_firm_test_reset(unsigned long ftc_bitmap)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_BROADCAST_RESET, PDC_DO_FIRM_TEST_RESET,
PDC_FIRM_TEST_MAGIC, ftc_bitmap);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_do_reset(void)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_BROADCAST_RESET, PDC_DO_RESET);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int __init pdc_soft_power_info(unsigned long *power_reg)
{
int retval;
+ unsigned long flags;
*power_reg = (unsigned long) (-1);
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_SOFT_POWER, PDC_SOFT_POWER_INFO, __pa(pdc_result), 0);
if (retval == PDC_OK) {
convert_to_wide(pdc_result);
*power_reg = f_extend(pdc_result[0]);
}
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_soft_power_button(int sw_control)
{
int retval;
- spin_lock_irq(&pdc_lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_SOFT_POWER, PDC_SOFT_POWER_ENABLE, __pa(pdc_result), sw_control);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
+
return retval;
}
*/
void pdc_io_reset(void)
{
- spin_lock_irq(&pdc_lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pdc_lock, flags);
mem_pdc_call(PDC_IO, PDC_IO_RESET, 0);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
}
/*
*/
void pdc_io_reset_devices(void)
{
- spin_lock_irq(&pdc_lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pdc_lock, flags);
mem_pdc_call(PDC_IO, PDC_IO_RESET_DEVICES, 0);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
}
unsigned long glob_cfg)
{
int retval;
+ unsigned long irqflags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, irqflags);
retval = real32_call(func, flags, inptr, outputr, glob_cfg);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, irqflags);
return retval;
}
int pdc_pat_cell_get_number(struct pdc_pat_cell_num *cell_info)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_PAT_CELL, PDC_PAT_CELL_GET_NUMBER, __pa(pdc_result));
memcpy(cell_info, pdc_result, sizeof(*cell_info));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
unsigned long view_type, void *mem_addr)
{
int retval;
+ unsigned long flags;
static struct pdc_pat_cell_mod_maddr_block result __attribute__ ((aligned (8)));
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_PAT_CELL, PDC_PAT_CELL_MODULE, __pa(pdc_result),
ploc, mod, view_type, __pa(&result));
if(!retval) {
*actcnt = pdc_result[0];
memcpy(mem_addr, &result, *actcnt);
}
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, void *hpa)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_PAT_CPU, PDC_PAT_CPU_GET_NUMBER,
__pa(&pdc_result), hpa);
memcpy(cpu_info, pdc_result, sizeof(*cpu_info));
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_pat_get_irt_size(unsigned long *num_entries, unsigned long cell_num)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_PAT_IO, PDC_PAT_IO_GET_PCI_ROUTING_TABLE_SIZE,
__pa(pdc_result), cell_num);
*num_entries = pdc_result[0];
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_pat_get_irt(void *r_addr, unsigned long cell_num)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_PAT_IO, PDC_PAT_IO_GET_PCI_ROUTING_TABLE,
__pa(r_addr), cell_num);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
unsigned long count, unsigned long offset)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_PAT_PD, PDC_PAT_PD_GET_ADDR_MAP, __pa(pdc_result),
__pa(pdc_result2), count, offset);
*actual_len = pdc_result[0];
memcpy(mem_addr, pdc_result2, *actual_len);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_pat_io_pci_cfg_read(unsigned long pci_addr, int pci_size, u32 *mem_addr)
{
int retval;
- spin_lock_irq(&pdc_lock);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_PAT_IO, PDC_PAT_IO_PCI_CONFIG_READ,
__pa(pdc_result), pci_addr, pci_size);
switch(pci_size) {
case 2: *(u16 *)mem_addr = (u16) pdc_result[0];
case 4: *(u32 *)mem_addr = (u32) pdc_result[0];
}
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
int pdc_pat_io_pci_cfg_write(unsigned long pci_addr, int pci_size, u32 val)
{
int retval;
+ unsigned long flags;
- spin_lock_irq(&pdc_lock);
+ spin_lock_irqsave(&pdc_lock, flags);
retval = mem_pdc_call(PDC_PAT_IO, PDC_PAT_IO_PCI_CONFIG_WRITE,
pci_addr, pci_size, val);
- spin_unlock_irq(&pdc_lock);
+ spin_unlock_irqrestore(&pdc_lock, flags);
return retval;
}
#undef PARISC_IRQ_CR16_COUNTS
-extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *);
-extern irqreturn_t ipi_interrupt(int, void *, struct pt_regs *);
+extern irqreturn_t timer_interrupt(int, void *);
+extern irqreturn_t ipi_interrupt(int, void *);
#define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq))
/* ONLY called from entry.S:intr_extint() */
void do_cpu_irq_mask(struct pt_regs *regs)
{
+ struct pt_regs *old_regs;
unsigned long eirr_val;
int irq, cpu = smp_processor_id();
#ifdef CONFIG_SMP
cpumask_t dest;
#endif
+ old_regs = set_irq_regs(regs);
local_irq_disable();
irq_enter();
goto set_out;
}
#endif
- __do_IRQ(irq, regs);
+ __do_IRQ(irq);
out:
irq_exit();
+ set_irq_regs(old_regs);
return;
set_out:
irqreturn_t
-ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+ipi_interrupt(int irq, void *dev_id)
{
int this_cpu = smp_processor_id();
struct cpuinfo_parisc *p = &cpu_data[this_cpu];
on_each_cpu(flush_tlb_all_local, NULL, 1, 1);
}
-
-void
-smp_do_timer(struct pt_regs *regs)
-{
- int cpu = smp_processor_id();
- struct cpuinfo_parisc *data = &cpu_data[cpu];
-
- if (!--data->prof_counter) {
- data->prof_counter = data->prof_multiplier;
- update_process_times(user_mode(regs));
- }
-}
-
/*
* Called by secondaries to update state and initialize CPU registers.
*/
static unsigned long clocktick __read_mostly; /* timer cycles per tick */
-#ifdef CONFIG_SMP
-extern void smp_do_timer(struct pt_regs *regs);
-#endif
-
/*
* We keep time on PA-RISC Linux by using the Interval Timer which is
* a pair of registers; one is read-only and one is write-only; both
* held off for an arbitrarily long period of time by interrupts being
* disabled, so we may miss one or more ticks.
*/
-irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t timer_interrupt(int irq, void *dev_id)
{
unsigned long now;
unsigned long next_tick;
unsigned long cycles_elapsed, ticks_elapsed;
unsigned long cycles_remainder;
unsigned int cpu = smp_processor_id();
+ struct cpuinfo_parisc *cpuinfo = &cpu_data[cpu];
/* gcc can optimize for "read-only" case with a local clocktick */
unsigned long cpt = clocktick;
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
/* Initialize next_tick to the expected tick time. */
- next_tick = cpu_data[cpu].it_value;
+ next_tick = cpuinfo->it_value;
/* Get current interval timer.
* CR16 reads as 64 bits in CPU wide mode.
*/
next_tick = now + cycles_remainder;
- cpu_data[cpu].it_value = next_tick;
+ cpuinfo->it_value = next_tick;
/* Skip one clocktick on purpose if we are likely to miss next_tick.
* We want to avoid the new next_tick being less than CR16.
next_tick += cpt;
/* Program the IT when to deliver the next interrupt. */
- /* Only bottom 32-bits of next_tick are written to cr16. */
+ /* Only bottom 32-bits of next_tick are written to cr16. */
mtctl(next_tick, 16);
/* Done mucking with unreliable delivery of interrupts.
* Go do system house keeping.
*/
-#ifdef CONFIG_SMP
- smp_do_timer(regs);
-#else
- update_process_times(user_mode(regs));
-#endif
+
+ if (!--cpuinfo->prof_counter) {
+ cpuinfo->prof_counter = cpuinfo->prof_multiplier;
+ update_process_times(user_mode(get_irq_regs()));
+ }
+
if (cpu == 0) {
write_seqlock(&xtime_lock);
do_timer(ticks_elapsed);
start_cpu_itimer(); /* get CPU 0 started */
- if(pdc_tod_read(&tod_data) == 0) {
- write_seqlock_irq(&xtime_lock);
+ if (pdc_tod_read(&tod_data) == 0) {
+ unsigned long flags;
+
+ write_seqlock_irqsave(&xtime_lock, flags);
xtime.tv_sec = tod_data.tod_sec;
xtime.tv_nsec = tod_data.tod_usec * 1000;
set_normalized_timespec(&wall_to_monotonic,
-xtime.tv_sec, -xtime.tv_nsec);
- write_sequnlock_irq(&xtime_lock);
+ write_sequnlock_irqrestore(&xtime_lock, flags);
} else {
printk(KERN_ERR "Error reading tod clock\n");
xtime.tv_sec = 0;
--- /dev/null
+/*
+ * MPC8349E-mITX Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+/ {
+ model = "MPC8349EMITX";
+ compatible = "MPC834xMITX";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8349@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>;
+ i-cache-line-size = <20>;
+ d-cache-size = <8000>;
+ i-cache-size = <8000>;
+ timebase-frequency = <0>; // from bootloader
+ bus-frequency = <0>; // from bootloader
+ clock-frequency = <0>; // from bootloader
+ 32-bit;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <00000000 10000000>;
+ };
+
+ soc8349@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00000200>;
+ bus-frequency = <0>; // from bootloader
+
+ wdt@200 {
+ device_type = "watchdog";
+ compatible = "mpc83xx_wdt";
+ reg = <200 100>;
+ };
+
+ i2c@3000 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <e 8>;
+ interrupt-parent = <700>;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3100 100>;
+ interrupts = <f 8>;
+ interrupt-parent = <700>;
+ dfsrr;
+ };
+
+ spi@7000 {
+ device_type = "spi";
+ compatible = "mpc83xx_spi";
+ reg = <7000 1000>;
+ interrupts = <10 8>;
+ interrupt-parent = <700>;
+ mode = <0>;
+ };
+
+ usb@22000 {
+ device_type = "usb";
+ compatible = "fsl-usb2-mph";
+ reg = <22000 1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <700>;
+ interrupts = <27 2>;
+ phy_type = "ulpi";
+ port1;
+ };
+
+ usb@23000 {
+ device_type = "usb";
+ compatible = "fsl-usb2-dr";
+ reg = <23000 1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <700>;
+ interrupts = <26 2>;
+ phy_type = "ulpi";
+ };
+
+ mdio@24520 {
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linux,phandle = <24520>;
+
+ /* Vitesse 8201 */
+ ethernet-phy@1c {
+ linux,phandle = <245201c>;
+ interrupt-parent = <700>;
+ interrupts = <12 2>;
+ reg = <1c>;
+ device_type = "ethernet-phy";
+ };
+
+ /* Vitesse 7385 */
+ ethernet-phy@1f {
+ linux,phandle = <245201f>;
+ interrupt-parent = <700>;
+ interrupts = <12 2>;
+ reg = <1f>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ address = [ 00 00 00 00 00 00 ];
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <20 8 21 8 22 8>;
+ interrupt-parent = <700>;
+ phy-handle = <245201c>;
+ };
+
+ ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <25000 1000>;
+ address = [ 00 00 00 00 00 00 ];
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <23 8 24 8 25 8>;
+ interrupt-parent = <700>;
+ phy-handle = <245201f>;
+ };
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>;
+ clock-frequency = <0>; // from bootloader
+ interrupts = <9 8>;
+ interrupt-parent = <700>;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>;
+ clock-frequency = <0>; // from bootloader
+ interrupts = <a 8>;
+ interrupt-parent = <700>;
+ };
+
+ pci@8500 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x10 - SATA */
+ 8000 0 0 1 700 16 8 /* SATA_INTA */
+ >;
+ interrupt-parent = <700>;
+ interrupts = <42 8>;
+ bus-range = <0 0>;
+ ranges = <42000000 0 80000000 80000000 0 10000000
+ 02000000 0 90000000 90000000 0 10000000
+ 01000000 0 00000000 e2000000 0 01000000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8500 100>;
+ compatible = "83xx";
+ device_type = "pci";
+ };
+
+ pci@8600 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0E - MiniPCI Slot */
+ 7000 0 0 1 700 15 8 /* PCI_INTA */
+
+ /* IDSEL 0x0F - PCI Slot */
+ 7800 0 0 1 700 14 8 /* PCI_INTA */
+ 7800 0 0 2 700 15 8 /* PCI_INTB */
+ >;
+ interrupt-parent = <700>;
+ interrupts = <43 8>;
+ bus-range = <1 1>;
+ ranges = <42000000 0 a0000000 a0000000 0 10000000
+ 02000000 0 b0000000 b0000000 0 10000000
+ 01000000 0 00000000 e3000000 0 01000000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8600 100>;
+ compatible = "83xx";
+ device_type = "pci";
+ };
+
+ crypto@30000 {
+ device_type = "crypto";
+ model = "SEC2";
+ compatible = "talitos";
+ reg = <30000 10000>;
+ interrupts = <b 8>;
+ interrupt-parent = <700>;
+ num-channels = <4>;
+ channel-fifo-len = <18>;
+ exec-units-mask = <0000007e>;
+ descriptor-types-mask = <01010ebf>;
+ };
+
+ pic@700 {
+ linux,phandle = <700>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <700 100>;
+ built-in;
+ device_type = "ipic";
+ };
+ };
+};
static void *of_try_claim(u32 size)
{
unsigned long addr = 0;
- static u8 first_time = 1;
- if (first_time) {
+ if (claim_base == 0)
claim_base = _ALIGN_UP((unsigned long)_end, ONE_MB);
- first_time = 0;
- }
for(; claim_base < RAM_END; claim_base += ONE_MB) {
#ifdef DEBUG
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.18-rc6
-# Sun Sep 10 10:22:57 2006
+# Linux kernel version: 2.6.19-rc1
+# Fri Oct 6 13:25:04 2006
#
CONFIG_PPC64=y
CONFIG_64BIT=y
CONFIG_PPC_OF=y
# CONFIG_PPC_UDBG_16550 is not set
# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
# CONFIG_DEFAULT_UIMAGE is not set
#
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
+# CONFIG_IPC_NS is not set
CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
-CONFIG_SYSCTL=y
+# CONFIG_UTS_NS is not set
CONFIG_AUDIT=y
CONFIG_AUDITSYSCALL=y
CONFIG_IKCONFIG=y
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
# CONFIG_EMBEDDED is not set
+# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
-CONFIG_RT_MUTEXES=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
#
# Block layer
#
+CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
#
#
# Platform support
#
-# CONFIG_PPC_MULTIPLATFORM is not set
-CONFIG_PPC_ISERIES=y
+CONFIG_PPC_MULTIPLATFORM=y
# CONFIG_EMBEDDED6xx is not set
# CONFIG_APUS is not set
+# CONFIG_PPC_PSERIES is not set
+CONFIG_PPC_ISERIES=y
+# CONFIG_PPC_PMAC is not set
+# CONFIG_PPC_MAPLE is not set
+# CONFIG_PPC_PASEMI is not set
# CONFIG_PPC_CELL is not set
# CONFIG_PPC_CELL_NATIVE is not set
-# CONFIG_UDBG_RTAS_CONSOLE is not set
+# CONFIG_PPC_IBM_CELL_BLADE is not set
+# CONFIG_U3_DART is not set
# CONFIG_PPC_RTAS is not set
# CONFIG_MMIO_NVRAM is not set
CONFIG_IBMVIO=y
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_IOMMU_VMERGE=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
CONFIG_IRQ_ALL_CPUS=y
CONFIG_LPARCFG=y
# CONFIG_NUMA is not set
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCIEPORTBUS is not set
+# CONFIG_PCI_MULTITHREAD_PROBE is not set
# CONFIG_PCI_DEBUG is not set
#
CONFIG_UNIX=y
CONFIG_XFRM=y
CONFIG_XFRM_USER=m
+CONFIG_XFRM_SUB_POLICY=y
CONFIG_NET_KEY=m
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_INET_TUNNEL=y
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=m
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
#
# IP: Virtual Server Configuration
CONFIG_NETFILTER_XTABLES=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_DSCP=m
CONFIG_NETFILTER_XT_TARGET_MARK=m
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
# CONFIG_NETFILTER_XT_MATCH_ESP is not set
CONFIG_NETFILTER_XT_MATCH_HELPER=m
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
CONFIG_IP_NF_MATCH_TOS=m
CONFIG_IP_NF_MATCH_RECENT=m
CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_DSCP=m
# CONFIG_IP_NF_MATCH_AH is not set
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_TOS=m
CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_DSCP=m
CONFIG_IP_NF_TARGET_TTL=m
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_RAW=m
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
+CONFIG_SCSI_NETLINK=y
CONFIG_SCSI_PROC_FS=y
#
# CONFIG_SCSI_LOGGING is not set
#
-# SCSI Transport Attributes
+# SCSI Transports
#
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_SCSI_FC_ATTRS=y
# CONFIG_SCSI_ISCSI_ATTRS is not set
-# CONFIG_SCSI_SAS_ATTRS is not set
+CONFIG_SCSI_SAS_ATTRS=m
+CONFIG_SCSI_SAS_LIBSAS=m
+CONFIG_SCSI_SAS_LIBSAS_DEBUG=y
#
# SCSI low-level drivers
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_MEGARAID_SAS is not set
-# CONFIG_ATA is not set
# CONFIG_SCSI_HPTIOP is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
CONFIG_SCSI_IBMVSCSI=m
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_IPR is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
# CONFIG_SCSI_LPFC is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_DEBUG is not set
+#
+# Serial ATA (prod) and Parallel ATA (experimental) drivers
+#
+# CONFIG_ATA is not set
+
#
# Multi-device support (RAID and LVM)
#
CONFIG_MD_MULTIPATH=m
CONFIG_MD_FAULTY=m
CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_DEBUG is not set
CONFIG_DM_CRYPT=m
CONFIG_DM_SNAPSHOT=m
CONFIG_DM_MIRROR=m
# CONFIG_HP100 is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=y
+CONFIG_PCNET32_NAPI=y
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
#
# Ethernet (10000 Mbit)
# CONFIG_PPP_MPPE is not set
CONFIG_PPPOE=m
# CONFIG_SLIP is not set
+CONFIG_SLHC=m
# CONFIG_NET_FC is not set
# CONFIG_SHAPER is not set
CONFIG_NETCONSOLE=y
# Input device support
#
CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
#
# Userland interfaces
#
# Misc devices
#
+# CONFIG_TIFM_CORE is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
-CONFIG_VIDEO_V4L2=y
#
# Digital Video Broadcasting Devices
CONFIG_XFS_SECURITY=y
CONFIG_XFS_POSIX_ACL=y
# CONFIG_XFS_RT is not set
+CONFIG_GFS2_FS=m
+CONFIG_GFS2_FS_LOCKING_NOLOCK=m
+CONFIG_GFS2_FS_LOCKING_DLM=m
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
-# CONFIG_CONFIGFS_FS is not set
+CONFIG_CONFIGFS_FS=m
#
# Miscellaneous filesystems
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
+CONFIG_GENERIC_ACL=y
#
# Partition Types
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
+#
+# Distributed Lock Manager
+#
+CONFIG_DLM=m
+# CONFIG_DLM_DEBUG is not set
+
#
# iSeries device drivers
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_INFO is not set
CONFIG_DEBUG_FS=y
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
# CONFIG_FORCED_INLINING is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_DEBUG_STACKOVERFLOW=y
# Cryptographic options
#
CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_CAST5=m
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_MEGARAID_SAS is not set
-# CONFIG_ATA is not set
+CONFIG_ATA=y
# CONFIG_SCSI_HPTIOP is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
int ibmebus_request_irq(struct ibmebus_dev *dev,
u32 ist,
- irqreturn_t (*handler)(int, void*, struct pt_regs *),
+ irqreturn_t (*handler)(int, void*),
unsigned long irq_flags, const char * devname,
void *dev_id)
{
/* This allocator was derived from x86_64's bit string search */
/* Sanity check */
- if (unlikely(npages) == 0) {
+ if (unlikely(npages == 0)) {
if (printk_ratelimit())
WARN_ON(1);
return DMA_ERROR_CODE;
* The value -2 is for buggy hardware and means that this IRQ
* has already been handled. -- Tom
*/
- irq = ppc_md.get_irq(regs);
+ irq = ppc_md.get_irq();
if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
#ifdef CONFIG_IRQSTACKS
}
EXPORT_SYMBOL_GPL(irq_create_mapping);
-extern unsigned int irq_create_of_mapping(struct device_node *controller,
- u32 *intspec, unsigned int intsize)
+unsigned int irq_create_of_mapping(struct device_node *controller,
+ u32 *intspec, unsigned int intsize)
{
struct irq_host *host;
irq_hw_number_t hwirq;
strlcpy(cmd_line, p, min((int)l, COMMAND_LINE_SIZE));
#ifdef CONFIG_CMDLINE
- if (l == 0 || (l == 1 && (*p) == 0))
+ if (p == NULL || l == 0 || (l == 1 && (*p) == 0))
strlcpy(cmd_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
#endif /* CONFIG_CMDLINE */
#ifdef CONFIG_PPC_ISERIES
if (hvlpevent_is_pending())
- process_hvlpevents(regs);
+ process_hvlpevents();
#endif
#ifdef CONFIG_PPC64
};
static void
-m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc,
- struct pt_regs *regs)
+m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
{
unsigned long stat, mask, pend;
int bit;
break;
for (bit = 0; pend != 0; ++bit, pend <<= 1) {
if (pend & 0x80000000)
- __do_IRQ(pci_int_base + bit, regs);
+ __do_IRQ(pci_int_base + bit);
}
}
}
#ifdef CONFIG_CPM2
-static void cpm2_cascade(unsigned int irq, struct irq_desc *desc,
- struct pt_regs *regs)
+static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
{
int cascade_irq;
- while ((cascade_irq = cpm2_get_irq(regs)) >= 0) {
+ while ((cascade_irq = cpm2_get_irq()) >= 0) {
generic_handle_irq(cascade_irq);
}
desc->chip->eoi(irq);
#ifdef CONFIG_PPC_I8259
#warning The i8259 PIC support is currently broken
-static void mpc85xx_8259_cascade(unsigned int irq, struct
- irq_desc *desc, struct pt_regs *regs)
+static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
{
- unsigned int cascade_irq = i8259_irq(regs);
+ unsigned int cascade_irq = i8259_irq();
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
struct mpic *mpic;
struct resource r;
struct device_node *np = NULL;
+#ifdef CONFIG_PPC_I8259
struct device_node *cascade_node = NULL;
int cascade_irq;
+#endif
np = of_find_node_by_type(np, "open-pic");
#ifdef CONFIG_PCI
-static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc,
- struct pt_regs *regs)
+static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
{
- unsigned int cascade_irq = i8259_irq(regs);
+ unsigned int cascade_irq = i8259_irq();
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
desc->chip->eoi(irq);
{
}
-static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc,
- struct pt_regs *regs)
+static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc)
{
struct cbe_iic_regs __iomem *node_iic = (void __iomem *)desc->handler_data;
unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC;
};
/* Get an IRQ number from the pending state register of the IIC */
-static unsigned int iic_get_irq(struct pt_regs *regs)
+static unsigned int iic_get_irq(void)
{
struct cbe_iic_pending_bits pending;
struct iic *iic;
}
static irqreturn_t
-spu_irq_class_0(int irq, void *data, struct pt_regs *regs)
+spu_irq_class_0(int irq, void *data)
{
struct spu *spu;
EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
static irqreturn_t
-spu_irq_class_1(int irq, void *data, struct pt_regs *regs)
+spu_irq_class_1(int irq, void *data)
{
struct spu *spu;
unsigned long stat, mask, dar, dsisr;
EXPORT_SYMBOL_GPL(spu_irq_class_1_bottom);
static irqreturn_t
-spu_irq_class_2(int irq, void *data, struct pt_regs *regs)
+spu_irq_class_2(int irq, void *data)
{
struct spu *spu;
unsigned long stat;
* has to include <linux/interrupt.h> (to get irqreturn_t), which
* causes all sorts of problems. -- paulus
*/
-extern irqreturn_t xmon_irq(int, void *, struct pt_regs *);
+extern irqreturn_t xmon_irq(int, void *);
extern unsigned long loops_per_jiffy;
jiffies + event_scan_interval);
}
-static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc,
- struct pt_regs *regs)
+static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc)
{
- unsigned int cascade_irq = i8259_irq(regs);
+ unsigned int cascade_irq = i8259_irq();
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
desc->chip->eoi(irq);
extern int tsi108_setup_pci(struct device_node *dev);
extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
extern void tsi108_pci_int_init(void);
-extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc,
- struct pt_regs *regs);
+extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc);
int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn)
{
tsi_pic = of_find_node_by_type(NULL, "open-pic");
if (tsi_pic) {
unsigned int size;
- void *prop = get_property(tsi_pic, "reg", &size);
+ const void *prop = get_property(tsi_pic, "reg", &size);
mpic_paddr = of_translate_address(tsi_pic, prop);
}
#include "irq.h"
#include "pci.h"
#include "call_pci.h"
-
-#if defined(CONFIG_SMP)
-extern void iSeries_smp_message_recv(struct pt_regs *);
-#endif
+#include "smp.h"
#ifdef CONFIG_PCI
static int num_pending_irqs;
static int pending_irqs[NR_IRQS];
-static void int_received(struct pci_event *event, struct pt_regs *regs)
+static void int_received(struct pci_event *event)
{
int irq;
}
}
-static void pci_event_handler(struct HvLpEvent *event, struct pt_regs *regs)
+static void pci_event_handler(struct HvLpEvent *event)
{
if (event && (event->xType == HvLpEvent_Type_PciIo)) {
if (hvlpevent_is_int(event))
- int_received((struct pci_event *)event, regs);
+ int_received((struct pci_event *)event);
else
printk(KERN_ERR
"pci_event_handler: unexpected ack received\n");
/*
* Get the next pending IRQ.
*/
-unsigned int iSeries_get_irq(struct pt_regs *regs)
+unsigned int iSeries_get_irq(void)
{
int irq = NO_IRQ_IGNORE;
#ifdef CONFIG_SMP
if (get_lppaca()->int_dword.fields.ipi_cnt) {
get_lppaca()->int_dword.fields.ipi_cnt = 0;
- iSeries_smp_message_recv(regs);
+ iSeries_smp_message_recv();
}
#endif /* CONFIG_SMP */
if (hvlpevent_is_pending())
- process_hvlpevents(regs);
+ process_hvlpevents();
#ifdef CONFIG_PCI
if (num_pending_irqs) {
extern void iSeries_init_IRQ(void);
extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, u32);
extern void iSeries_activate_IRQs(void);
-extern unsigned int iSeries_get_irq(struct pt_regs *);
+extern unsigned int iSeries_get_irq(void);
#endif /* _ISERIES_IRQ_H */
hvlpevent_invalidate(event);
}
-void process_hvlpevents(struct pt_regs *regs)
+void process_hvlpevents(void)
{
struct HvLpEvent * event;
__get_cpu_var(hvlpevent_counts)[event->xType]++;
if (event->xType < HvLpEvent_Type_NumTypes &&
lpEventHandler[event->xType])
- lpEventHandler[event->xType](event, regs);
+ lpEventHandler[event->xType](event);
else
printk(KERN_INFO "Unexpected Lp Event type=%d\n", event->xType );
* parse it enough to know if it is an interrupt or an
* acknowledge.
*/
-static void hv_handler(struct HvLpEvent *event, struct pt_regs *regs)
+static void hv_handler(struct HvLpEvent *event)
{
if ((event != NULL) && (event->xType == HvLpEvent_Type_MachineFac)) {
if (hvlpevent_is_ack(event))
/* We need to poll here as we are not yet taking interrupts */
while (rtc_data.busy) {
if (hvlpevent_is_pending())
- process_hvlpevents(NULL);
+ process_hvlpevents();
}
return rtc_set_tm(rtc_data.rc, rtc_data.ce_msg.ce_msg, tm);
}
#include <asm/cputable.h>
#include <asm/system.h>
+#include "smp.h"
+
static unsigned long iSeries_smp_message[NR_CPUS];
-void iSeries_smp_message_recv(struct pt_regs *regs)
+void iSeries_smp_message_recv(void)
{
int cpu = smp_processor_id();
int msg;
for (msg = 0; msg < 4; msg++)
if (test_and_clear_bit(msg, &iSeries_smp_message[cpu]))
- smp_message_recv(msg, regs);
+ smp_message_recv(msg);
}
static inline void smp_iSeries_do_message(int cpu, int msg)
--- /dev/null
+#ifndef _PLATFORMS_ISERIES_SMP_H
+#define _PLATFORMS_ISERIES_SMP_H
+
+extern void iSeries_smp_message_recv(void);
+
+#endif /* _PLATFORMS_ISERIES_SMP_H */
}
EXPORT_SYMBOL(vio_set_hostlp);
-static void vio_handleEvent(struct HvLpEvent *event, struct pt_regs *regs)
+static void vio_handleEvent(struct HvLpEvent *event)
{
HvLpIndex remoteLp;
int subtype = (event->xSubtype & VIOMAJOR_SUBTYPE_MASK)
#define CONFIG_OFFSET_VALID(off) ((off) < 4096)
-static unsigned long pa_pxp_cfg_addr(struct pci_controller *hose,
+static void volatile __iomem *pa_pxp_cfg_addr(struct pci_controller *hose,
u8 bus, u8 devfn, int offset)
{
- return ((unsigned long)hose->cfg_data) + PA_PXP_CFA(bus, devfn, offset);
+ return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset);
}
static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 *val)
{
struct pci_controller *hose;
- unsigned long addr;
+ void volatile __iomem *addr;
hose = pci_bus_to_host(bus);
if (!hose)
*/
switch (len) {
case 1:
- *val = in_8((u8 *)addr);
+ *val = in_8(addr);
break;
case 2:
- *val = in_le16((u16 *)addr);
+ *val = in_le16(addr);
break;
default:
- *val = in_le32((u32 *)addr);
+ *val = in_le32(addr);
break;
}
int offset, int len, u32 val)
{
struct pci_controller *hose;
- unsigned long addr;
+ void volatile __iomem *addr;
hose = pci_bus_to_host(bus);
if (!hose)
*/
switch (len) {
case 1:
- out_8((u8 *)addr, val);
- (void) in_8((u8 *)addr);
+ out_8(addr, val);
+ (void) in_8(addr);
break;
case 2:
- out_le16((u16 *)addr, val);
- (void) in_le16((u16 *)addr);
+ out_le16(addr, val);
+ (void) in_le16(addr);
break;
default:
- out_le32((u32 *)addr, val);
- (void) in_le32((u32 *)addr);
+ out_le32(addr, val);
+ (void) in_le32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
* has to include <linux/interrupt.h> (to get irqreturn_t), which
* causes all sorts of problems. -- paulus
*/
-extern irqreturn_t xmon_irq(int, void *, struct pt_regs *);
+extern irqreturn_t xmon_irq(int, void *);
#ifdef CONFIG_PPC32
struct pmac_irq_hw {
.retrigger = pmac_retrigger,
};
-static irqreturn_t gatwick_action(int cpl, void *dev_id, struct pt_regs *regs)
+static irqreturn_t gatwick_action(int cpl, void *dev_id)
{
unsigned long flags;
int irq, bits;
return rc;
}
-static unsigned int pmac_pic_get_irq(struct pt_regs *regs)
+static unsigned int pmac_pic_get_irq(void)
{
int irq;
unsigned long bits = 0;
unsigned long flags;
#ifdef CONFIG_SMP
- void psurge_smp_message_recv(struct pt_regs *);
+ void psurge_smp_message_recv(void);
/* IPI's are a hack on the powersurge -- Cort */
if ( smp_processor_id() != 0 ) {
- psurge_smp_message_recv(regs);
+ psurge_smp_message_recv();
return NO_IRQ_IGNORE; /* ignore, already handled */
}
#endif /* CONFIG_SMP */
{
struct mpic *mpic = desc->handler_data;
- unsigned int cascade_irq = mpic_get_one_irq(mpic, get_irq_regs());
+ unsigned int cascade_irq = mpic_get_one_irq(mpic);
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
desc->chip->eoi(irq);
extern struct hw_interrupt_type pmac_pic;
-void pmac_pic_init(void);
-int pmac_get_irq(struct pt_regs *regs);
+extern void pmac_pic_init(void);
+extern int pmac_get_irq(void);
#endif /* __PPC_PLATFORMS_PMAC_PIC_H */
*/
static unsigned long psurge_smp_message[NR_CPUS];
-void psurge_smp_message_recv(struct pt_regs *regs)
+void psurge_smp_message_recv(void)
{
int cpu = smp_processor_id();
int msg;
/* make sure there is a message there */
for (msg = 0; msg < 4; msg++)
if (test_and_clear_bit(msg, &psurge_smp_message[cpu]))
- smp_message_recv(msg, regs);
+ smp_message_recv(msg);
}
-irqreturn_t psurge_primary_intr(int irq, void *d, struct pt_regs *regs)
+irqreturn_t psurge_primary_intr(int irq, void *d)
{
- psurge_smp_message_recv(regs);
+ psurge_smp_message_recv();
return IRQ_HANDLED;
}
struct iommu_table *tbl)
{
struct device_node *node;
- const unsigned long *basep, *sizep;
+ const unsigned long *basep;
+ const u32 *sizep;
node = (struct device_node *)phb->arch_data;
void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc)
{
- unsigned int cascade_irq = i8259_irq(get_irq_regs());
+ unsigned int cascade_irq = i8259_irq();
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
desc->chip->eoi(irq);
return NO_IRQ;
}
-static unsigned int xics_get_irq_direct(struct pt_regs *regs)
+static unsigned int xics_get_irq_direct(void)
{
unsigned int cpu = smp_processor_id();
return xics_remap_irq(direct_xirr_info_get(cpu));
}
-static unsigned int xics_get_irq_lpar(struct pt_regs *regs)
+static unsigned int xics_get_irq_lpar(void)
{
unsigned int cpu = smp_processor_id();
.end = cpm2_end_irq,
};
-unsigned int cpm2_get_irq(struct pt_regs *regs)
+unsigned int cpm2_get_irq(void)
{
int irq;
unsigned long bits;
extern intctl_cpm2_t *cpm2_intctl;
-extern unsigned int cpm2_get_irq(struct pt_regs *regs);
+extern unsigned int cpm2_get_irq(void);
extern void cpm2_pic_init(struct device_node*);
struct resource r[4];
struct device_node *phy, *mdio;
struct fs_platform_info fs_enet_data;
- const unsigned int *id, *phy_addr, phy_irq;
+ const unsigned int *id, *phy_addr, *phy_irq;
const void *mac_addr;
const phandle *ph;
const char *model;
if (strstr(model, "FCC")) {
int fcc_index = *id - 1;
- unsigned char* mdio_bb_prop;
+ const unsigned char *mdio_bb_prop;
fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
fs_enet_data.rx_ring = 32;
ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
sizeof(struct
fs_platform_info));
- if (ret)
- goto unreg;
+ if (ret)
+ goto unreg;
+ }
}
return 0;
* which is called. It should be noted that polling is broken on some
* IBM and Motorola PReP boxes so we must use the int-ack feature on them.
*/
-unsigned int i8259_irq(struct pt_regs *regs)
+unsigned int i8259_irq(void)
{
int irq;
int lock = 0;
}
/* Return an interrupt vector or NO_IRQ if no interrupt is pending. */
-unsigned int ipic_get_irq(struct pt_regs *regs)
+unsigned int ipic_get_irq(void)
{
int irq;
mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0]));
}
-unsigned int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs)
+unsigned int mpic_get_one_irq(struct mpic *mpic)
{
u32 src;
return irq_linear_revmap(mpic->irqhost, src);
}
-unsigned int mpic_get_irq(struct pt_regs *regs)
+unsigned int mpic_get_irq(void)
{
struct mpic *mpic = mpic_primary;
BUG_ON(mpic == NULL);
- return mpic_get_one_irq(mpic, regs);
+ return mpic_get_one_irq(mpic);
}
};
/* Return an interrupt vector or NO_IRQ if no interrupt is pending. */
-unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic, struct pt_regs *regs)
+unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic)
{
int irq;
}
/* Return an interrupt vector or NO_IRQ if no interrupt is pending. */
-unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic, struct pt_regs *regs)
+unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)
{
int irq;
/* FIXME: We mask all the QE Low interrupts while handling. We should
* let other interrupt come in, but BAD interrupts are generated */
-void fastcall qe_ic_cascade_low(unsigned int irq, struct irq_desc *desc,
- struct pt_regs *regs)
+void fastcall qe_ic_cascade_low(unsigned int irq, struct irq_desc *desc)
{
struct qe_ic *qe_ic = desc->handler_data;
struct irq_chip *chip = irq_desc[irq].chip;
- unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic, regs);
+ unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
chip->mask_ack(irq);
if (cascade_irq != NO_IRQ)
/* FIXME: We mask all the QE High interrupts while handling. We should
* let other interrupt come in, but BAD interrupts are generated */
-void fastcall qe_ic_cascade_high(unsigned int irq, struct irq_desc *desc,
- struct pt_regs *regs)
+void fastcall qe_ic_cascade_high(unsigned int irq, struct irq_desc *desc)
{
struct qe_ic *qe_ic = desc->handler_data;
struct irq_chip *chip = irq_desc[irq].chip;
- unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic, regs);
+ unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
chip->mask_ack(irq);
if (cascade_irq != NO_IRQ)
init_pci_source();
}
-void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc,
- struct pt_regs *regs)
+void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc)
{
unsigned int cascade_irq = get_pci_source();
if (cascade_irq != NO_IRQ)
#ifdef SUPPORT_SYSRQ
if (info->sysrq) {
if (ch && time_before(jiffies, info->sysrq)) {
- handle_sysrq(ch, regs, NULL);
+ handle_sysrq(ch, NULL);
info->sysrq = 0;
goto ignore_char;
}
while ((next_dec = tb_ticks_per_jiffy - tb_delta(&jiffy_stamp)) <= 0) {
jiffy_stamp += tb_ticks_per_jiffy;
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
update_process_times(user_mode(regs));
if (smp_processor_id())
#endif
}
-static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t cpm2_cascade(int irq, void *dev_id)
{
- while ((irq = cpm2_get_irq(regs)) >= 0)
- __do_IRQ(irq, regs);
+ while ((irq = cpm2_get_irq()) >= 0)
+ __do_IRQ(irq);
return IRQ_HANDLED;
}
}
#ifdef CONFIG_CPM2
-static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t cpm2_cascade(int irq, void *dev_id)
{
- while((irq = cpm2_get_irq(regs)) >= 0)
- __do_IRQ(irq, regs);
+ while((irq = cpm2_get_irq()) >= 0)
+ __do_IRQ(irq);
return IRQ_HANDLED;
}
printk ("bi_immr_base = %8.8lx\n", binfo->bi_immr_base);
}
-static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t cpm2_cascade(int irq, void *dev_id)
{
- while ((irq = cpm2_get_irq(regs)) >= 0)
- __do_IRQ(irq, regs);
+ while ((irq = cpm2_get_irq()) >= 0)
+ __do_IRQ(irq);
return IRQ_HANDLED;
}
}
#ifdef CONFIG_MPC8560
-static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t cpm2_cascade(int irq, void *dev_id)
{
- while ((irq = cpm2_get_irq(regs)) >= 0)
- __do_IRQ(irq, regs);
+ while ((irq = cpm2_get_irq()) >= 0)
+ __do_IRQ(irq);
return IRQ_HANDLED;
}
* which is called. It should be noted that polling is broken on some
* IBM and Motorola PReP boxes so we must use the int-ack feature on them.
*/
-int i8259_irq(struct pt_regs *regs)
+int i8259_irq(void)
{
int irq;
/* Clear old errors and register CPU interface error intr handler */
mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0);
if ((rc = request_irq(MV64x60_IRQ_CPU_ERR + mv64360_irq_base,
- mv64360_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, 0)))
+ mv64360_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, NULL)))
printk(KERN_WARNING "Can't register cpu error handler: %d", rc);
mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0);
/* Clear old errors and register internal SRAM error intr handler */
mv64x60_write(&bh, MV64360_SRAM_ERR_CAUSE, 0);
if ((rc = request_irq(MV64360_IRQ_SRAM_PAR_ERR + mv64360_irq_base,
- mv64360_sram_error_int_handler,IRQF_DISABLED,SRAM_INTR_STR, 0)))
+ mv64360_sram_error_int_handler,IRQF_DISABLED,SRAM_INTR_STR, NULL)))
printk(KERN_WARNING "Can't register SRAM error handler: %d",rc);
/* Clear old errors and register PCI 0 error intr handler */
static int open_pic_irq_offset;
static volatile OpenPIC_Source __iomem *ISR[NR_IRQS];
static int openpic_cascade_irq = -1;
-static int (*openpic_cascade_fn)(struct pt_regs *);
+static int (*openpic_cascade_fn)(void);
/* Global Operations */
static void openpic_disable_8259_pass_through(void);
#ifdef CONFIG_SMP
/* Interprocessor Interrupts */
static void openpic_initipi(u_int ipi, u_int pri, u_int vector);
-static irqreturn_t openpic_ipi_action(int cpl, void *dev_id, struct pt_regs *);
+static irqreturn_t openpic_ipi_action(int cpl, void *dev_id);
#endif
/* Timer Interrupts */
void __init
openpic_hookup_cascade(u_int irq, char *name,
- int (*cascade_fn)(struct pt_regs *))
+ int (*cascade_fn)(void))
{
openpic_cascade_irq = irq;
openpic_cascade_fn = cascade_fn;
{
}
-static irqreturn_t openpic_ipi_action(int cpl, void *dev_id, struct pt_regs *regs)
+static irqreturn_t openpic_ipi_action(int cpl, void *dev_id)
{
- smp_message_recv(cpl-OPENPIC_VEC_IPI-open_pic_irq_offset, regs);
+ smp_message_recv(cpl-OPENPIC_VEC_IPI-open_pic_irq_offset);
return IRQ_HANDLED;
}
#endif /* CONFIG_SMP */
int
-openpic_get_irq(struct pt_regs *regs)
+openpic_get_irq(void)
{
int irq = openpic_irq();
* This should move to irq.c eventually. -- paulus
*/
if (irq == openpic_cascade_irq && openpic_cascade_fn != NULL) {
- int cirq = openpic_cascade_fn(regs);
+ int cirq = openpic_cascade_fn();
/* Allow for the cascade being shared with other devices */
if (cirq != -1) {
signal = math_emu_b3(opcode, regs);
} else if (opcode[0] == 0xed) {
get_user(*((__u32 *) (opcode+2)),
- (__u32 *)(location+1));
+ (__u32 __user *)(location+1));
signal = math_emu_ed(opcode, regs);
} else if (*((__u16 *) opcode) == 0xb299) {
get_user(*((__u16 *) (opcode+2)), location+1);
info.si_signo = signal;
info.si_errno = 0;
info.si_code = SEGV_MAPERR;
- info.si_addr = (void *) location;
+ info.si_addr = (void __user *) location;
do_trap(interruption_code, signal,
"user address fault", regs, &info);
} else
specification_exception(struct pt_regs * regs, long interruption_code)
{
__u8 opcode[6];
- __u16 *location = NULL;
+ __u16 __user *location = NULL;
int signal = 0;
- location = (__u16 *) get_check_address(regs);
+ location = (__u16 __user *) get_check_address(regs);
/*
* We got all needed information from the lowcore and can
break;
case 0xed:
get_user(*((__u32 *) (opcode+2)),
- (__u32 *)(location+1));
+ (__u32 __user *)(location+1));
signal = math_emu_ed(opcode, regs);
break;
case 0xb2:
#include <asm/pgtable.h>
#include <asm/pcic.h>
#include <asm/cacheflush.h>
+#include <asm/irq_regs.h>
#ifdef CONFIG_SMP
#define SMP_NOP2 "nop; nop;\n\t"
prom_halt();
}
-void (*sparc_init_timers)(irqreturn_t (*)(int, void *,struct pt_regs *)) =
- (void (*)(irqreturn_t (*)(int, void *,struct pt_regs *))) irq_panic;
+void (*sparc_init_timers)(irqreturn_t (*)(int, void *)) =
+ (void (*)(irqreturn_t (*)(int, void *))) irq_panic;
/*
* Dave Redman (djhr@tadpole.co.uk)
void handler_irq(int irq, struct pt_regs * regs)
{
+ struct pt_regs *old_regs;
struct irqaction * action;
int cpu = smp_processor_id();
#ifdef CONFIG_SMP
extern void smp4m_irq_rotate(int cpu);
#endif
+ old_regs = set_irq_regs(regs);
irq_enter();
disable_pil_irq(irq);
#ifdef CONFIG_SMP
do {
if (!action || !action->handler)
unexpected_irq(irq, NULL, regs);
- action->handler(irq, action->dev_id, regs);
+ action->handler(irq, action->dev_id);
action = action->next;
} while (action);
sparc_irq[irq].flags &= ~SPARC_IRQ_INPROGRESS;
enable_pil_irq(irq);
irq_exit();
+ set_irq_regs(old_regs);
}
#ifdef CONFIG_BLK_DEV_FD
-extern void floppy_interrupt(int irq, void *dev_id, struct pt_regs *regs);
+extern void floppy_interrupt(int irq, void *dev_id)
void sparc_floppy_irq(int irq, void *dev_id, struct pt_regs *regs)
{
+ struct pt_regs *old_regs;
int cpu = smp_processor_id();
+ old_regs = set_irq_regs(regs);
disable_pil_irq(irq);
irq_enter();
kstat_cpu(cpu).irqs[irq]++;
- floppy_interrupt(irq, dev_id, regs);
+ floppy_interrupt(irq, dev_id);
irq_exit();
enable_pil_irq(irq);
+ set_irq_regs(old_regs);
// XXX Eek, it's totally changed with preempt_count() and such
// if (softirq_pending(cpu))
// do_softirq();
* thus no sharing possible.
*/
int request_fast_irq(unsigned int irq,
- irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ irqreturn_t (*handler)(int, void *),
unsigned long irqflags, const char *devname)
{
struct irqaction *action;
}
int request_irq(unsigned int irq,
- irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ irqreturn_t (*handler)(int, void *),
unsigned long irqflags, const char * devname, void *dev_id)
{
struct irqaction * action, **actionp;
if (sparc_cpu_model == sun4d) {
extern int sun4d_request_irq(unsigned int,
- irqreturn_t (*)(int, void *, struct pt_regs *),
+ irqreturn_t (*)(int, void *),
unsigned long, const char *, void *);
return sun4d_request_irq(irq, handler, irqflags, devname, dev_id);
}
pcic_timer_dummy = readl(pcic0.pcic_regs+PCI_SYS_LIMIT);
}
-static irqreturn_t pcic_timer_handler (int irq, void *h, struct pt_regs *regs)
+static irqreturn_t pcic_timer_handler (int irq, void *h)
{
write_seqlock(&xtime_lock); /* Dummy, to show that we remember */
pcic_clear_clock_irq();
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
extern void ___clear_bit(void);
extern void ___change_bit(void);
extern void ___rw_read_enter(void);
+extern void ___rw_read_try(void);
extern void ___rw_read_exit(void);
extern void ___rw_write_enter(void);
EXPORT_SYMBOL(sparc_cpu_model);
EXPORT_SYMBOL(kernel_thread);
#ifdef CONFIG_SMP
-// XXX find what uses (or used) these.
+// XXX find what uses (or used) these. AV: see asm/spinlock.h
EXPORT_SYMBOL(___rw_read_enter);
+EXPORT_SYMBOL(___rw_read_try);
EXPORT_SYMBOL(___rw_read_exit);
EXPORT_SYMBOL(___rw_write_enter);
#endif
/* Errm.. not sure how to do this.. */
}
-static void __init sun4c_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *))
+static void __init sun4c_init_timers(irqreturn_t (*counter_fn)(int, void *))
{
int irq;
#include <asm/sbus.h>
#include <asm/sbi.h>
#include <asm/cacheflush.h>
+#include <asm/irq_regs.h>
/* If you trust current SCSI layer to handle different SCSI IRQs, enable this. I don't trust it... -jj */
/* #define DISTRIBUTE_IRQS */
void sun4d_handler_irq(int irq, struct pt_regs * regs)
{
+ struct pt_regs *old_regs;
struct irqaction * action;
int cpu = smp_processor_id();
/* SBUS IRQ level (1 - 7) */
cc_set_iclr(1 << irq);
+ old_regs = set_irq_regs(regs);
irq_enter();
kstat_cpu(cpu).irqs[irq]++;
if (!sbusl) {
if (!action)
unexpected_irq(irq, NULL, regs);
do {
- action->handler(irq, action->dev_id, regs);
+ action->handler(irq, action->dev_id);
action = action->next;
} while (action);
} else {
if (!action)
unexpected_irq(irq, NULL, regs);
do {
- action->handler(irq, action->dev_id, regs);
+ action->handler(irq, action->dev_id);
action = action->next;
} while (action);
release_sbi(SBI2DEVID(sbino), slot);
}
}
irq_exit();
+ set_irq_regs(old_regs);
}
unsigned int sun4d_build_irq(struct sbus_dev *sdev, int irq)
}
int sun4d_request_irq(unsigned int irq,
- irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ irqreturn_t (*handler)(int, void *),
unsigned long irqflags, const char * devname, void *dev_id)
{
struct irqaction *action, *tmp = NULL, **actionp;
bw_set_prof_limit(cpu, limit);
}
-static void __init sun4d_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *))
+static void __init sun4d_init_timers(irqreturn_t (*counter_fn)(int, void *))
{
int irq;
int cpu;
#include <asm/ptrace.h>
#include <asm/atomic.h>
+#include <asm/irq_regs.h>
#include <asm/delay.h>
#include <asm/irq.h>
void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
{
+ struct pt_regs *old_regs;
int cpu = hard_smp4d_processor_id();
static int cpu_tick[NR_CPUS];
static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
+ old_regs = set_irq_regs(regs);
bw_get_prof_limit(cpu);
bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
show_leds(cpu);
}
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
if(!--prof_counter(cpu)) {
int user = user_mode(regs);
prof_counter(cpu) = prof_multiplier(cpu);
}
+ set_irq_regs(old_regs);
}
extern unsigned int lvl14_resolution;
sun4m_timers->cpu_timers[cpu].l14_timer_limit = limit;
}
-static void __init sun4m_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *))
+static void __init sun4m_init_timers(irqreturn_t (*counter_fn)(int, void *))
{
int reg_count, irq, cpu;
struct linux_prom_registers cnt_regs[PROMREG_MAX];
#include <linux/profile.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
+#include <asm/irq_regs.h>
#include <asm/ptrace.h>
#include <asm/atomic.h>
void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
{
+ struct pt_regs *old_regs;
int cpu = smp_processor_id();
+ old_regs = set_irq_regs(regs);
+
clear_profile_irq(cpu);
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
if(!--prof_counter(cpu)) {
int user = user_mode(regs);
prof_counter(cpu) = prof_multiplier(cpu);
}
+ set_irq_regs(old_regs);
}
extern unsigned int lvl14_resolution;
linux_lvl14[3] = obp_lvl14[3];
}
-void claim_ticker14(irqreturn_t (*handler)(int, void *, struct pt_regs *),
+void claim_ticker14(irqreturn_t (*handler)(int, void *),
int irq_nr, unsigned int timeout )
{
int cpu = smp_processor_id();
#include <asm/page.h>
#include <asm/pcic.h>
#include <asm/of_device.h>
+#include <asm/irq_regs.h>
DEFINE_SPINLOCK(rtc_lock);
enum sparc_clock_type sp_clock_typ;
#define TICK_SIZE (tick_nsec / 1000)
-irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+irqreturn_t timer_interrupt(int irq, void *dev_id)
{
/* last time the cmos clock got updated */
static long last_rtc_update;
#ifndef CONFIG_SMP
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
#endif
/* Protect counter clear so that do_gettimeoffset works */
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
ldstub [%g1 + 3], %g2
b ___rw_read_enter_spin_on_wlock
ldub [%g1 + 3], %g2
+___rw_read_try_spin_on_wlock:
+ andcc %g2, 0xff, %g0
+ be,a ___rw_read_try
+ ldstub [%g1 + 3], %g2
+ xnorcc %g2, 0x0, %o0 /* if g2 is ~0, set o0 to 0 and bugger off */
+ bne,a ___rw_read_enter_spin_on_wlock
+ ld [%g1], %g2
+ retl
+ mov %g4, %o7
___rw_read_exit_spin_on_wlock:
orcc %g2, 0x0, %g0
be,a ___rw_read_exit
retl
mov %g4, %o7
+ .globl ___rw_read_try
+___rw_read_try:
+ orcc %g2, 0x0, %g0
+ bne ___rw_read_try_spin_on_wlock
+ ld [%g1], %g2
+ add %g2, 1, %g2
+ st %g2, [%g1]
+ set 1, %o1
+ retl
+ mov %g4, %o7
+
.globl ___rw_write_enter
___rw_write_enter:
orcc %g2, 0x0, %g0
}
}
-static irqreturn_t ebus_dma_irq(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t ebus_dma_irq(int irq, void *dev_id)
{
struct ebus_dma_info *p = dev_id;
unsigned long flags;
}
#ifndef CONFIG_SMP
-extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *);
+extern irqreturn_t timer_interrupt(int, void *);
void timer_irq(int irq, struct pt_regs *regs)
{
unsigned long clr_mask = 1 << irq;
unsigned long tick_mask = tick_ops->softint_mask;
+ struct pt_regs *old_regs;
if (get_softint() & tick_mask) {
irq = 0;
}
clear_softint(clr_mask);
+ old_regs = set_irq_regs(regs);
irq_enter();
kstat_this_cpu.irqs[0]++;
- timer_interrupt(irq, NULL, regs);
+ timer_interrupt(irq, NULL);
irq_exit();
+ set_irq_regs(old_regs);
}
#endif
void handler_irq(int irq, struct pt_regs *regs)
{
struct ino_bucket *bucket;
+ struct pt_regs *old_regs;
clear_softint(1 << irq);
+ old_regs = set_irq_regs(regs);
irq_enter();
/* Sliiiick... */
struct ino_bucket *next = __bucket(bucket->irq_chain);
bucket->irq_chain = 0;
- __do_IRQ(bucket->virt_irq, regs);
+ __do_IRQ(bucket->virt_irq);
bucket = next;
}
irq_exit();
+ set_irq_regs(old_regs);
}
struct sun5_timer {
#define PSYCHO_UEAFSR_RESV2 0x00000000007fffffUL /* Reserved */
#define PSYCHO_UE_AFAR 0x0038UL
-static irqreturn_t psycho_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t psycho_ue_intr(int irq, void *dev_id)
{
struct pci_controller_info *p = dev_id;
unsigned long afsr_reg = p->pbm_A.controller_regs + PSYCHO_UE_AFSR;
#define PSYCHO_CEAFSR_RESV2 0x00000000007fffffUL /* Reserved */
#define PSYCHO_CE_AFAR 0x0040UL
-static irqreturn_t psycho_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t psycho_ce_intr(int irq, void *dev_id)
{
struct pci_controller_info *p = dev_id;
unsigned long afsr_reg = p->pbm_A.controller_regs + PSYCHO_CE_AFSR;
return ret;
}
-static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id)
{
struct pci_pbm_info *pbm = dev_id;
struct pci_controller_info *p = pbm->parent;
spin_unlock_irqrestore(&iommu->lock, flags);
}
-static irqreturn_t sabre_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sabre_ue_intr(int irq, void *dev_id)
{
struct pci_controller_info *p = dev_id;
unsigned long afsr_reg = p->pbm_A.controller_regs + SABRE_UE_AFSR;
return IRQ_HANDLED;
}
-static irqreturn_t sabre_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sabre_ce_intr(int irq, void *dev_id)
{
struct pci_controller_info *p = dev_id;
unsigned long afsr_reg = p->pbm_A.controller_regs + SABRE_CE_AFSR;
return ret;
}
-static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id)
{
struct pci_controller_info *p = dev_id;
unsigned long afsr_reg, afar_reg;
#define SCHIZO_UEAFSR_MTAG 0x000000000000e000UL /* Safari */
#define SCHIZO_UEAFSR_ECCSYND 0x00000000000001ffUL /* Safari */
-static irqreturn_t schizo_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t schizo_ue_intr(int irq, void *dev_id)
{
struct pci_controller_info *p = dev_id;
unsigned long afsr_reg = p->pbm_B.controller_regs + SCHIZO_UE_AFSR;
#define SCHIZO_CEAFSR_MTAG 0x000000000000e000UL
#define SCHIZO_CEAFSR_ECCSYND 0x00000000000001ffUL
-static irqreturn_t schizo_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t schizo_ce_intr(int irq, void *dev_id)
{
struct pci_controller_info *p = dev_id;
unsigned long afsr_reg = p->pbm_B.controller_regs + SCHIZO_CE_AFSR;
return ret;
}
-static irqreturn_t schizo_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t schizo_pcierr_intr(int irq, void *dev_id)
{
struct pci_pbm_info *pbm = dev_id;
struct pci_controller_info *p = pbm->parent;
/* We only expect UNMAP errors here. The rest of the Safari errors
* are marked fatal and thus cause a system reset.
*/
-static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id)
{
struct pci_controller_info *p = dev_id;
u64 errlog;
static DECLARE_WAIT_QUEUE_HEAD(powerd_wait);
static int button_pressed;
-static irqreturn_t power_handler(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t power_handler(int irq, void *dev_id)
{
if (button_pressed == 0) {
button_pressed = 1;
#define SYSIO_UEAFSR_SIZE 0x00001c0000000000UL /* Bad transfer size 2^SIZE */
#define SYSIO_UEAFSR_MID 0x000003e000000000UL /* UPA MID causing the fault */
#define SYSIO_UEAFSR_RESV2 0x0000001fffffffffUL /* Reserved */
-static irqreturn_t sysio_ue_handler(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sysio_ue_handler(int irq, void *dev_id)
{
struct sbus_bus *sbus = dev_id;
struct sbus_iommu *iommu = sbus->iommu;
#define SYSIO_CEAFSR_SIZE 0x00001c0000000000UL /* Bad transfer size 2^SIZE */
#define SYSIO_CEAFSR_MID 0x000003e000000000UL /* UPA MID causing the fault */
#define SYSIO_CEAFSR_RESV2 0x0000001fffffffffUL /* Reserved */
-static irqreturn_t sysio_ce_handler(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sysio_ce_handler(int irq, void *dev_id)
{
struct sbus_bus *sbus = dev_id;
struct sbus_iommu *iommu = sbus->iommu;
#define SYSIO_SBAFSR_SIZE 0x00001c0000000000UL /* Size of transfer */
#define SYSIO_SBAFSR_MID 0x000003e000000000UL /* MID causing the error */
#define SYSIO_SBAFSR_RESV3 0x0000001fffffffffUL /* Reserved */
-static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t sysio_sbus_error_handler(int irq, void *dev_id)
{
struct sbus_bus *sbus = dev_id;
struct sbus_iommu *iommu = sbus->iommu;
#include <asm/cpudata.h>
#include <asm/irq.h>
+#include <asm/irq_regs.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/oplib.h>
unsigned long compare, tick, pstate;
int cpu = smp_processor_id();
int user = user_mode(regs);
+ struct pt_regs *old_regs;
/*
* Check for level 14 softint.
clear_softint(tick_mask);
}
+ old_regs = set_irq_regs(regs);
do {
- profile_tick(CPU_PROFILING, regs);
+ profile_tick(CPU_PROFILING);
if (!--prof_counter(cpu)) {
irq_enter();
: /* no outputs */
: "r" (pstate));
} while (time_after_eq(tick, compare));
+ set_irq_regs(old_regs);
}
static void __init smp_setup_percpu_timer(void)
#include <asm/cpudata.h>
#include <asm/uaccess.h>
#include <asm/prom.h>
+#include <asm/irq_regs.h>
DEFINE_SPINLOCK(mostek_lock);
DEFINE_SPINLOCK(rtc_lock);
}
}
-irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+irqreturn_t timer_interrupt(int irq, void *dev_id)
{
unsigned long ticks, compare, pstate;
do {
#ifndef CONFIG_SMP
- profile_tick(CPU_PROFILING, regs);
- update_process_times(user_mode(regs));
+ profile_tick(CPU_PROFILING);
+ update_process_times(user_mode(get_irq_regs()));
#endif
do_timer(1);
#define LINE_BUFSIZE 4096
-static irqreturn_t line_interrupt(int irq, void *data, struct pt_regs *unused)
+static irqreturn_t line_interrupt(int irq, void *data)
{
struct chan *chan = data;
struct line *line = chan->line;
reactivate_chan(&line->chan_list, line->driver->read_irq);
}
-static irqreturn_t line_write_interrupt(int irq, void *data,
- struct pt_regs *unused)
+static irqreturn_t line_write_interrupt(int irq, void *data)
{
struct chan *chan = data;
struct line *line = chan->line;
struct tty_struct *tty;
};
-static irqreturn_t winch_interrupt(int irq, void *data, struct pt_regs *unused)
+static irqreturn_t winch_interrupt(int irq, void *data)
{
struct winch *winch = data;
struct tty_struct *tty;
static DECLARE_WORK(mconsole_work, mc_work_proc, NULL);
-static irqreturn_t mconsole_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
+static irqreturn_t mconsole_interrupt(int irq, void *dev_id)
{
/* long to avoid size mismatch warnings from gcc */
long fd;
static void sysrq_proc(void *arg)
{
char *op = arg;
-
- handle_sysrq(*op, ¤t->thread.regs, NULL);
+ struct pt_regs *old_regs = set_irq_regs(¤t->thread.regs);
+ handle_sysrq(*op, NULL);
+ set_irq_regs(old_regs);
}
void mconsole_sysrq(struct mc_request *req)
dev_close( (struct net_device *) dev);
}
-irqreturn_t uml_net_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t uml_net_interrupt(int irq, void *dev_id)
{
struct net_device *dev = dev_id;
struct uml_net_private *lp = dev->priv;
struct port_list *port;
};
-static irqreturn_t pipe_interrupt(int irq, void *data, struct pt_regs *regs)
+static irqreturn_t pipe_interrupt(int irq, void *data)
{
struct connection *conn = data;
int fd;
DECLARE_WORK(port_work, port_work_proc, NULL);
-static irqreturn_t port_interrupt(int irq, void *data, struct pt_regs *regs)
+static irqreturn_t port_interrupt(int irq, void *data)
{
struct port_list *port = data;
do_ubd_request(ubd_queue);
}
-static irqreturn_t ubd_intr(int irq, void *dev, struct pt_regs *unused)
+static irqreturn_t ubd_intr(int irq, void *dev)
{
ubd_handler();
return(IRQ_HANDLED);
int new_fd;
};
-static irqreturn_t xterm_interrupt(int irq, void *data, struct pt_regs *regs)
+static irqreturn_t xterm_interrupt(int irq, void *data)
{
struct xterm_wait *xterm = data;
int fd;
#include "asm/ptrace.h"
extern int um_request_irq(unsigned int irq, int fd, int type,
- irqreturn_t (*handler)(int, void *,
- struct pt_regs *),
+ irqreturn_t (*handler)(int, void *),
unsigned long irqflags, const char * devname,
void *dev_id);
extern int init_aio_irq(int irq, char *name,
- irqreturn_t (*handler)(int, void *, struct pt_regs *));
+ irqreturn_t (*handler)(int, void *));
#endif
*/
unsigned int do_IRQ(int irq, union uml_pt_regs *regs)
{
- irq_enter();
- __do_IRQ(irq);
- irq_exit();
- return 1;
+ struct pt_regs *old_regs = set_irq_regs((struct pt_regs *)regs);
+ irq_enter();
+ __do_IRQ(irq);
+ irq_exit();
+ set_irq_regs(old_regs);
+ return 1;
}
int um_request_irq(unsigned int irq, int fd, int type,
- irqreturn_t (*handler)(int, void *, struct pt_regs *),
+ irqreturn_t (*handler)(int, void *),
unsigned long irqflags, const char * devname,
void *dev_id)
{
}
}
-int init_aio_irq(int irq, char *name, irqreturn_t (*handler)(int, void *,
- struct pt_regs *))
+int init_aio_irq(int irq, char *name, irqreturn_t (*handler)(int, void *))
{
int fds[2], err;
/* Protected by sigio_lock() called from write_sigio_workaround */
static int sigio_irq_fd = -1;
-static irqreturn_t sigio_interrupt(int irq, void *data, struct pt_regs *unused)
+static irqreturn_t sigio_interrupt(int irq, void *data)
{
char c;
return nsecs;
}
-irqreturn_t um_timer(int irq, void *dev, struct pt_regs *regs)
+irqreturn_t um_timer(int irq, void *dev)
{
unsigned long long nsecs;
unsigned long flags;
* [ if a single-CPU system runs an SMP kernel then we call the local
* interrupt as well. Thus we cannot inline the local irq ... ]
*/
-void smp_apic_timer_interrupt(void)
+void smp_apic_timer_interrupt(struct pt_regs *regs)
{
+ struct pt_regs *old_regs = set_irq_regs(regs);
+
/*
* the NMI deadlock-detector uses this.
*/
irq_enter();
smp_local_timer_interrupt();
irq_exit();
+ set_irq_regs(old_regs);
}
/*
return cpumask_of_cpu(0);
}
+static cpumask_t cluster_vector_allocation_domain(int cpu)
+{
+ cpumask_t domain = CPU_MASK_NONE;
+ cpu_set(cpu, domain);
+ return domain;
+}
+
static void cluster_send_IPI_mask(cpumask_t mask, int vector)
{
send_IPI_mask_sequence(mask, vector);
.int_delivery_mode = dest_Fixed,
.int_dest_mode = (APIC_DEST_PHYSICAL != 0),
.target_cpus = cluster_target_cpus,
+ .vector_allocation_domain = cluster_vector_allocation_domain,
.apic_id_registered = cluster_apic_id_registered,
.init_apic_ldr = cluster_init_apic_ldr,
.send_IPI_all = cluster_send_IPI_all,
return cpu_online_map;
}
+static cpumask_t flat_vector_allocation_domain(int cpu)
+{
+ /* Careful. Some cpus do not strictly honor the set of cpus
+ * specified in the interrupt destination when using lowest
+ * priority interrupt delivery mode.
+ *
+ * In particular there was a hyperthreading cpu observed to
+ * deliver interrupts to the wrong hyperthread when only one
+ * hyperthread was specified in the interrupt desitination.
+ */
+ cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
+ return domain;
+}
+
/*
* Set up the logical destination ID.
*
.int_delivery_mode = dest_LowestPrio,
.int_dest_mode = (APIC_DEST_LOGICAL != 0),
.target_cpus = flat_target_cpus,
+ .vector_allocation_domain = flat_vector_allocation_domain,
.apic_id_registered = flat_apic_id_registered,
.init_apic_ldr = flat_init_apic_ldr,
.send_IPI_all = flat_send_IPI_all,
return cpumask_of_cpu(0);
}
+static cpumask_t physflat_vector_allocation_domain(int cpu)
+{
+ cpumask_t domain = CPU_MASK_NONE;
+ cpu_set(cpu, domain);
+ return domain;
+}
+
+
static void physflat_send_IPI_mask(cpumask_t cpumask, int vector)
{
send_IPI_mask_sequence(cpumask, vector);
.int_delivery_mode = dest_Fixed,
.int_dest_mode = (APIC_DEST_PHYSICAL != 0),
.target_cpus = physflat_target_cpus,
+ .vector_allocation_domain = physflat_vector_allocation_domain,
.apic_id_registered = flat_apic_id_registered,
.init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/
.send_IPI_all = physflat_send_IPI_all,
#include <asm/msidef.h>
#include <asm/hypertransport.h>
-static int assign_irq_vector(int irq, cpumask_t mask);
+static int assign_irq_vector(int irq, cpumask_t mask, cpumask_t *result);
#define __apicdebuginit __init
cpus_and(mask, tmp, CPU_MASK_ALL);
- vector = assign_irq_vector(irq, mask);
+ vector = assign_irq_vector(irq, mask, &tmp);
if (vector < 0)
return;
- cpus_clear(tmp);
- cpu_set(vector >> 8, tmp);
dest = cpu_mask_to_apicid(tmp);
/*
dest = SET_APIC_LOGICAL_ID(dest);
spin_lock_irqsave(&ioapic_lock, flags);
- __target_IO_APIC_irq(irq, dest, vector & 0xff);
+ __target_IO_APIC_irq(irq, dest, vector);
set_native_irq_info(irq, mask);
spin_unlock_irqrestore(&ioapic_lock, flags);
}
}
/* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */
-unsigned int irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_EXTERNAL_VECTOR, 0 };
+static u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = {
+ [0] = FIRST_EXTERNAL_VECTOR + 0,
+ [1] = FIRST_EXTERNAL_VECTOR + 1,
+ [2] = FIRST_EXTERNAL_VECTOR + 2,
+ [3] = FIRST_EXTERNAL_VECTOR + 3,
+ [4] = FIRST_EXTERNAL_VECTOR + 4,
+ [5] = FIRST_EXTERNAL_VECTOR + 5,
+ [6] = FIRST_EXTERNAL_VECTOR + 6,
+ [7] = FIRST_EXTERNAL_VECTOR + 7,
+ [8] = FIRST_EXTERNAL_VECTOR + 8,
+ [9] = FIRST_EXTERNAL_VECTOR + 9,
+ [10] = FIRST_EXTERNAL_VECTOR + 10,
+ [11] = FIRST_EXTERNAL_VECTOR + 11,
+ [12] = FIRST_EXTERNAL_VECTOR + 12,
+ [13] = FIRST_EXTERNAL_VECTOR + 13,
+ [14] = FIRST_EXTERNAL_VECTOR + 14,
+ [15] = FIRST_EXTERNAL_VECTOR + 15,
+};
+
+static cpumask_t irq_domain[NR_IRQ_VECTORS] __read_mostly = {
+ [0] = CPU_MASK_ALL,
+ [1] = CPU_MASK_ALL,
+ [2] = CPU_MASK_ALL,
+ [3] = CPU_MASK_ALL,
+ [4] = CPU_MASK_ALL,
+ [5] = CPU_MASK_ALL,
+ [6] = CPU_MASK_ALL,
+ [7] = CPU_MASK_ALL,
+ [8] = CPU_MASK_ALL,
+ [9] = CPU_MASK_ALL,
+ [10] = CPU_MASK_ALL,
+ [11] = CPU_MASK_ALL,
+ [12] = CPU_MASK_ALL,
+ [13] = CPU_MASK_ALL,
+ [14] = CPU_MASK_ALL,
+ [15] = CPU_MASK_ALL,
+};
-static int __assign_irq_vector(int irq, cpumask_t mask)
+static int __assign_irq_vector(int irq, cpumask_t mask, cpumask_t *result)
{
/*
* NOTE! The local APIC isn't very good at handling
BUG_ON((unsigned)irq >= NR_IRQ_VECTORS);
- if (IO_APIC_VECTOR(irq) > 0)
- old_vector = IO_APIC_VECTOR(irq);
- if ((old_vector > 0) && cpu_isset(old_vector >> 8, mask)) {
- return old_vector;
+ if (irq_vector[irq] > 0)
+ old_vector = irq_vector[irq];
+ if (old_vector > 0) {
+ cpus_and(*result, irq_domain[irq], mask);
+ if (!cpus_empty(*result))
+ return old_vector;
}
for_each_cpu_mask(cpu, mask) {
+ cpumask_t domain;
+ int first, new_cpu;
int vector, offset;
- vector = pos[cpu].vector;
- offset = pos[cpu].offset;
+
+ domain = vector_allocation_domain(cpu);
+ first = first_cpu(domain);
+
+ vector = pos[first].vector;
+ offset = pos[first].offset;
next:
vector += 8;
if (vector >= FIRST_SYSTEM_VECTOR) {
offset = (offset + 1) % 8;
vector = FIRST_DEVICE_VECTOR + offset;
}
- if (unlikely(pos[cpu].vector == vector))
+ if (unlikely(pos[first].vector == vector))
continue;
if (vector == IA32_SYSCALL_VECTOR)
goto next;
- if (per_cpu(vector_irq, cpu)[vector] != -1)
- goto next;
+ for_each_cpu_mask(new_cpu, domain)
+ if (per_cpu(vector_irq, cpu)[vector] != -1)
+ goto next;
/* Found one! */
- pos[cpu].vector = vector;
- pos[cpu].offset = offset;
+ for_each_cpu_mask(new_cpu, domain) {
+ pos[cpu].vector = vector;
+ pos[cpu].offset = offset;
+ }
if (old_vector >= 0) {
- int old_cpu = old_vector >> 8;
- old_vector &= 0xff;
- per_cpu(vector_irq, old_cpu)[old_vector] = -1;
+ int old_cpu;
+ for_each_cpu_mask(old_cpu, domain)
+ per_cpu(vector_irq, old_cpu)[old_vector] = -1;
}
- per_cpu(vector_irq, cpu)[vector] = irq;
- vector |= cpu << 8;
- IO_APIC_VECTOR(irq) = vector;
+ for_each_cpu_mask(new_cpu, domain)
+ per_cpu(vector_irq, new_cpu)[vector] = irq;
+ irq_vector[irq] = vector;
+ irq_domain[irq] = domain;
+ cpus_and(*result, domain, mask);
return vector;
}
return -ENOSPC;
}
-static int assign_irq_vector(int irq, cpumask_t mask)
+static int assign_irq_vector(int irq, cpumask_t mask, cpumask_t *result)
{
int vector;
unsigned long flags;
spin_lock_irqsave(&vector_lock, flags);
- vector = __assign_irq_vector(irq, mask);
+ vector = __assign_irq_vector(irq, mask, result);
spin_unlock_irqrestore(&vector_lock, flags);
return vector;
}
if (IO_APIC_IRQ(irq)) {
cpumask_t mask;
- vector = assign_irq_vector(irq, TARGET_CPUS);
+ vector = assign_irq_vector(irq, TARGET_CPUS, &mask);
if (vector < 0)
continue;
- cpus_clear(mask);
- cpu_set(vector >> 8, mask);
entry.dest.logical.logical_dest = cpu_mask_to_apicid(mask);
- entry.vector = vector & 0xff;
+ entry.vector = vector;
ioapic_register_intr(irq, vector, IOAPIC_AUTO);
if (!apic && (irq < 16))
*/
for (irq = 0; irq < NR_IRQS ; irq++) {
int tmp = irq;
- if (IO_APIC_IRQ(tmp) && !IO_APIC_VECTOR(tmp)) {
+ if (IO_APIC_IRQ(tmp) && !irq_vector[tmp]) {
/*
* Hmm.. We don't have an entry for this,
* so default to an old-fashioned 8259
{
int apic1, pin1, apic2, pin2;
int vector;
+ cpumask_t mask;
/*
* get/set the timer IRQ vector:
*/
disable_8259A_irq(0);
- vector = assign_irq_vector(0, TARGET_CPUS);
+ vector = assign_irq_vector(0, TARGET_CPUS, &mask);
/*
* Subtle, code in do_timer_interrupt() expects an AEOI
int new;
int vector = 0;
unsigned long flags;
+ cpumask_t mask;
irq = -ENOSPC;
spin_lock_irqsave(&vector_lock, flags);
continue;
if (irq_vector[new] != 0)
continue;
- vector = __assign_irq_vector(new, TARGET_CPUS);
+ vector = __assign_irq_vector(new, TARGET_CPUS, &mask);
if (likely(vector > 0))
irq = new;
break;
{
int vector;
unsigned dest;
+ cpumask_t tmp;
- vector = assign_irq_vector(irq, TARGET_CPUS);
+ vector = assign_irq_vector(irq, TARGET_CPUS, &tmp);
if (vector >= 0) {
- cpumask_t tmp;
-
- cpus_clear(tmp);
- cpu_set(vector >> 8, tmp);
dest = cpu_mask_to_apicid(tmp);
msg->address_hi = MSI_ADDR_BASE_HI;
cpus_and(mask, tmp, CPU_MASK_ALL);
- vector = assign_irq_vector(irq, mask);
+ vector = assign_irq_vector(irq, mask, &tmp);
if (vector < 0)
return;
- cpus_clear(tmp);
- cpu_set(vector >> 8, tmp);
dest = cpu_mask_to_apicid(tmp);
read_msi_msg(irq, &msg);
cpus_and(mask, tmp, CPU_MASK_ALL);
- vector = assign_irq_vector(irq, mask);
+ vector = assign_irq_vector(irq, mask, &tmp);
if (vector < 0)
return;
- cpus_clear(tmp);
- cpu_set(vector >> 8, tmp);
dest = cpu_mask_to_apicid(tmp);
target_ht_irq(irq, dest, vector & 0xff);
int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
{
int vector;
+ cpumask_t tmp;
- vector = assign_irq_vector(irq, TARGET_CPUS);
+ vector = assign_irq_vector(irq, TARGET_CPUS, &tmp);
if (vector >= 0) {
u32 low, high;
unsigned dest;
- cpumask_t tmp;
- cpus_clear(tmp);
- cpu_set(vector >> 8, tmp);
dest = cpu_mask_to_apicid(tmp);
high = HT_IRQ_HIGH_DEST_ID(dest);
add_pin_to_irq(irq, ioapic, pin);
- vector = assign_irq_vector(irq, TARGET_CPUS);
+ vector = assign_irq_vector(irq, TARGET_CPUS, &mask);
if (vector < 0)
return vector;
- cpus_clear(mask);
- cpu_set(vector >> 8, mask);
-
/*
* Generate a PCI IRQ routing entry and program the IOAPIC accordingly.
* Note that we mask (disable) IRQs now -- these get enabled when the
*/
continue;
} else if (vio_sysrq_pressed) {
- handle_sysrq(cevent->data[index], NULL, tty);
+ handle_sysrq(cevent->data[index], tty);
vio_sysrq_pressed = 0;
/*
* continue because we don't want to add
local_irq_save(flags);
SCCmod(INT_AND_DMA_REG, 0xff, IDR_TX_INT_ENAB);
/* restart the transmitter */
- scc_tx_int (0, port, 0);
+ scc_tx_int (0, port);
local_irq_restore(flags);
}
{
struct host_info *hi = (struct host_info *)__hi;
struct hpsb_host *host = hi->host;
- unsigned int g, generation = get_hpsb_generation(host) - 1;
+ unsigned int g, generation = 0;
int i, reset_cycles = 0;
/* Setup our device-model entries */
kbd->dev->id.vendor = PCI_VENDOR_ID_HP;
kbd->dev->id.product = 0x0001; /* TODO: get from kbd->rsc */
kbd->dev->id.version = 0x0100; /* TODO: get from kbd->rsc */
- kbd->dev->dev = &serio->dev;
+ kbd->dev->cdev.dev = &serio->dev;
for (i = 0; i < 128; i++) {
set_bit(hil_kbd_set1[i], kbd->dev->keybit);
ptr->dev->id.vendor = PCI_VENDOR_ID_HP;
ptr->dev->id.product = 0x0001; /* TODO: get from ptr->rsc */
ptr->dev->id.version = 0x0100; /* TODO: get from ptr->rsc */
- ptr->dev->dev = &serio->dev;
+ ptr->dev->cdev.dev = &serio->dev;
input_register_device(ptr->dev);
printk(KERN_INFO "input: %s (%s), ID: %d\n",
/* make sure any received data is returned as fast as possible */
/* this is important e.g. when we set the LEDs on the keyboard */
- gscps2_interrupt(0, NULL, NULL);
+ gscps2_interrupt(0, NULL);
return 1;
}
/* enable it */
gscps2_enable(ps2port, ENABLE);
- gscps2_interrupt(0, NULL, NULL);
+ gscps2_interrupt(0, NULL);
return 0;
}
if (did != (p & HIL_PKT_ADDR_MASK) >> 8) {
if (drv == NULL || drv->interrupt == NULL) goto skip;
- drv->interrupt(serio, 0, 0, NULL);
- drv->interrupt(serio, HIL_ERR_INT >> 16, 0, NULL);
- drv->interrupt(serio, HIL_PKT_CMD >> 8, 0, NULL);
- drv->interrupt(serio, HIL_CMD_POL + cnt, 0, NULL);
+ drv->interrupt(serio, 0, 0);
+ drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
+ drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
+ drv->interrupt(serio, HIL_CMD_POL + cnt, 0);
skip:
did = (p & HIL_PKT_ADDR_MASK) >> 8;
serio = did ? mlc->serio[mlc->di_map[did-1]] : NULL;
}
cnt++; i++;
if (drv == NULL || drv->interrupt == NULL) continue;
- drv->interrupt(serio, (p >> 24), 0, NULL);
- drv->interrupt(serio, (p >> 16) & 0xff, 0, NULL);
- drv->interrupt(serio, (p >> 8) & ~HIL_PKT_ADDR_MASK, 0, NULL);
- drv->interrupt(serio, p & 0xff, 0, NULL);
+ drv->interrupt(serio, (p >> 24), 0);
+ drv->interrupt(serio, (p >> 16) & 0xff, 0);
+ drv->interrupt(serio, (p >> 8) & ~HIL_PKT_ADDR_MASK, 0);
+ drv->interrupt(serio, p & 0xff, 0);
}
}
while ((last != idx) && (*last == 0)) last--;
while (idx != last) {
- drv->interrupt(serio, 0, 0, NULL);
- drv->interrupt(serio, HIL_ERR_INT >> 16, 0, NULL);
- drv->interrupt(serio, 0, 0, NULL);
- drv->interrupt(serio, *idx, 0, NULL);
+ drv->interrupt(serio, 0, 0);
+ drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
+ drv->interrupt(serio, 0, 0);
+ drv->interrupt(serio, *idx, 0);
idx++;
}
- drv->interrupt(serio, 0, 0, NULL);
- drv->interrupt(serio, HIL_ERR_INT >> 16, 0, NULL);
- drv->interrupt(serio, HIL_PKT_CMD >> 8, 0, NULL);
- drv->interrupt(serio, *idx, 0, NULL);
+ drv->interrupt(serio, 0, 0);
+ drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
+ drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
+ drv->interrupt(serio, *idx, 0);
mlc->serio_oidx[map->didx] = 0;
mlc->serio_opacket[map->didx] = 0;
void adb_iop_poll(void)
{
if (adb_iop_state == idle) adb_iop_start();
- iop_ism_irq(0, (void *) ADB_IOP, NULL);
+ iop_ism_irq(0, (void *) ADB_IOP);
}
int adb_iop_reset_bus(void)
local_irq_save(flags);
if (in_8(&adb->intr.r) != 0)
- macio_adb_interrupt(0, NULL, NULL);
+ macio_adb_interrupt(0, NULL);
local_irq_restore(flags);
}
unsigned long flags;
local_irq_save(flags);
- if (via[IFR] & SR_INT) macii_interrupt(0, NULL, NULL);
+ if (via[IFR] & SR_INT) macii_interrupt(0, NULL);
local_irq_restore(flags);
}
local_irq_save(flags);
if (via[IFR] & SR_INT) {
- maciisi_interrupt(0, NULL, NULL);
+ maciisi_interrupt(0, NULL);
}
else /* avoid calling this function too quickly in a loop */
udelay(ADB_DELAY);
}
if (pmu_state == idle) {
adb_int_pending = 1;
- pmu_interrupt(0, NULL, NULL);
+ pmu_interrupt(0, NULL);
}
pmu_poll();
udelay(10);
local_irq_save(flags);
if (via1[IFR] & SR_INT) {
via1[IFR] = SR_INT;
- pmu_interrupt(IRQ_MAC_ADB_SR, NULL, NULL);
+ pmu_interrupt(IRQ_MAC_ADB_SR, NULL);
}
if (via1[IFR] & CB1_INT) {
via1[IFR] = CB1_INT;
- pmu_interrupt(IRQ_MAC_ADB_CL, NULL, NULL);
+ pmu_interrupt(IRQ_MAC_ADB_CL, NULL);
}
local_irq_restore(flags);
}
printk(KERN_INFO DRIVER_NAME
": demand removing card from socket %d\n", cnt);
sock = fm->sockets[cnt];
- fm->sockets[cnt] = 0;
+ fm->sockets[cnt] = NULL;
fm->remove_mask &= ~(1 << cnt);
writel(0x0e00, sock->addr + SOCK_CONTROL);
return IRQ_HANDLED;
}
-static tifm_media_id tifm_7xx1_toggle_sock_power(char *sock_addr, int is_x2)
+static tifm_media_id tifm_7xx1_toggle_sock_power(char __iomem *sock_addr, int is_x2)
{
unsigned int s_state;
int cnt;
return (readl(sock_addr + SOCK_PRESENT_STATE) >> 4) & 7;
}
-inline static char *tifm_7xx1_sock_addr(char *base_addr, unsigned int sock_num)
+inline static char __iomem *
+tifm_7xx1_sock_addr(char __iomem *base_addr, unsigned int sock_num)
{
return base_addr + ((sock_num + 1) << 10);
}
char *card_name = "xx";
int cnt, ok_to_register;
unsigned int insert_mask;
- struct tifm_dev *new_sock = 0;
+ struct tifm_dev *new_sock = NULL;
if (!class_device_get(&fm->cdev))
return;
if (!ok_to_register ||
device_register(&new_sock->dev)) {
spin_lock_irqsave(&fm->lock, flags);
- fm->sockets[cnt] = 0;
+ fm->sockets[cnt] = NULL;
spin_unlock_irqrestore(&fm->lock,
flags);
tifm_free_device(&new_sock->dev);
tifm_remove_adapter(fm);
- pci_set_drvdata(dev, 0);
+ pci_set_drvdata(dev, NULL);
iounmap(fm->addr);
pci_intx(dev, 0);
dev->wq = create_singlethread_workqueue(dev->wq_name);
if (!dev->wq) {
kfree(dev);
- return 0;
+ return NULL;
}
dev->dev.parent = fm->dev;
dev->dev.bus = &tifm_bus_type;
struct tifm_dev *sock = host->dev;
struct mmc_host *mmc = tifm_get_drvdata(sock);
struct mmc_request *mrq;
- struct mmc_data *r_data = 0;
+ struct mmc_data *r_data = NULL;
unsigned long flags;
spin_lock_irqsave(&sock->lock, flags);
mrq = host->req;
- host->req = 0;
+ host->req = NULL;
host->state = IDLE;
if (!mrq) {
struct tifm_dev *sock = host->dev;
unsigned long flags;
struct mmc_data *r_data = mrq->cmd->data;
- char *t_buffer = 0;
+ char *t_buffer = NULL;
if (r_data) {
t_buffer = kmap(r_data->sg->page);
struct tifm_dev *sock = host->dev;
struct mmc_host *mmc = tifm_get_drvdata(sock);
struct mmc_request *mrq;
- struct mmc_data *r_data = 0;
+ struct mmc_data *r_data = NULL;
unsigned long flags;
spin_lock_irqsave(&sock->lock, flags);
mrq = host->req;
- host->req = 0;
+ host->req = NULL;
host->state = IDLE;
if (!mrq) {
r_data->bytes_xfered += r_data->blksz -
readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
}
- host->buffer = 0;
+ host->buffer = NULL;
host->buffer_pos = 0;
host->buffer_size = 0;
}
sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
- tifm_set_drvdata(sock, 0);
+ tifm_set_drvdata(sock, NULL);
mmc_free_host(mmc);
}
WRITERAP(lp, LE_CSR0);
WRITERDP(lp, LE_C0_STRT);
spin_unlock (&lp->devlock);
- lance_interrupt(dev->irq, dev, NULL);
+ lance_interrupt(dev->irq, dev);
}
#endif
static void dm9000_poll_controller(struct net_device *dev)
{
disable_irq(dev->irq);
- dm9000_interrupt(dev->irq,dev,NULL);
+ dm9000_interrupt(dev->irq,dev);
enable_irq(dev->irq);
}
#endif
static void i596_poll_controller(struct net_device *dev)
{
disable_irq(dev->irq);
- i596_interrupt(dev->irq, dev, NULL);
+ i596_interrupt(dev->irq, dev);
enable_irq(dev->irq);
}
#endif
/* wait for previous write to complete */
mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num));
- mv643xx_eth_int_handler(netdev->irq, netdev, NULL);
+ mv643xx_eth_int_handler(netdev->irq, netdev);
mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), ETH_INT_UNMASK_ALL);
}
static void smc_poll_controller(struct net_device *dev)
{
disable_irq(dev->irq);
- smc_interrupt(dev->irq, dev, NULL);
+ smc_interrupt(dev->irq, dev);
enable_irq(dev->irq);
}
#endif
int irq = dino_dev->global_irq[local_irq];
DBG(KERN_DEBUG "%s(%d, %p) mask 0x%x\n",
__FUNCTION__, irq, intr_dev, mask);
- __do_IRQ(irq, regs);
+ __do_IRQ(irq);
mask &= ~(1 << local_irq);
} while (mask);
}
spin_unlock_irqrestore(&eisa_irq_lock, flags);
- __do_IRQ(irq, regs);
+ __do_IRQ(irq);
spin_lock_irqsave(&eisa_irq_lock, flags);
/* unmask */
if (this_port[i] != NULL)
if (pia(this_port[i])->crb & 128) { /* Board caused interrupt */
dummy = pia(this_port[i])->pprb; /* clear irq bit */
- parport_generic_irq(irq, this_port[i], regs);
+ parport_generic_irq(irq, this_port[i]);
}
return IRQ_HANDLED;
}
static irqreturn_t parport_sunbpp_interrupt(int irq, void *dev_id)
{
- parport_generic_irq(irq, (struct parport *) dev_id, regs);
+ parport_generic_irq(irq, (struct parport *) dev_id);
return IRQ_HANDLED;
}
static void pcc_interrupt_wrapper(u_long data)
{
- pcc_interrupt(0, NULL, NULL);
+ pcc_interrupt(0, NULL);
init_timer(&poll_timer);
poll_timer.expires = jiffies + poll_interval;
add_timer(&poll_timer);
sts = sio_in(up, SIOSTS);
if (sts & 0x5) {
spin_lock(&up->port.lock);
- m32r_sio_handle_port(up, sts, NULL);
+ m32r_sio_handle_port(up, sts);
spin_unlock(&up->port.lock);
}
continue;
}
- if (uart_handle_sysrq_char(port, data & 0xffu, NULL))
+ if (uart_handle_sysrq_char(port, data & 0xffu))
continue;
tty_insert_flip_char(tty, data & 0xFF, TTY_NORMAL);
if (ch == 0)
continue;
if (time_before(jiffies, break_pressed + HZ * 5)) {
- handle_sysrq(ch, regs, NULL);
+ handle_sysrq(ch, NULL);
break_pressed = 0;
continue;
}
ep->already_seen = ep->setup_stage = 0;
spin_unlock (&dum->lock);
- usb_hcd_giveback_urb (dummy_to_hcd(dum), urb, NULL);
+ usb_hcd_giveback_urb (dummy_to_hcd(dum), urb);
spin_lock (&dum->lock);
goto restart;
mos7840_port->icount.tx = 0;
mos7840_port->icount.rx = 0;
- dbg("\n\nusb_serial serial:%x mos7840_port:%x\n usb_serial_port port:%x\n\n", (unsigned int)serial, (unsigned int)mos7840_port, (unsigned int)port);
+ dbg("\n\nusb_serial serial:%p mos7840_port:%p\n usb_serial_port port:%p\n\n", serial, mos7840_port, port);
return 0;
int i;
int bytes_sent = 0;
int transfer_size;
- int from_user = 0;
struct moschip_port *mos7840_port;
struct usb_serial *serial;
}
transfer_size = min(count, URB_TRANSFER_BUFFER_SIZE);
- if (from_user) {
- if (copy_from_user
- (urb->transfer_buffer, current_position, transfer_size)) {
- bytes_sent = -EFAULT;
- goto exit;
- }
- } else {
- memcpy(urb->transfer_buffer, current_position, transfer_size);
- }
+ memcpy(urb->transfer_buffer, current_position, transfer_size);
/* fill urb with data and submit */
usb_fill_bulk_urb(urb,
*****************************************************************************/
static int mos7840_get_lsr_info(struct moschip_port *mos7840_port,
- unsigned int *value)
+ unsigned int __user *value)
{
int count;
unsigned int result = 0;
*****************************************************************************/
static int mos7840_get_bytes_avail(struct moschip_port *mos7840_port,
- unsigned int *value)
+ unsigned int __user *value)
{
unsigned int result = 0;
struct tty_struct *tty = mos7840_port->port->tty;
*****************************************************************************/
static int mos7840_set_modem_info(struct moschip_port *mos7840_port,
- unsigned int cmd, unsigned int *value)
+ unsigned int cmd, unsigned int __user *value)
{
unsigned int mcr;
unsigned int arg;
*****************************************************************************/
static int mos7840_get_modem_info(struct moschip_port *mos7840_port,
- unsigned int *value)
+ unsigned int __user *value)
{
unsigned int result = 0;
__u16 msr;
*****************************************************************************/
static int mos7840_get_serial_info(struct moschip_port *mos7840_port,
- struct serial_struct *retinfo)
+ struct serial_struct __user *retinfo)
{
struct serial_struct tmp;
static int mos7840_ioctl(struct usb_serial_port *port, struct file *file,
unsigned int cmd, unsigned long arg)
{
+ void __user *argp = (void __user *)arg;
struct moschip_port *mos7840_port;
struct tty_struct *tty;
case TIOCINQ:
dbg("%s (%d) TIOCINQ", __FUNCTION__, port->number);
- return mos7840_get_bytes_avail(mos7840_port,
- (unsigned int *)arg);
- break;
+ return mos7840_get_bytes_avail(mos7840_port, argp);
case TIOCOUTQ:
dbg("%s (%d) TIOCOUTQ", __FUNCTION__, port->number);
return put_user(tty->driver->chars_in_buffer ?
tty->driver->chars_in_buffer(tty) : 0,
(int __user *)arg);
- break;
case TCFLSH:
retval = tty_check_change(tty);
case TCGETS:
if (kernel_termios_to_user_termios
- ((struct termios __user *)arg, tty->termios))
+ ((struct termios __user *)argp, tty->termios))
return -EFAULT;
return 0;
case TIOCSERGETLSR:
dbg("%s (%d) TIOCSERGETLSR", __FUNCTION__, port->number);
- return mos7840_get_lsr_info(mos7840_port, (unsigned int *)arg);
+ return mos7840_get_lsr_info(mos7840_port, argp);
return 0;
case TIOCMBIS:
dbg("%s (%d) TIOCMSET/TIOCMBIC/TIOCMSET", __FUNCTION__,
port->number);
mosret =
- mos7840_set_modem_info(mos7840_port, cmd,
- (unsigned int *)arg);
+ mos7840_set_modem_info(mos7840_port, cmd, argp);
return mosret;
case TIOCMGET:
dbg("%s (%d) TIOCMGET", __FUNCTION__, port->number);
- return mos7840_get_modem_info(mos7840_port,
- (unsigned int *)arg);
+ return mos7840_get_modem_info(mos7840_port, argp);
case TIOCGSERIAL:
dbg("%s (%d) TIOCGSERIAL", __FUNCTION__, port->number);
- return mos7840_get_serial_info(mos7840_port,
- (struct serial_struct *)arg);
+ return mos7840_get_serial_info(mos7840_port, argp);
case TIOCSSERIAL:
dbg("%s (%d) TIOCSSERIAL", __FUNCTION__, port->number);
dbg("%s (%d) TIOCGICOUNT RX=%d, TX=%d", __FUNCTION__,
port->number, icount.rx, icount.tx);
- if (copy_to_user((void *)arg, &icount, sizeof(icount)))
+ if (copy_to_user(argp, &icount, sizeof(icount)))
return -EFAULT;
return 0;
/* setting configuration feature to one */
usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0),
- (__u8) 0x03, 0x00, 0x01, 0x00, 0x00, 0x00, 5 * HZ);
+ (__u8) 0x03, 0x00, 0x01, 0x00, NULL, 0x00, 5 * HZ);
return 0;
}
return 0;
}
-static struct nodeinfo *nodeid2nodeinfo(int nodeid, int alloc)
+static struct nodeinfo *nodeid2nodeinfo(int nodeid, gfp_t alloc)
{
struct nodeinfo *ni;
int r;
}
-static struct writequeue_entry *new_writequeue_entry(int allocation)
+static struct writequeue_entry *new_writequeue_entry(gfp_t allocation)
{
struct writequeue_entry *entry;
return entry;
}
-void *dlm_lowcomms_get_buffer(int nodeid, int len, int allocation, char **ppc)
+void *dlm_lowcomms_get_buffer(int nodeid, int len, gfp_t allocation, char **ppc)
{
struct writequeue_entry *e;
int offset = 0;
int dlm_lowcomms_start(void);
void dlm_lowcomms_stop(void);
int dlm_lowcomms_close(int nodeid);
-void *dlm_lowcomms_get_buffer(int nodeid, int len, int allocation, char **ppc);
+void *dlm_lowcomms_get_buffer(int nodeid, int len, gfp_t allocation, char **ppc);
void dlm_lowcomms_commit_buffer(void *mh);
#endif /* __LOWCOMMS_DOT_H__ */
};
static int hppfs_filldir(void *d, const char *name, int size,
- loff_t offset, ino_t inode, unsigned int type)
+ loff_t offset, u64 inode, unsigned int type)
{
struct hppfs_dirent *dirent = d;
struct compat_ncp_privatedata_ioctl user32;
user32.len = user.len;
user32.data = (unsigned long) user.data;
- if (copy_to_user(&user32, argp, sizeof(user32)))
+ if (copy_to_user(argp, &user32, sizeof(user32)))
return -EFAULT;
} else
#endif
if (new)
nfs_free_client(new);
- if (clp->cl_cons_state == NFS_CS_INITING) {
- DECLARE_WAITQUEUE(myself, current);
-
- add_wait_queue(&nfs_client_active_wq, &myself);
-
- for (;;) {
- set_current_state(TASK_INTERRUPTIBLE);
- if (signal_pending(current) ||
- clp->cl_cons_state > NFS_CS_READY)
- break;
- schedule();
- }
-
- remove_wait_queue(&nfs_client_active_wq, &myself);
-
- if (signal_pending(current)) {
- nfs_put_client(clp);
- return ERR_PTR(-ERESTARTSYS);
- }
+ error = wait_event_interruptible(nfs_client_active_wq,
+ clp->cl_cons_state != NFS_CS_INITING);
+ if (error < 0) {
+ nfs_put_client(clp);
+ return ERR_PTR(-ERESTARTSYS);
}
if (clp->cl_cons_state < NFS_CS_READY) {
bh = sb_bread(sb, block);
if (bh == NULL)
- reiserfs_warning(sb, "sh-2029: %s: bitmap block (#%lu) "
- "reading failed", __FUNCTION__, bh->b_blocknr);
+ reiserfs_warning(sb, "sh-2029: %s: bitmap block (#%u) "
+ "reading failed", __FUNCTION__, block);
else {
if (buffer_locked(bh)) {
PROC_INFO_INC(sb, scan_bitmap.wait);
}
EXPORT_SYMBOL_GPL(vfs_getxattr);
+ssize_t
+vfs_listxattr(struct dentry *d, char *list, size_t size)
+{
+ ssize_t error;
+
+ error = security_inode_listxattr(d);
+ if (error)
+ return error;
+ error = -EOPNOTSUPP;
+ if (d->d_inode->i_op && d->d_inode->i_op->listxattr) {
+ error = d->d_inode->i_op->listxattr(d, list, size);
+ } else {
+ error = security_inode_listsecurity(d->d_inode, list, size);
+ if (size && error > size)
+ error = -ERANGE;
+ }
+ return error;
+}
+EXPORT_SYMBOL_GPL(vfs_listxattr);
+
int
vfs_removexattr(struct dentry *dentry, char *name)
{
return -ENOMEM;
}
- error = security_inode_listxattr(d);
- if (error)
- goto out;
- error = -EOPNOTSUPP;
- if (d->d_inode->i_op && d->d_inode->i_op->listxattr) {
- error = d->d_inode->i_op->listxattr(d, klist, size);
- } else {
- error = security_inode_listsecurity(d->d_inode, klist, size);
- if (size && error > size)
- error = -ERANGE;
- }
+ error = vfs_listxattr(d, klist, size);
if (error > 0) {
if (size && copy_to_user(list, klist, error))
error = -EFAULT;
than XATTR_LIST_MAX bytes. Not possible. */
error = -E2BIG;
}
-out:
kfree(klist);
return error;
}
--- /dev/null
+#include <asm-generic/irq_regs.h>
struct task_struct;
struct mm_struct;
-struct pt_regs;
struct vm_area_struct;
struct linux_hose_info;
struct pci_dev;
void (*update_irq_hw)(unsigned long, unsigned long, int);
void (*ack_irq)(unsigned long);
- void (*device_interrupt)(unsigned long vector, struct pt_regs *regs);
- void (*machine_check)(u64 vector, u64 la, struct pt_regs *regs);
+ void (*device_interrupt)(unsigned long vector);
+ void (*machine_check)(u64 vector, u64 la);
void (*smp_callin)(void);
void (*init_arch)(void);
if (!(action->flags & IRQF_TIMER) && system_timer->dyn_tick) { \
write_seqlock(&xtime_lock); \
if (system_timer->dyn_tick->state & DYN_TICK_ENABLED) \
- system_timer->dyn_tick->handler(irq, 0, regs); \
+ system_timer->dyn_tick->handler(irq, NULL); \
write_sequnlock(&xtime_lock); \
}
#endif
*/
extern void __iomem * __ioremap_pfn(unsigned long, unsigned long, size_t, unsigned long);
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
-extern void __iounmap(void __iomem *addr);
+extern void __iounmap(volatile void __iomem *addr);
/*
* Bad read/write accesses...
* Interrupt entry/exit code at both C and assembly level
*/
-extern u8 irq_vector[NR_IRQ_VECTORS];
-#define IO_APIC_VECTOR(irq) (irq_vector[irq])
-
extern void (*interrupt[NR_IRQS])(void);
#ifdef CONFIG_SMP
extern struct device *xpc_chan;
extern int xpc_disengage_request_timelimit;
extern int xpc_disengage_request_timedout;
-extern irqreturn_t xpc_notify_IRQ_handler(int, void *, struct pt_regs *);
+extern irqreturn_t xpc_notify_IRQ_handler(int, void *);
extern void xpc_dropped_IPI_check(struct xpc_partition *);
extern void xpc_activate_partition(struct xpc_partition *);
extern void xpc_activate_kthreads(struct xpc_channel *, int);
--- /dev/null
+#include <asm-generic/irq_regs.h>
/***************************** Prototypes *****************************/
-void stdma_lock(irqreturn_t (*handler)(int, void *, struct pt_regs *),
- void *data);
+void stdma_lock(irqreturn_t (*handler)(int, void *), void *data);
void stdma_release( void );
int stdma_others_waiting( void );
int stdma_islocked( void );
struct scatterlist;
+#ifndef CONFIG_MMU_SUN3
static inline int dma_supported(struct device *dev, u64 mask)
{
return 1;
return 0;
}
+#else
+#include <asm-generic/dma-mapping-broken.h>
+#endif
+
#endif /* _M68K_DMA_MAPPING_H */
#include <linux/vmalloc.h>
-asmlinkage irqreturn_t floppy_hardint(int irq, void *dev_id,
- struct pt_regs *regs);
+asmlinkage irqreturn_t floppy_hardint(int irq, void *dev_id);
/* constants... */
/* this is the only truly Q40 specific function */
-asmlinkage irqreturn_t floppy_hardint(int irq, void *dev_id,
- struct pt_regs *regs)
+asmlinkage irqreturn_t floppy_hardint(int irq, void *dev_id)
{
register unsigned char st;
static int dma_wait=0;
#endif
if(!doing_pdma) {
- floppy_interrupt(irq, dev_id, regs);
+ floppy_interrupt(irq, dev_id);
return IRQ_HANDLED;
}
dma_wait=0;
#endif
doing_pdma = 0;
- floppy_interrupt(irq, dev_id, regs);
+ floppy_interrupt(irq, dev_id);
return IRQ_HANDLED;
}
#ifdef TRACE_FLPY_INT
}
static __inline__ void
-ide_get_lock(irqreturn_t (*handler)(int, void *, struct pt_regs *), void *data)
+ide_get_lock(irqreturn_t (*handler)(int, void *), void *data)
{
if (MACH_IS_ATARI) {
if (falconide_intr_lock == 0) {
* interrupt source (if it supports chaining).
*/
typedef struct irq_node {
- int (*handler)(int, void *, struct pt_regs *);
+ int (*handler)(int, void *);
void *dev_id;
struct irq_node *next;
unsigned long flags;
/*
* This structure has only 4 elements for speed reasons
*/
-typedef struct irq_handler {
- int (*handler)(int, void *, struct pt_regs *);
+struct irq_handler {
+ int (*handler)(int, void *);
unsigned long flags;
void *dev_id;
const char *devname;
-} irq_handler_t;
+};
struct irq_controller {
const char *name;
void (*handler)(unsigned int, struct pt_regs *));
extern void m68k_setup_irq_controller(struct irq_controller *, unsigned int, unsigned int);
-asmlinkage void m68k_handle_int(unsigned int, struct pt_regs *);
+asmlinkage void m68k_handle_int(unsigned int);
+asmlinkage void __m68k_handle_int(unsigned int, struct pt_regs *);
#endif /* _M68K_IRQ_H_ */
--- /dev/null
+#include <asm-generic/irq_regs.h>
int status; /* status of this message */
__u8 message[IOP_MSG_LEN]; /* the message being sent/received */
__u8 reply[IOP_MSG_LEN]; /* the reply to the message */
- void (*handler)(struct iop_msg *, struct pt_regs *);
+ void (*handler)(struct iop_msg *);
/* function to call when reply recvd */
};
extern int iop_scc_present,iop_ism_present;
extern int iop_listen(uint, uint,
- void (*handler)(struct iop_msg *, struct pt_regs *),
+ void (*handler)(struct iop_msg *),
const char *);
extern int iop_send_message(uint, uint, void *, uint, __u8 *,
- void (*)(struct iop_msg *, struct pt_regs *));
+ void (*)(struct iop_msg *));
extern void iop_complete_message(struct iop_msg *);
extern void iop_upload_code(uint, __u8 *, uint, __u16);
extern void iop_download_code(uint, __u8 *, uint, __u16);
struct rtc_pll_info;
struct buffer_head;
-extern void (*mach_sched_init) (irqreturn_t (*handler)(int, void *, struct pt_regs *));
+extern void (*mach_sched_init) (irqreturn_t (*handler)(int, void *));
/* machine dependent irq functions */
extern void (*mach_init_IRQ) (void);
extern void (*mach_get_model) (char *model);
return word ^ 31;
}
+struct pt_regs;
extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie);
#endif /* __KERNEL__ */
}
-asmlinkage irqreturn_t sun3xflop_hardint(int irq, void *dev_id,
- struct pt_regs * regs)
+asmlinkage irqreturn_t sun3xflop_hardint(int irq, void *dev_id)
{
register unsigned char st;
static int dma_wait=0;
#endif
if(!doing_pdma) {
- floppy_interrupt(irq, dev_id, regs);
+ floppy_interrupt(irq, dev_id);
return IRQ_HANDLED;
}
dma_wait=0;
#endif
- floppy_interrupt(irq, dev_id, regs);
+ floppy_interrupt(irq, dev_id);
return IRQ_HANDLED;
}
extern void dec_ecc_be_init(void);
extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup);
-extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id,
- struct pt_regs *regs);
+extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id);
#endif
#endif /* __ASM_MIPS_DEC_ECC_H */
extern void dec_kn01_be_init(void);
extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup);
-extern irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id,
- struct pt_regs *regs);
+extern irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id);
#endif
#endif /* __ASM_MIPS_DEC_KN01_H */
extern void dec_kn02xa_be_init(void);
extern int dec_kn02xa_be_handler(struct pt_regs *regs, int is_fixup);
-extern irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id,
- struct pt_regs *regs);
+extern irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id);
#endif
#endif /* __ASM_MIPS_DEC_KN02XA_H */
struct pt_regs;
-extern asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs);
+extern asmlinkage unsigned int do_IRQ(unsigned int irq);
#ifdef CONFIG_MIPS_MT_SMTC
/*
* Ideally there should be away to get this into kernel/irq/handle.c to
* avoid the overhead of a call for just a tiny function ...
*/
-#define do_IRQ(irq, regs) \
+#define do_IRQ(irq) \
do { \
irq_enter(); \
__DO_IRQ_SMTC_HOOK(); \
- __do_IRQ((irq), (regs)); \
+ __do_IRQ((irq)); \
irq_exit(); \
} while (0)
#endif
extern void arch_init_irq(void);
-extern void spurious_interrupt(struct pt_regs *regs);
+extern void spurious_interrupt(void);
#ifdef CONFIG_MIPS_MT_SMTC
struct irqaction;
-#include <asm-generic/irq_regs.h>
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
+ */
+#ifndef __ASM_IRQ_REGS_H
+#define __ASM_IRQ_REGS_H
+
+#define ARCH_HAS_OWN_IRQ_REGS
+
+#include <linux/thread_info.h>
+
+static inline struct pt_regs *get_irq_regs(void)
+{
+ return current_thread_info()->regs;
+}
+
+#endif /* __ASM_IRQ_REGS_H */
toshibaboards_setup_irq(int irq, struct irqaction * new);
-#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
-extern void tx_branch_likely_bug_fixup(struct pt_regs *regs);
-#endif
-
extern int (*toshibaboards_gen_iack)(void);
#endif /* !__ASSEMBLY__ */
extern struct dma_chan au1000_dma_table[];
extern int request_au1000_dma(int dev_id,
const char *dev_str,
- irqreturn_t (*irqhandler)(int, void *,
- struct pt_regs *),
+ irqreturn_t (*irqhandler)(int, void *),
unsigned long irqflags,
void *irq_dev_id);
extern void free_au1000_dma(unsigned int dmanr);
unsigned long config_vreg;
};
-extern void ll_mv64340_irq(struct pt_regs *regs);
+extern void ll_mv64340_irq(void);
#endif /* __ASM_MIPS_MARVELL_H */
#define MSC01_IRQ_EDGE 1
extern void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq);
-extern void ll_msc_irq(struct pt_regs *regs);
+extern void ll_msc_irq(void);
#endif /* __ASM_MIPS_BOARDS_MSC01_IC_H */
0-0xFFFFFFFF for kernel-thread
*/
struct restart_block restart_block;
+ struct pt_regs *regs;
};
/*
/*
* the corresponding low-level timer interrupt routine.
*/
-extern asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs);
+extern asmlinkage void ll_timer_interrupt(int irq);
/*
* profiling and process accouting is done separately in local_timer_interrupt
*/
extern void local_timer_interrupt(int irq, void *dev_id);
-extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs);
+extern asmlinkage void ll_local_timer_interrupt(int irq);
/*
* board specific routines required by time_init().
--- /dev/null
+#include <asm-generic/irq_regs.h>
unsigned long inptr, unsigned long outputr,
unsigned long glob_cfg);
-extern void pdc_init(void);
-
static inline char * os_id_to_string(u16 os_id) {
switch(os_id) {
case OS_ID_NONE: return "No OS";
#ifdef CONFIG_PPC_MERGE
extern void i8259_init(struct device_node *node, unsigned long intack_addr);
-extern unsigned int i8259_irq(struct pt_regs *regs);
+extern unsigned int i8259_irq(void);
#else
extern void i8259_init(unsigned long intack_addr, int offset);
-extern int i8259_irq(struct pt_regs *regs);
+extern int i8259_irq(void);
#endif
#endif /* __KERNEL__ */
int ibmebus_request_irq(struct ibmebus_dev *dev,
u32 ist,
- irqreturn_t (*handler)(int, void*, struct pt_regs *),
+ irqreturn_t (*handler)(int, void*),
unsigned long irq_flags, const char * devname,
void *dev_id);
void ibmebus_free_irq(struct ibmebus_dev *dev, u32 ist, void *dev_id);
#ifdef CONFIG_PPC_MERGE
extern void ipic_init(struct device_node *node, unsigned int flags);
-extern unsigned int ipic_get_irq(struct pt_regs *regs);
+extern unsigned int ipic_get_irq(void);
#else
extern void ipic_init(phys_addr_t phys_addr, unsigned int flags,
unsigned int irq_offset,
unsigned char *senses, unsigned int senses_count);
-extern int ipic_get_irq(struct pt_regs *regs);
+extern int ipic_get_irq(void);
#endif
#endif /* __ASM_IPIC_H__ */
u64 xCorrelationToken; /* Unique value for source/type x10-x17 */
};
-typedef void (*LpEventHandler)(struct HvLpEvent *, struct pt_regs *);
+typedef void (*LpEventHandler)(struct HvLpEvent *);
/* Register a handler for an event type - returns 0 on success */
extern int HvLpEvent_registerHandler(HvLpEvent_Type eventType,
extern struct hvlpevent_queue hvlpevent_queue;
extern int hvlpevent_is_pending(void);
-extern void process_hvlpevents(struct pt_regs *);
+extern void process_hvlpevents(void);
extern void setup_hvlpevent_queue(void);
#endif /* _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H */
void (*show_percpuinfo)(struct seq_file *m, int i);
void (*init_IRQ)(void);
- unsigned int (*get_irq)(struct pt_regs *);
+ unsigned int (*get_irq)(void);
#ifdef CONFIG_KEXEC
void (*kexec_cpu_down)(int crash_shutdown, int secondary);
#endif
void smp_mpic_message_pass(int target, int msg);
/* Fetch interrupt from a given mpic */
-extern unsigned int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs);
+extern unsigned int mpic_get_one_irq(struct mpic *mpic);
/* This one gets to the primary mpic */
-extern unsigned int mpic_get_irq(struct pt_regs *regs);
+extern unsigned int mpic_get_irq(void);
/* Set the EPIC clock ratio */
void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio);
/*
* An mtfsf instruction with the L bit set. On CPUs that support this a
- * full 64bits of FPSCR is restored and on other CPUs it is ignored.
+ * full 64bits of FPSCR is restored and on other CPUs the L bit is ignored.
*
* Until binutils gets the new form of mtfsf, hardwire the instruction.
*/
static int doing_vdma;
static struct fd_dma_ops *fd_ops;
-static irqreturn_t floppy_hardint(int irq, void *dev_id, struct pt_regs * regs)
+static irqreturn_t floppy_hardint(int irq, void *dev_id)
{
unsigned char st;
int lcount;
char *lptr;
if (!doing_vdma)
- return floppy_interrupt(irq, dev_id, regs);
+ return floppy_interrupt(irq, dev_id);
st = 1;
virtual_dma_residue += virtual_dma_count;
virtual_dma_count=0;
doing_vdma = 0;
- floppy_interrupt(irq, dev_id, regs);
+ floppy_interrupt(irq, dev_id);
return IRQ_HANDLED;
}
return IRQ_HANDLED;
/* Optional, may be NULL. */
unsigned int (*irq_canonicalize)(unsigned int irq);
void (*init_IRQ)(void);
- int (*get_irq)(struct pt_regs *);
+ int (*get_irq)(void);
/* A general init function, called by ppc_init in init/main.c.
May be NULL. DEPRECATED ! */
extern void openpic_init_nmi_irq(u_int irq);
extern void openpic_set_irq_priority(u_int irq, u_int pri);
extern void openpic_hookup_cascade(u_int irq, char *name,
- int (*cascade_fn)(struct pt_regs *));
+ int (*cascade_fn)(void));
extern u_int openpic_irq(void);
extern void openpic_eoi(void);
extern void openpic_request_IPIs(void);
extern void do_openpic_setup_cpu(void);
-extern int openpic_get_irq(struct pt_regs *regs);
+extern int openpic_get_irq(void);
extern void openpic_reset_processor_phys(u_int cpumask);
extern void openpic_setup_ISU(int isu_num, unsigned long addr);
extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask);
extern void openpic2_init_nmi_irq(u_int irq);
extern u_int openpic2_irq(void);
extern void openpic2_eoi(void);
-extern int openpic2_get_irq(struct pt_regs *regs);
+extern int openpic2_get_irq(void);
extern void openpic2_setup_ISU(int isu_num, unsigned long addr);
#endif /* _PPC_KERNEL_OPEN_PIC_H */
extern void smp_send_tlb_invalidate(int);
extern void smp_send_xmon_break(int cpu);
struct pt_regs;
-extern void smp_message_recv(int, struct pt_regs *);
+extern void smp_message_recv(int);
extern int __cpu_disable(void);
extern void __cpu_die(unsigned int cpu);
}
/* Our low-level entry point in arch/sparc/kernel/entry.S */
-irqreturn_t floppy_hardint(int irq, void *unused, struct pt_regs *regs);
+irqreturn_t floppy_hardint(int irq, void *unused);
static int sun_fd_request_irq(void)
{
BTFIXUP_CALL(load_profile_irq)(cpu, limit);
}
-extern void (*sparc_init_timers)(irqreturn_t (*lvl10_irq)(int, void *, struct pt_regs *));
-extern void claim_ticker14(irqreturn_t (*irq_handler)(int, void *, struct pt_regs *),
+extern void (*sparc_init_timers)(irqreturn_t (*lvl10_irq)(int, void *));
+extern void claim_ticker14(irqreturn_t (*irq_handler)(int, void *),
int irq,
unsigned int timeout);
#define set_irq_udt(cpu) BTFIXUP_CALL(set_irq_udt)(cpu)
#endif
-extern int request_fast_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *), unsigned long flags, __const__ char *devname);
+extern int request_fast_irq(unsigned int irq, irqreturn_t (*handler)(int, void *), unsigned long flags, __const__ char *devname);
/* On the sun4m, just like the timers, we have both per-cpu and master
* interrupt registers.
--- /dev/null
+#include <asm-generic/irq_regs.h>
: /* no outputs */
: "r" (lp)
: "g2", "g4", "memory", "cc");
+ *(volatile __u32 *)&lp->lock = ~0U;
}
static inline int __raw_write_trylock(raw_rwlock_t *rw)
val = rw->lock & ~0xff;
if (val)
((volatile u8*)&rw->lock)[3] = 0;
+ else
+ *(volatile u32*)&rw->lock = ~0U;
}
return (val == 0);
}
+static inline int __read_trylock(raw_rwlock_t *rw)
+{
+ register raw_rwlock_t *lp asm("g1");
+ register int res asm("o0");
+ lp = rw;
+ __asm__ __volatile__(
+ "mov %%o7, %%g4\n\t"
+ "call ___rw_read_try\n\t"
+ " ldstub [%%g1 + 3], %%g2\n"
+ : "=r" (res)
+ : "r" (lp)
+ : "g2", "g4", "memory", "cc");
+ return res;
+}
+
+#define __raw_read_trylock(lock) \
+({ unsigned long flags; \
+ int res; \
+ local_irq_save(flags); \
+ res = __read_trylock(lock); \
+ local_irq_restore(flags); \
+ res; \
+})
+
#define __raw_write_unlock(rw) do { (rw)->lock = 0; } while(0)
#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
-#define __raw_read_trylock(lock) generic__raw_read_trylock(lock)
#define _raw_spin_relax(lock) cpu_relax()
#define _raw_read_relax(lock) cpu_relax()
pdma_areasize = pdma_size;
}
-irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie, struct pt_regs *regs)
+irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie)
{
if (likely(doing_pdma)) {
void __iomem *stat = (void __iomem *) fdc_status;
}
main_interrupt:
- return floppy_interrupt(irq, dev_cookie, regs);
+ return floppy_interrupt(irq, dev_cookie);
}
static int sun_fd_request_irq(void)
static struct sun_pci_dma_op sun_pci_dma_current = { -1U, 0, 0, NULL};
static struct sun_pci_dma_op sun_pci_dma_pending = { -1U, 0, 0, NULL};
-extern irqreturn_t floppy_interrupt(int irq, void *dev_id, struct pt_regs *regs);
+extern irqreturn_t floppy_interrupt(int irq, void *dev_id);
static unsigned char sun_pci_fd_inb(unsigned long port)
{
void sun_pci_fd_dma_callback(struct ebus_dma_info *p, int event, void *cookie)
{
- floppy_interrupt(0, NULL, NULL);
+ floppy_interrupt(0, NULL);
}
/*
--- /dev/null
+#include <asm-generic/irq_regs.h>
u32 int_dest_mode;
int (*apic_id_registered)(void);
cpumask_t (*target_cpus)(void);
+ cpumask_t (*vector_allocation_domain)(int cpu);
void (*init_apic_ldr)(void);
/* ipi */
void (*send_IPI_mask)(cpumask_t mask, int vector);
#ifndef __ASSEMBLY__
-extern unsigned int irq_vector[NR_IRQ_VECTORS];
typedef int vector_irq_t[NR_VECTORS];
DECLARE_PER_CPU(vector_irq_t, vector_irq);
-#define IO_APIC_VECTOR(irq) (irq_vector[irq])
/*
* Various low-level irq details needed by irq.c, process.c,
#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
#define INT_DEST_MODE (genapic->int_dest_mode)
#define TARGET_CPUS (genapic->target_cpus())
+#define vector_allocation_domain (genapic->vector_allocation_domain)
#define apic_id_registered (genapic->apic_id_registered)
#define init_apic_ldr (genapic->init_apic_ldr)
#define send_IPI_mask (genapic->send_IPI_mask)
#ifndef _LINUX_IO_H
#define _LINUX_IO_H
+#include <linux/types.h>
#include <asm/io.h>
#include <asm/page.h>
#include <linux/wait.h>
#include <linux/delay.h>
#include <linux/pci.h>
+#include <linux/scatterlist.h>
/* Host registers (relative to pci base address): */
enum {
};
ssize_t vfs_getxattr(struct dentry *, char *, void *, size_t);
+ssize_t vfs_listxattr(struct dentry *d, char *list, size_t size);
int vfs_setxattr(struct dentry *, char *, void *, size_t, int);
int vfs_removexattr(struct dentry *, char *);
error = freeze_processes();
if (error) {
thaw_processes();
+ enable_nonboot_cpus();
error = -EBUSY;
}
}
- enable_nonboot_cpus();
up(&pm_sem);
if (!error)
data->frozen = 1;
{
struct kmem_list3 *ptr;
- BUG_ON(cachep->nodelists[nodeid] != list);
ptr = kmalloc_node(sizeof(struct kmem_list3), GFP_KERNEL, nodeid);
BUG_ON(!ptr);
adev->flags |= DMA_ACTIVE;
dma_interrupt = vidc_audio_dma_interrupt;
- vidc_sound_dma_irq(0, NULL, NULL);
+ vidc_sound_dma_irq(0, NULL);
iomd_writeb(DMA_CR_E | 0x10, IOMD_SD0CR);
local_irq_restore(flags);
#include <sound/core.h>
#include "pdaudiocf.h"
#include <sound/initval.h>
+#include <asm/irq_regs.h>
/*
*
git.openpandora.org / pandora-kernel.git / commitdiff