bnx2x: Combine get_pcie_width and get_pcie_speed

The functions bnx2x_get_pcie_width() and bnx2x_get_pcie_speed() were
combined into bnx2x_get_pcie_width_speed() so that there is only
1 PCI read to PCICFG_OFFSET + PCICFG_LINK_CONTROL rather then 2 reads.

Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index c289670..807c156 100644 (file)
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -11671,31 +11671,26 @@ err_out:
        return rc;
 }
 
-static int __devinit bnx2x_get_pcie_width(struct bnx2x *bp)
+static void __devinit bnx2x_get_pcie_width_speed(struct bnx2x *bp,
+                                                int *width, int *speed)
 {
        u32 val = REG_RD(bp, PCICFG_OFFSET + PCICFG_LINK_CONTROL);
 
-       val = (val & PCICFG_LINK_WIDTH) >> PCICFG_LINK_WIDTH_SHIFT;
-       return val;
-}
-
-/* return value of 1=2.5GHz 2=5GHz */
-static int __devinit bnx2x_get_pcie_speed(struct bnx2x *bp)
-{
-       u32 val = REG_RD(bp, PCICFG_OFFSET + PCICFG_LINK_CONTROL);
+       *width = (val & PCICFG_LINK_WIDTH) >> PCICFG_LINK_WIDTH_SHIFT;
 
-       val = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT;
-       return val;
+       /* return value of 1=2.5GHz 2=5GHz */
+       *speed = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT;
 }
+
 static int __devinit bnx2x_check_firmware(struct bnx2x *bp)
 {
+       const struct firmware *firmware = bp->firmware;
        struct bnx2x_fw_file_hdr *fw_hdr;
        struct bnx2x_fw_file_section *sections;
-       u16 *ops_offsets;
        u32 offset, len, num_ops;
+       u16 *ops_offsets;
        int i;
-       const struct firmware *firmware = bp->firmware;
-       const u8 * fw_ver;
+       const u8 *fw_ver;
 
        if (firmware->size < sizeof(struct bnx2x_fw_file_hdr))
                return -EINVAL;
@@ -11709,7 +11704,8 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp)
                offset = be32_to_cpu(sections[i].offset);
                len = be32_to_cpu(sections[i].len);
                if (offset + len > firmware->size) {
-                       printk(KERN_ERR PFX "Section %d length is out of bounds\n", i);
+                       printk(KERN_ERR PFX "Section %d length is out of "
+                                           "bounds\n", i);
                        return -EINVAL;
                }
        }
@@ -11721,7 +11717,8 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp)
 
        for (i = 0; i < be32_to_cpu(fw_hdr->init_ops_offsets.len) / 2; i++) {
                if (be16_to_cpu(ops_offsets[i]) > num_ops) {
-                       printk(KERN_ERR PFX "Section offset %d is out of bounds\n", i);
+                       printk(KERN_ERR PFX "Section offset %d is out of "
+                                           "bounds\n", i);
                        return -EINVAL;
                }
        }
@@ -11878,6 +11875,7 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
        static int version_printed;
        struct net_device *dev = NULL;
        struct bnx2x *bp;
+       int pcie_width, pcie_speed;
        int rc;
 
        if (version_printed++ == 0)
@@ -11918,11 +11916,11 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
                goto init_one_exit;
        }
 
+       bnx2x_get_pcie_width_speed(bp, &pcie_width, &pcie_speed);
        printk(KERN_INFO "%s: %s (%c%d) PCI-E x%d %s found at mem %lx,"
               " IRQ %d, ", dev->name, board_info[ent->driver_data].name,
               (CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4),
-              bnx2x_get_pcie_width(bp),
-              (bnx2x_get_pcie_speed(bp) == 2) ? "5GHz (Gen2)" : "2.5GHz",
+              pcie_width, (pcie_speed == 2) ? "5GHz (Gen2)" : "2.5GHz",
               dev->base_addr, bp->pdev->irq);
        printk(KERN_CONT "node addr %pM\n", dev->dev_addr);