ath9k: Updates for AR9287_12 version of chipset.

Enable AsyncFIFO and AGGWEP for AR9287_12 and later revisions only.

Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 9a139dc..df62113 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -2392,7 +2392,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
        if (AR_SREV_9280_10_OR_LATER(ah))
                REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE);
 
-       if (AR_SREV_9287_10_OR_LATER(ah)) {
+       if (AR_SREV_9287_12_OR_LATER(ah)) {
                /* Enable ASYNC FIFO */
                REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3,
                                AR_MAC_PCU_ASYNC_FIFO_REG3_DATAPATH_SEL);
@@ -2478,7 +2478,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
 
        ath9k_hw_init_user_settings(ah);
 
-       if (AR_SREV_9287_10_OR_LATER(ah)) {
+       if (AR_SREV_9287_12_OR_LATER(ah)) {
                REG_WRITE(ah, AR_D_GBL_IFS_SIFS,
                          AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR);
                REG_WRITE(ah, AR_D_GBL_IFS_SLOT,
@@ -2494,7 +2494,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
                REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN,
                              AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL);
        }
-       if (AR_SREV_9287_10_OR_LATER(ah)) {
+       if (AR_SREV_9287_12_OR_LATER(ah)) {
                REG_SET_BIT(ah, AR_PCU_MISC_MODE2,
                                AR_PCU_MISC_MODE2_ENABLE_AGGWEP);
        }

diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 13fd658..c9e1ac9 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -744,6 +744,7 @@
 #define AR_SREV_VERSION_9287                  0x180
 #define AR_SREV_REVISION_9287_10              0
 #define AR_SREV_REVISION_9287_11              1
+#define AR_SREV_REVISION_9287_12              2
 #define AR_SREV_VERSION_9271                   0x140
 #define AR_SREV_REVISION_9271_10               0
 #define AR_SREV_REVISION_9271_11               1
@@ -817,7 +818,13 @@
        (((_ah)->hw_version.macVersion > AR_SREV_VERSION_9287) || \
         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287) && \
          ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9287_11)))
-
+#define AR_SREV_9287_12(_ah) \
+       (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287) && \
+        ((_ah)->hw_version.macRev == AR_SREV_REVISION_9287_12))
+#define AR_SREV_9287_12_OR_LATER(_ah) \
+       (((_ah)->hw_version.macVersion > AR_SREV_VERSION_9287) || \
+        (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287) && \
+         ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9287_12)))
 #define AR_SREV_9271(_ah) \
     (((_ah))->hw_version.macVersion == AR_SREV_VERSION_9271)
 #define AR_SREV_9271_10(_ah) \