enic: Always use single transmit and single receive hardware queues per device
authorVasanthy Kolluri <vkolluri@cisco.com>
Thu, 17 Feb 2011 13:57:19 +0000 (13:57 +0000)
committerDavid S. Miller <davem@davemloft.net>
Fri, 18 Feb 2011 00:13:31 +0000 (16:13 -0800)
We believe that our earlier patch for supporting multiple hardware
receive queues per enic device requires more internal testing. At this
point, we think that it's best to disable the use of multiple receive
queues. The current patch provides an effective means for the same.

Also, we continue to disallow multiple hardware transmit queues per
device. But change the way we enforce this in order to maintain
consistency with the way receive queues are handled.

Signed-off-by: Christian Benvenuti <benve@cisco.com>
Signed-off-by: Danny Guo <dannguo@cisco.com>
Signed-off-by: Vasanthy Kolluri <vkolluri@cisco.com>
Signed-off-by: Roopa Prabhu <roprabhu@cisco.com>
Signed-off-by: David Wang <dwang2@cisco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/enic/enic.h
drivers/net/enic/enic_main.c

index 2ac891b..aee5256 100644 (file)
 
 #define DRV_NAME               "enic"
 #define DRV_DESCRIPTION                "Cisco VIC Ethernet NIC Driver"
-#define DRV_VERSION            "2.1.1.8"
+#define DRV_VERSION            "2.1.1.9"
 #define DRV_COPYRIGHT          "Copyright 2008-2011 Cisco Systems, Inc"
 
 #define ENIC_BARS_MAX          6
 
-#define ENIC_WQ_MAX            8
-#define ENIC_RQ_MAX            8
+#define ENIC_WQ_MAX            1
+#define ENIC_RQ_MAX            1
 #define ENIC_CQ_MAX            (ENIC_WQ_MAX + ENIC_RQ_MAX)
 #define ENIC_INTR_MAX          (ENIC_CQ_MAX + 2)
 
index d1aa807..4f1710e 100644 (file)
@@ -2080,7 +2080,7 @@ static void enic_reset(struct work_struct *work)
 static int enic_set_intr_mode(struct enic *enic)
 {
        unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
-       unsigned int m = 1;
+       unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
        unsigned int i;
 
        /* Set interrupt mode (INTx, MSI, MSI-X) depending