omap4: clockdomain: Fix the CPUx domain name

The register naming convention for clock domain control inside
power domain instance is:
OMAPXXXX_<partition>_<power_domain>_<clock_domain>_CDOFFS

Both CPU0 and CPU1 use MPU as clock domain name instead of CPU0
and CPU1.

Change the name to stick to the convention.
The autogen scripts are updated accordingly.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 10622c9..3d1c06b 100644 (file)
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -150,7 +150,7 @@ static struct clockdomain mpu0_44xx_clkdm = {
        .pwrdm            = { .name = "cpu0_pwrdm" },
        .prcm_partition   = OMAP4430_PRCM_MPU_PARTITION,
        .cm_inst          = OMAP4430_PRCM_MPU_CPU0_INST,
-       .clkdm_offs       = OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS,
+       .clkdm_offs       = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS,
        .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
@@ -160,7 +160,7 @@ static struct clockdomain mpu1_44xx_clkdm = {
        .pwrdm            = { .name = "cpu1_pwrdm" },
        .prcm_partition   = OMAP4430_PRCM_MPU_PARTITION,
        .cm_inst          = OMAP4430_PRCM_MPU_CPU1_INST,
-       .clkdm_offs       = OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS,
+       .clkdm_offs       = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS,
        .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };

diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
index 3300ff6..d22d1b4 100644 (file)
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
@@ -38,8 +38,8 @@
 #define OMAP4430_PRCM_MPU_CPU1_INST            0x0800
 
 /* PRCM_MPU clockdomain register offsets (from instance start) */
-#define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS      0x0018
-#define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS      0x0018
+#define OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS     0x0018
+#define OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS     0x0018
 
 
 /*