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f7db7e5)
There are some chips (like TI WL12xx series) that can be interfaced
over SDIO but don't support the SDIO specification, meaning that they
are missing CIA (Common I/O Area) with all it's registers. Current
Linux SDIO implementation relies on those registers to identify and
configure the card, so non-standard cards can not function and cause
lots of warning from the core when it reads invalid data from
non-existent registers.
After this patch, init_card() host callback can now set new quirk
MMC_QUIRK_NONSTD_SDIO, which means that SDIO core should not try to
access any standard SDIO registers and rely on init_card() to fill all
SDIO structures instead. As those cards are usually embedded chips,
all the required information can be obtained from machine board files
by the host driver when it's called through init_card() callback.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
- ret = sdio_read_fbr(func);
- if (ret)
- goto fail;
+ if (!(card->quirks & MMC_QUIRK_NONSTD_SDIO)) {
+ ret = sdio_read_fbr(func);
+ if (ret)
+ goto fail;
- ret = sdio_read_func_cis(func);
- if (ret)
- goto fail;
+ ret = sdio_read_func_cis(func);
+ if (ret)
+ goto fail;
+ } else {
+ func->vendor = func->card->cis.vendor;
+ func->device = func->card->cis.device;
+ func->max_blksize = func->card->cis.blksize;
+ }
card->sdio_func[fn - 1] = func;
card->sdio_func[fn - 1] = func;
+ if (card->quirks & MMC_QUIRK_NONSTD_SDIO) {
+ /*
+ * This is non-standard non-removable SDIO device,
+ * meaning it doesn't have any CIA (Common I/O area)
+ * registers present. It's host's responsibility to fill
+ * cccr and cis structures in init_card().
+ */
+ mmc_set_clock(host, card->cis.max_dtr);
+
+ if (card->cccr.high_speed) {
+ mmc_card_set_highspeed(card);
+ mmc_set_timing(card->host, MMC_TIMING_SD_HS);
+ }
+
+ goto finish;
+ }
+
/*
* Read the common registers.
*/
/*
* Read the common registers.
*/
if (!oldcard)
host->card = card;
return 0;
if (!oldcard)
host->card = card;
return 0;
#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
/* for byte mode */
#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
/* for byte mode */
+#define MMC_QUIRK_NONSTD_SDIO (1<<2) /* non-standard SDIO card attached */
+ /* (missing CIA registers) */
u32 raw_cid[4]; /* raw card CID */
u32 raw_csd[4]; /* raw card CSD */
u32 raw_cid[4]; /* raw card CID */
u32 raw_csd[4]; /* raw card CSD */