ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP
authorNishanth Menon <nm@ti.com>
Wed, 29 Feb 2012 22:33:39 +0000 (23:33 +0100)
committerGrazvydas Ignotas <notasas@gmail.com>
Sun, 15 May 2016 12:43:21 +0000 (15:43 +0300)
commitfc7f2f3df65eb7f24e9760749158ef847d1aceec
tree930fad7f4e7fb32102fbf874317186b0984ca214
parenta3b1c9c25b30ca4102c6a37f1454ebed03319d0d
ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP

SmartReflex AVS Errorgen module supplies signals to Voltage
Processor. It is suggested that by disabling Errorgen module
before we disable VP, we might be able to ensure lesser
chances of race condition to occur in the system.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
arch/arm/mach-omap2/smartreflex-class3.c
arch/arm/mach-omap2/smartreflex.c
arch/arm/mach-omap2/smartreflex.h