OMAP3: PRCM interrupt: only check and clear enabled PRCM IRQs
authorKevin Hilman <khilman@deeprootsystems.com>
Mon, 26 Apr 2010 21:59:09 +0000 (14:59 -0700)
committerKevin Hilman <khilman@deeprootsystems.com>
Wed, 12 May 2010 16:38:59 +0000 (09:38 -0700)
commitd6290a3ead555c0b092d48288b4dc0566580e17f
treeaa0f99e67f6c3fa5432db1cf47cf62566adae585
parentb57f95a38233a2e73b679bea4a5453a1cc2a1cc9
OMAP3: PRCM interrupt: only check and clear enabled PRCM IRQs

While handling PRCM IRQs, mask out interrupts that are not enabled in
PRM_IRQENABLE_MPU.  If these are not masked out, non-enabled
interrupts are caught, a WARN() is printed due to no 'handler' and the
events are cleared.  In addition to being noisy, this can also
interfere with independent polling of this register by SR/VP code.

This was noticed using SmartReflex transitions which cause the VPx_*
interrupts to be handled since they are set in PRM_IRQSTATUS_MPU even
but not enabled in PRM_IRQENABLE_MPU.

Acked-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
arch/arm/mach-omap2/pm34xx.c