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[SERIAL] 8250: set divisor register correctly for AMD Alchemy SoC uart
authorJon Anders Haugum <jonah@omegav.ntnu.no>
Sun, 30 Apr 2006 10:20:56 +0000 (11:20 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 30 Apr 2006 10:20:56 +0000 (11:20 +0100)
commitb32b19b8ffc05cbd3bf91c65e205f6a912ca15d9
treecaadb31badac0101bde68eefc0cf8c89c55bb72btree | snapshot
parent85835f442e5bbf9d3b8f6e574751da8db77016d2commit | diff
[SERIAL] 8250: set divisor register correctly for AMD Alchemy SoC uart

Alchemy SoC uart have got a non-standard divisor register that needs some
special handling.

This patch adds divisor read/write functions with test and special
handling for Alchemy internal uart.

Signed-off-by: Jon Anders Haugum <jonah@omegav.ntnu.no>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
drivers/serial/8250.c diff | blob | history
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