AT91: pm: make sure that r0 is 0 when dealing with cache operations
authorNicolas Ferre <nicolas.ferre@atmel.com>
Fri, 22 Oct 2010 16:55:39 +0000 (18:55 +0200)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Tue, 26 Oct 2010 09:32:48 +0000 (11:32 +0200)
commita2a571b74a3881963d8d09deb272d13afe5b49e3
tree491cf5ff56293287906f9cfec785345f24cd2180
parent8aeeda822fbfe7da2d4ea391a9757e9532796598
AT91: pm: make sure that r0 is 0 when dealing with cache operations

When using CP15 cache operations (c7), we make sure that Rd (r0)
is actually 0 as ARM 926 TRM is saying.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/mach-at91/pm.c
arch/arm/mach-at91/pm.h
arch/arm/mach-at91/pm_slowclock.S