m68knommu: clean up ColdFire cache control code
authorGreg Ungerer <gerg@uclinux.org>
Tue, 9 Nov 2010 03:35:55 +0000 (13:35 +1000)
committerGreg Ungerer <gerg@uclinux.org>
Wed, 5 Jan 2011 05:19:18 +0000 (15:19 +1000)
commit8ce877a8eb8293b5b2c07f259d694026b0f519e4
treed478523ee8bec4ecc638c9f9a35816fc12aaa37f
parent3d461401eb5e3a8c471e92500aebd6c115273fba
m68knommu: clean up ColdFire cache control code

The cache control code for the ColdFire CPU's is a big ugly mess
of "#ifdef"ery liberally coated with bit constants. Clean it up.

The cache controllers in the various ColdFire parts are actually quite
similar. Just differing in some bit flags and options supported. Using
the header defines now in place it is pretty easy to factor out the
small differences and use common setup and flush/invalidate code.

I have preserved the cache setups as they where in the old code
(except where obviously wrong - like in the case of the 5249). Following
from this it should be easy now to extend the possible setups used on
the CACHE controllers that support split cacheing or copy-back or
write through options.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
arch/m68k/include/asm/cacheflush_no.h
arch/m68k/include/asm/m52xxacr.h
arch/m68k/include/asm/m53xxacr.h
arch/m68k/include/asm/m54xxacr.h
arch/m68k/include/asm/mcfcache.h [deleted file]
arch/m68knommu/platform/coldfire/head.S