perf, x86: Fix AMD family 15h FPU event constraints
authorRobert Richter <robert.richter@amd.com>
Sat, 16 Apr 2011 00:27:54 +0000 (02:27 +0200)
committerIngo Molnar <mingo@elte.hu>
Tue, 19 Apr 2011 08:07:55 +0000 (10:07 +0200)
commit855357a21744e488cbee23a47d2b124035160a87
tree830070fa031206ec1dbcc2a874abf06de649bbe3
parent83112e688f5f05dea1e63787db9a6c16b2887a1d
perf, x86: Fix AMD family 15h FPU event constraints

Depending on the unit mask settings some FPU events may be scheduled
only on cpu counter #3. This patch fixes this.

Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@googlemail.com>
Link: http://lkml.kernel.org/r/1302913676-14352-3-git-send-email-robert.richter@amd.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/kernel/cpu/perf_event_amd.c