drm/i915: apply timing generator bug workaround on CPT and PPT
authorJesse Barnes <jbarnes@virtuousgeek.org>
Wed, 27 Jul 2011 18:51:40 +0000 (11:51 -0700)
committerKeith Packard <keithp@keithp.com>
Thu, 28 Jul 2011 23:28:21 +0000 (16:28 -0700)
commit3bcf603f6d5d18bd9d076dc280de71f48add4101
tree6d1ed198fd759d3e7aeccd32bc8b5059785da26a
parent120eced9efe7fdb5123db4ea47e9adee9b66284e
drm/i915: apply timing generator bug workaround on CPT and PPT

On CougarPoint and PantherPoint PCH chips, the timing generator may fail
to start after DP training completes.  This is due to a bug in the
FDI autotraining detect logic (which will stall the timing generator and
re-enable it once training completes), so disable it to avoid silent DP
mode setting failures.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c