perf/x86/intel: Avoid checkpointed counters causing excessive TSX aborts
authorAndi Kleen <ak@linux.intel.com>
Fri, 6 Sep 2013 03:37:38 +0000 (20:37 -0700)
committerIngo Molnar <mingo@kernel.org>
Thu, 12 Sep 2013 17:13:33 +0000 (19:13 +0200)
commit2dbf0116aa8c7bfa900352d3f7b2609748fcc1c5
tree099ff14e2a9a5753d477520d1c04b2a19f153689
parent06c939c1f41b1c28bb17fae074ad610e22a01db8
perf/x86/intel: Avoid checkpointed counters causing excessive TSX aborts

With checkpointed counters there can be a situation where the counter
is overflowing, aborts the transaction, is set back to a non overflowing
checkpoint, causes interupt. The interrupt doesn't see the overflow
because it has been checkpointed.  This is then a spurious PMI, typically with
a ugly NMI message.  It can also lead to excessive aborts.

Avoid this problem by:

- Using the full counter width for counting counters (earlier patch)

- Forbid sampling for checkpointed counters. It's not too useful anyways,
  checkpointing is mainly for counting. The check is approximate
  (to still handle KVM), but should catch the majority of cases.

- On a PMI always set back checkpointed counters to zero.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1378438661-24765-2-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel.c