drm/radeon: fix up pll selection on DCE5/6
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 17 Jul 2012 18:02:43 +0000 (14:02 -0400)
committerChristian König <deathsimple@vodafone.de>
Wed, 18 Jul 2012 11:53:42 +0000 (13:53 +0200)
commit26fe45a0a76f165425f332a5aaa298f149f9db22
treed618cfce76f9c06298976d988a65efbe0179e840
parent377edc8bbd34f177d4ad7113ef70b76ed278fa94
drm/radeon: fix up pll selection on DCE5/6

Selecting ATOM_PPLL_INVALID should be equivalent as the
DCPLL or PPLL0 are already programmed for the DISPCLK, but
the preferred method is to always specify the PLL selected.
SetPixelClock will check the parameters and skip the
programming if the PLL is already set up.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
drivers/gpu/drm/radeon/atombios_crtc.c