powerpc/476: Workaround for PLB6 hang
authorDave Kleikamp <shaggy@linux.vnet.ibm.com>
Wed, 26 Jan 2011 06:17:59 +0000 (06:17 +0000)
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>
Wed, 2 Feb 2011 11:59:02 +0000 (06:59 -0500)
commit21a06b0459f5e3ecdeccacfbf076c229514c1840
tree2910d16ee073ab722e65eae7373519e64dc5179d
parentc48d0dbaac7f27c083430170c66194d6a523bc2a
powerpc/476: Workaround for PLB6 hang

The 476FP core may hang if an instruction fetch happens during an msync
following a tlbsync.  This workaround makes sure that enough instruction
cache lines are pre-fetched before executing the msync.  (sync and msync
are the same to the compiler.)

Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
arch/powerpc/mm/tlb_nohash_low.S