X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?p=pandora-kernel.git;a=blobdiff_plain;f=drivers%2Fvideo%2Fcg3.c;h=f042428a84f4485214a5ca1d95c38001bf0d9e8a;hp=3de6e1b5ab2f4008efd29b32805c9e3bd874dec1;hb=c58b8e4a25a1ba347a0e5d21984c97bd296f1691;hpb=f1dccedc8148026d9071c6805f7cb77374a9e56f diff --git a/drivers/video/cg3.c b/drivers/video/cg3.c index 3de6e1b5ab2f..f042428a84f4 100644 --- a/drivers/video/cg3.c +++ b/drivers/video/cg3.c @@ -1,6 +1,6 @@ /* cg3.c: CGTHREE frame buffer driver * - * Copyright (C) 2003 David S. Miller (davem@redhat.com) + * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net) * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) @@ -19,8 +19,9 @@ #include #include -#include #include +#include +#include #include #include "sbuslib.h" @@ -80,30 +81,30 @@ enum cg3_type { }; struct bt_regs { - volatile u32 addr; - volatile u32 color_map; - volatile u32 control; - volatile u32 cursor; + u32 addr; + u32 color_map; + u32 control; + u32 cursor; }; struct cg3_regs { struct bt_regs cmap; - volatile u8 control; - volatile u8 status; - volatile u8 cursor_start; - volatile u8 cursor_end; - volatile u8 h_blank_start; - volatile u8 h_blank_end; - volatile u8 h_sync_start; - volatile u8 h_sync_end; - volatile u8 comp_sync_end; - volatile u8 v_blank_start_high; - volatile u8 v_blank_start_low; - volatile u8 v_blank_end; - volatile u8 v_sync_start; - volatile u8 v_sync_end; - volatile u8 xfer_holdoff_start; - volatile u8 xfer_holdoff_end; + u8 control; + u8 status; + u8 cursor_start; + u8 cursor_end; + u8 h_blank_start; + u8 h_blank_end; + u8 h_sync_start; + u8 h_sync_end; + u8 comp_sync_end; + u8 v_blank_start_high; + u8 v_blank_start_low; + u8 v_blank_end; + u8 v_sync_start; + u8 v_sync_end; + u8 xfer_holdoff_start; + u8 xfer_holdoff_end; }; /* Offset of interesting structures in the OBIO space */ @@ -120,9 +121,8 @@ struct cg3_par { #define CG3_FLAG_RDI 0x00000002 unsigned long physbase; + unsigned long which_io; unsigned long fbsize; - - struct sbus_dev *sdev; }; /** @@ -186,8 +186,7 @@ static int cg3_setcolreg(unsigned regno, * @blank_mode: the blank mode we want. * @info: frame buffer structure that represents a single frame buffer */ -static int -cg3_blank(int blank, struct fb_info *info) +static int cg3_blank(int blank, struct fb_info *info) { struct cg3_par *par = (struct cg3_par *) info->par; struct cg3_regs __iomem *regs = par->regs; @@ -235,7 +234,7 @@ static int cg3_mmap(struct fb_info *info, struct vm_area_struct *vma) return sbusfb_mmap_helper(cg3_mmap_map, par->physbase, par->fbsize, - par->sdev->reg_addrs[0].which_io, + par->which_io, vma); } @@ -251,12 +250,10 @@ static int cg3_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) * Initialisation */ -static void -cg3_init_fix(struct fb_info *info, int linebytes) +static void __devinit cg3_init_fix(struct fb_info *info, int linebytes, + struct device_node *dp) { - struct cg3_par *par = (struct cg3_par *)info->par; - - strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id)); + strlcpy(info->fix.id, dp->name, sizeof(info->fix.id)); info->fix.type = FB_TYPE_PACKED_PIXELS; info->fix.visual = FB_VISUAL_PSEUDOCOLOR; @@ -266,17 +263,16 @@ cg3_init_fix(struct fb_info *info, int linebytes) info->fix.accel = FB_ACCEL_SUN_CGTHREE; } -static void cg3_rdi_maybe_fixup_var(struct fb_var_screeninfo *var, - struct sbus_dev *sdev) +static void __devinit cg3_rdi_maybe_fixup_var(struct fb_var_screeninfo *var, + struct device_node *dp) { - char buffer[40]; + const char *params; char *p; int ww, hh; - *buffer = 0; - prom_getstring(sdev->prom_node, "params", buffer, sizeof(buffer)); - if (*buffer) { - ww = simple_strtoul(buffer, &p, 10); + params = of_get_property(dp, "params", NULL); + if (params) { + ww = simple_strtoul(params, &p, 10); if (ww && *p == 'x') { hh = simple_strtoul(p + 1, &p, 10); if (hh && *p == '-') { @@ -290,36 +286,36 @@ static void cg3_rdi_maybe_fixup_var(struct fb_var_screeninfo *var, } } -static u8 cg3regvals_66hz[] __initdata = { /* 1152 x 900, 66 Hz */ +static u8 cg3regvals_66hz[] __devinitdata = { /* 1152 x 900, 66 Hz */ 0x14, 0xbb, 0x15, 0x2b, 0x16, 0x04, 0x17, 0x14, 0x18, 0xae, 0x19, 0x03, 0x1a, 0xa8, 0x1b, 0x24, 0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01, 0x10, 0x20, 0 }; -static u8 cg3regvals_76hz[] __initdata = { /* 1152 x 900, 76 Hz */ +static u8 cg3regvals_76hz[] __devinitdata = { /* 1152 x 900, 76 Hz */ 0x14, 0xb7, 0x15, 0x27, 0x16, 0x03, 0x17, 0x0f, 0x18, 0xae, 0x19, 0x03, 0x1a, 0xae, 0x1b, 0x2a, 0x1c, 0x01, 0x1d, 0x09, 0x1e, 0xff, 0x1f, 0x01, 0x10, 0x24, 0 }; -static u8 cg3regvals_rdi[] __initdata = { /* 640 x 480, cgRDI */ +static u8 cg3regvals_rdi[] __devinitdata = { /* 640 x 480, cgRDI */ 0x14, 0x70, 0x15, 0x20, 0x16, 0x08, 0x17, 0x10, 0x18, 0x06, 0x19, 0x02, 0x1a, 0x31, 0x1b, 0x51, 0x1c, 0x06, 0x1d, 0x0c, 0x1e, 0xff, 0x1f, 0x01, 0x10, 0x22, 0 }; -static u8 *cg3_regvals[] __initdata = { +static u8 *cg3_regvals[] __devinitdata = { cg3regvals_66hz, cg3regvals_76hz, cg3regvals_rdi }; -static u_char cg3_dacvals[] __initdata = { +static u_char cg3_dacvals[] __devinitdata = { 4, 0xff, 5, 0x00, 6, 0x70, 7, 0x00, 0 }; -static void cg3_do_default_mode(struct cg3_par *par) +static void __devinit cg3_do_default_mode(struct cg3_par *par) { enum cg3_type type; u8 *p; @@ -348,11 +344,11 @@ static void cg3_do_default_mode(struct cg3_par *par) sbus_writeb(p[1], regp); } for (p = cg3_dacvals; *p; p += 2) { - volatile u8 __iomem *regp; + u8 __iomem *regp; - regp = (volatile u8 __iomem *)&par->regs->cmap.addr; + regp = (u8 __iomem *)&par->regs->cmap.addr; sbus_writeb(p[0], regp); - regp = (volatile u8 __iomem *)&par->regs->cmap.control; + regp = (u8 __iomem *)&par->regs->cmap.control; sbus_writeb(p[1], regp); } } @@ -360,129 +356,142 @@ static void cg3_do_default_mode(struct cg3_par *par) struct all_info { struct fb_info info; struct cg3_par par; - struct list_head list; }; -static LIST_HEAD(cg3_list); -static void cg3_init_one(struct sbus_dev *sdev) +static int __devinit cg3_init_one(struct of_device *op) { + struct device_node *dp = op->node; struct all_info *all; - int linebytes; - - all = kmalloc(sizeof(*all), GFP_KERNEL); - if (!all) { - printk(KERN_ERR "cg3: Cannot allocate memory.\n"); - return; - } - memset(all, 0, sizeof(*all)); + int linebytes, err; - INIT_LIST_HEAD(&all->list); + all = kzalloc(sizeof(*all), GFP_KERNEL); + if (!all) + return -ENOMEM; spin_lock_init(&all->par.lock); - all->par.sdev = sdev; - all->par.physbase = sdev->reg_addrs[0].phys_addr; + all->par.physbase = op->resource[0].start; + all->par.which_io = op->resource[0].flags & IORESOURCE_BITS; - sbusfb_fill_var(&all->info.var, sdev->prom_node, 8); + sbusfb_fill_var(&all->info.var, dp->node, 8); all->info.var.red.length = 8; all->info.var.green.length = 8; all->info.var.blue.length = 8; - if (!strcmp(sdev->prom_name, "cgRDI")) + if (!strcmp(dp->name, "cgRDI")) all->par.flags |= CG3_FLAG_RDI; if (all->par.flags & CG3_FLAG_RDI) - cg3_rdi_maybe_fixup_var(&all->info.var, sdev); + cg3_rdi_maybe_fixup_var(&all->info.var, dp); - linebytes = prom_getintdefault(sdev->prom_node, "linebytes", - all->info.var.xres); + linebytes = of_getintprop_default(dp, "linebytes", + all->info.var.xres); all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); - all->par.regs = sbus_ioremap(&sdev->resource[0], CG3_REGS_OFFSET, - sizeof(struct cg3_regs), "cg3 regs"); + all->par.regs = of_ioremap(&op->resource[0], CG3_REGS_OFFSET, + sizeof(struct cg3_regs), "cg3 regs"); all->info.flags = FBINFO_DEFAULT; all->info.fbops = &cg3_ops; -#ifdef CONFIG_SPARC32 - all->info.screen_base = (char __iomem *) - prom_getintdefault(sdev->prom_node, "address", 0); -#endif - if (!all->info.screen_base) - all->info.screen_base = - sbus_ioremap(&sdev->resource[0], CG3_RAM_OFFSET, - all->par.fbsize, "cg3 ram"); + all->info.screen_base = + of_ioremap(&op->resource[0], CG3_RAM_OFFSET, + all->par.fbsize, "cg3 ram"); all->info.par = &all->par; cg3_blank(0, &all->info); - if (!prom_getbool(sdev->prom_node, "width")) + if (!of_find_property(dp, "width", NULL)) cg3_do_default_mode(&all->par); if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { - printk(KERN_ERR "cg3: Could not allocate color map.\n"); + of_iounmap(&op->resource[0], + all->par.regs, sizeof(struct cg3_regs)); + of_iounmap(&op->resource[0], + all->info.screen_base, all->par.fbsize); kfree(all); - return; + return -ENOMEM; } fb_set_cmap(&all->info.cmap, &all->info); - cg3_init_fix(&all->info, linebytes); + cg3_init_fix(&all->info, linebytes, dp); - if (register_framebuffer(&all->info) < 0) { - printk(KERN_ERR "cg3: Could not register framebuffer.\n"); + err = register_framebuffer(&all->info); + if (err < 0) { fb_dealloc_cmap(&all->info.cmap); + of_iounmap(&op->resource[0], + all->par.regs, sizeof(struct cg3_regs)); + of_iounmap(&op->resource[0], + all->info.screen_base, all->par.fbsize); kfree(all); - return; + return err; } - list_add(&all->list, &cg3_list); + dev_set_drvdata(&op->dev, all); + + printk("%s: cg3 at %lx:%lx\n", + dp->full_name, all->par.which_io, all->par.physbase); - printk("cg3: %s at %lx:%lx\n", - sdev->prom_name, - (long) sdev->reg_addrs[0].which_io, - (long) sdev->reg_addrs[0].phys_addr); + return 0; } -int __init cg3_init(void) +static int __devinit cg3_probe(struct of_device *dev, + const struct of_device_id *match) { - struct sbus_bus *sbus; - struct sbus_dev *sdev; + struct of_device *op = to_of_device(&dev->dev); - if (fb_get_options("cg3fb", NULL)) - return -ENODEV; + return cg3_init_one(op); +} - for_all_sbusdev(sdev, sbus) { - if (!strcmp(sdev->prom_name, "cgthree") || - !strcmp(sdev->prom_name, "cgRDI")) - cg3_init_one(sdev); - } +static int __devexit cg3_remove(struct of_device *op) +{ + struct all_info *all = dev_get_drvdata(&op->dev); + + unregister_framebuffer(&all->info); + fb_dealloc_cmap(&all->info.cmap); + + of_iounmap(&op->resource[0], all->par.regs, sizeof(struct cg3_regs)); + of_iounmap(&op->resource[0], all->info.screen_base, all->par.fbsize); + + kfree(all); + + dev_set_drvdata(&op->dev, NULL); return 0; } -void __exit cg3_exit(void) -{ - struct list_head *pos, *tmp; +static struct of_device_id cg3_match[] = { + { + .name = "cgthree", + }, + { + .name = "cgRDI", + }, + {}, +}; +MODULE_DEVICE_TABLE(of, cg3_match); - list_for_each_safe(pos, tmp, &cg3_list) { - struct all_info *all = list_entry(pos, typeof(*all), list); +static struct of_platform_driver cg3_driver = { + .name = "cg3", + .match_table = cg3_match, + .probe = cg3_probe, + .remove = __devexit_p(cg3_remove), +}; - unregister_framebuffer(&all->info); - fb_dealloc_cmap(&all->info.cmap); - kfree(all); - } +static int __init cg3_init(void) +{ + if (fb_get_options("cg3fb", NULL)) + return -ENODEV; + + return of_register_driver(&cg3_driver, &of_bus_type); } -int __init -cg3_setup(char *arg) +static void __exit cg3_exit(void) { - /* No cmdline options yet... */ - return 0; + of_unregister_driver(&cg3_driver); } module_init(cg3_init); - -#ifdef MODULE module_exit(cg3_exit); -#endif MODULE_DESCRIPTION("framebuffer driver for CGthree chipsets"); -MODULE_AUTHOR("David S. Miller "); +MODULE_AUTHOR("David S. Miller "); +MODULE_VERSION("2.0"); MODULE_LICENSE("GPL");