X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?p=pandora-kernel.git;a=blobdiff_plain;f=arch%2Fpowerpc%2Fboot%2Fdts%2Flite5200.dts;h=bc45f5fbb0609f924fbb9a92c9211b1cdc0c47e0;hp=e13ac6ef05a93d7744d9e4c121dc90170793f284;hb=0c326331c8b107abc0a160e8899d749150b8f76a;hpb=f4ebc993759dc25dc3db6b6f1a13a23df8264d4b diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts index e13ac6ef05a9..bc45f5fbb060 100644 --- a/arch/powerpc/boot/dts/lite5200.dts +++ b/arch/powerpc/boot/dts/lite5200.dts @@ -19,7 +19,7 @@ / { model = "fsl,lite5200"; // revision = "1.0"; - compatible = "fsl,lite5200\0generic-mpc5200"; + compatible = "fsl,lite5200","generic-mpc5200"; #address-cells = <1>; #size-cells = <1>; @@ -37,7 +37,6 @@ timebase-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader clock-frequency = <0>; // from bootloader - 32-bit; }; }; @@ -49,11 +48,10 @@ soc5200@f0000000 { model = "fsl,mpc5200"; compatible = "mpc5200"; - revision = "" // from bootloader - #interrupt-cells = <3>; + revision = ""; // from bootloader device_type = "soc"; - ranges = <0 f0000000 f0010000>; - reg = ; + ranges = <0 f0000000 0000c000>; + reg = ; bus-frequency = <0>; // from bootloader system-frequency = <0>; // from bootloader @@ -62,15 +60,13 @@ reg = <200 38>; }; - pic@500 { + mpc5200_pic: pic@500 { // 5200 interrupts are encoded into two levels; - linux,phandle = <500>; interrupt-controller; #interrupt-cells = <3>; device_type = "interrupt-controller"; compatible = "mpc5200-pic"; reg = <500 80>; - built-in; }; gpt@600 { // General Purpose Timer @@ -79,7 +75,7 @@ cell-index = <0>; reg = <600 10>; interrupts = <1 9 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; has-wdt; }; @@ -89,7 +85,7 @@ cell-index = <1>; reg = <610 10>; interrupts = <1 a 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@620 { // General Purpose Timer @@ -98,7 +94,7 @@ cell-index = <2>; reg = <620 10>; interrupts = <1 b 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@630 { // General Purpose Timer @@ -107,7 +103,7 @@ cell-index = <3>; reg = <630 10>; interrupts = <1 c 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@640 { // General Purpose Timer @@ -116,7 +112,7 @@ cell-index = <4>; reg = <640 10>; interrupts = <1 d 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@650 { // General Purpose Timer @@ -125,7 +121,7 @@ cell-index = <5>; reg = <650 10>; interrupts = <1 e 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@660 { // General Purpose Timer @@ -134,7 +130,7 @@ cell-index = <6>; reg = <660 10>; interrupts = <1 f 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@670 { // General Purpose Timer @@ -143,7 +139,7 @@ cell-index = <7>; reg = <670 10>; interrupts = <1 10 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; rtc@800 { // Real time clock @@ -151,7 +147,7 @@ device_type = "rtc"; reg = <800 100>; interrupts = <1 5 0 1 6 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; mscan@900 { @@ -159,7 +155,7 @@ compatible = "mpc5200-mscan"; cell-index = <0>; interrupts = <2 11 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; reg = <900 80>; }; @@ -168,7 +164,7 @@ compatible = "mpc5200-mscan"; cell-index = <1>; interrupts = <2 12 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; reg = <980 80>; }; @@ -176,35 +172,14 @@ compatible = "mpc5200-gpio"; reg = ; interrupts = <1 7 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpio-wkup@c00 { compatible = "mpc5200-gpio-wkup"; reg = ; interrupts = <1 8 0 0 3 0>; - interrupt-parent = <500>; - }; - - pci@0d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "mpc5200-pci"; - reg = ; - interrupt-map-mask = ; - interrupt-map = ; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 a 0>; - interrupt-parent = <500>; - bus-range = <0 0>; - ranges = <42000000 0 80000000 80000000 0 20000000 - 02000000 0 a0000000 a0000000 0 10000000 - 01000000 0 00000000 b0000000 0 01000000>; + interrupt-parent = <&mpc5200_pic>; }; spi@f00 { @@ -212,15 +187,15 @@ compatible = "mpc5200-spi"; reg = ; interrupts = <2 d 0 2 e 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; usb@1000 { device_type = "usb-ohci-be"; - compatible = "mpc5200-ohci\0ohci-be"; + compatible = "mpc5200-ohci","ohci-be"; reg = <1000 ff>; interrupts = <2 6 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; bestcomm@1200 { @@ -231,7 +206,7 @@ 3 4 0 3 5 0 3 6 0 3 7 0 3 8 0 3 9 0 3 a 0 3 b 0 3 c 0 3 d 0 3 e 0 3 f 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; xlb@1f00 { @@ -246,7 +221,7 @@ cell-index = <0>; reg = <2000 100>; interrupts = <2 1 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; // PSC2 in ac97 mode example @@ -256,7 +231,7 @@ // cell-index = <1>; // reg = <2200 100>; // interrupts = <2 2 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC3 in CODEC mode example @@ -266,7 +241,7 @@ // cell-index = <2>; // reg = <2400 100>; // interrupts = <2 3 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC4 in uart mode example @@ -276,7 +251,7 @@ // cell-index = <3>; // reg = <2600 100>; // interrupts = <2 b 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC5 in uart mode example @@ -286,7 +261,7 @@ // cell-index = <4>; // reg = <2800 100>; // interrupts = <2 c 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC6 in spi mode example @@ -296,7 +271,7 @@ // cell-index = <5>; // reg = <2c00 100>; // interrupts = <2 4 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; ethernet@3000 { @@ -305,7 +280,7 @@ reg = <3000 800>; mac-address = [ 02 03 04 05 06 07 ]; // Bad! interrupts = <2 5 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; ata@3a00 { @@ -313,32 +288,53 @@ compatible = "mpc5200-ata"; reg = <3a00 100>; interrupts = <2 7 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; i2c@3d00 { device_type = "i2c"; - compatible = "mpc5200-i2c\0fsl-i2c"; + compatible = "mpc5200-i2c","fsl-i2c"; cell-index = <0>; reg = <3d00 40>; interrupts = <2 f 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; fsl5200-clocking; }; i2c@3d40 { device_type = "i2c"; - compatible = "mpc5200-i2c\0fsl-i2c"; + compatible = "mpc5200-i2c","fsl-i2c"; cell-index = <1>; reg = <3d40 40>; interrupts = <2 10 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; fsl5200-clocking; }; sram@8000 { device_type = "sram"; - compatible = "mpc5200-sram\0sram"; + compatible = "mpc5200-sram","sram"; reg = <8000 4000>; }; }; + + pci@f0000d00 { + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + compatible = "mpc5200-pci"; + reg = ; + interrupt-map-mask = ; + interrupt-map = ; + clock-frequency = <0>; // From boot loader + interrupts = <2 8 0 2 9 0 2 a 0>; + interrupt-parent = <&mpc5200_pic>; + bus-range = <0 0>; + ranges = <42000000 0 80000000 80000000 0 20000000 + 02000000 0 a0000000 a0000000 0 10000000 + 01000000 0 00000000 b0000000 0 01000000>; + }; };