X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?p=pandora-kernel.git;a=blobdiff_plain;f=arch%2Farm%2Fmach-omap2%2Fclock3xxx_data.c;h=d85ecd5aebfd1d64358f4f91789b65c542df9c43;hp=c73906d1745833cb0d44511404439d808a9ab556;hb=da62aa69c181e3bd465a5c868ece166921a81e14;hpb=33081adf8b89d5a716d7e1c60171768d39795b39 diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index c73906d17458..d85ecd5aebfd 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -20,7 +20,6 @@ #include #include -#include #include #include "clock.h" @@ -33,6 +32,7 @@ #include "cm-regbits-34xx.h" #include "prm.h" #include "prm-regbits-34xx.h" +#include "control.h" /* * clocks @@ -2465,6 +2465,16 @@ static struct clk uart3_fck = { .recalc = &followparent_recalc, }; +static struct clk uart4_fck = { + .name = "uart4_fck", + .ops = &clkops_omap2_dflt_wait, + .parent = &per_48m_fck, + .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), + .enable_bit = OMAP3630_EN_UART4_SHIFT, + .clkdm_name = "per_clkdm", + .recalc = &followparent_recalc, +}; + static struct clk gpt2_fck = { .name = "gpt2_fck", .ops = &clkops_omap2_dflt_wait, @@ -2715,6 +2725,16 @@ static struct clk uart3_ick = { .recalc = &followparent_recalc, }; +static struct clk uart4_ick = { + .name = "uart4_ick", + .ops = &clkops_omap2_dflt_wait, + .parent = &per_l4_ick, + .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), + .enable_bit = OMAP3630_EN_UART4_SHIFT, + .clkdm_name = "per_clkdm", + .recalc = &followparent_recalc, +}; + static struct clk gpt9_ick = { .name = "gpt9_ick", .ops = &clkops_omap2_dflt_wait, @@ -3188,6 +3208,11 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX), CLK(NULL, "sys_ck", &sys_ck, CK_3XXX), CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX), + CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_3XXX), CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX), CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX), CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX), @@ -3253,6 +3278,8 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2 | CK_AM35XX), CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2 | CK_AM35XX), CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2 | CK_AM35XX), + CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), + CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), CLK("mmci-omap-hs.2", "fck", &mmchs3_fck, CK_3430ES2 | CK_AM35XX), CLK("mmci-omap-hs.1", "fck", &mmchs2_fck, CK_3XXX), @@ -3346,9 +3373,13 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX), CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX), CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX), + CLK("omap-mcbsp.2", "prcm_fck", &per_96m_fck, CK_3XXX), + CLK("omap-mcbsp.3", "prcm_fck", &per_96m_fck, CK_3XXX), + CLK("omap-mcbsp.4", "prcm_fck", &per_96m_fck, CK_3XXX), CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX), CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), + CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX), CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX), CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX), CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX), @@ -3372,6 +3403,7 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "gpio2_ick", &gpio2_ick, CK_3XXX), CLK(NULL, "wdt3_ick", &wdt3_ick, CK_3XXX), CLK(NULL, "uart3_ick", &uart3_ick, CK_3XXX), + CLK(NULL, "uart4_ick", &uart4_ick, CK_36XX), CLK(NULL, "gpt9_ick", &gpt9_ick, CK_3XXX), CLK(NULL, "gpt8_ick", &gpt8_ick, CK_3XXX), CLK(NULL, "gpt7_ick", &gpt7_ick, CK_3XXX),