OMAPDSS: rearrange code, drop nested functions
[pandora-kernel.git] / drivers / video / omap2 / dss / dispc.c
index d9e01bb..7846a33 100644 (file)
@@ -2996,18 +2996,16 @@ static void _omap_dispc_set_irqs(void)
        dispc_write_reg(DISPC_IRQENABLE, mask);
 }
 
-int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask)
+static int omap_dispc_register_isr_unlocked(omap_dispc_isr_t isr,
+               void *arg, u32 mask)
 {
        int i;
        int ret;
-       unsigned long flags;
        struct omap_dispc_isr_data *isr_data;
 
        if (isr == NULL)
                return -EINVAL;
 
-       spin_lock_irqsave(&dispc.irq_lock, flags);
-
        /* check for duplicate entry */
        for (i = 0; i < DISPC_MAX_NR_ISRS; i++) {
                isr_data = &dispc.registered_isr[i];
@@ -3040,25 +3038,30 @@ int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask)
 
        _omap_dispc_set_irqs();
 
-       spin_unlock_irqrestore(&dispc.irq_lock, flags);
-
-       return 0;
 err:
+       return ret;
+}
+
+int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask)
+{
+       unsigned long flags;
+       int ret;
+
+       spin_lock_irqsave(&dispc.irq_lock, flags);
+       ret = omap_dispc_register_isr_unlocked(isr, arg, mask);
        spin_unlock_irqrestore(&dispc.irq_lock, flags);
 
        return ret;
 }
 EXPORT_SYMBOL(omap_dispc_register_isr);
 
-int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask)
+static int omap_dispc_unregister_isr_unlocked(omap_dispc_isr_t isr,
+               void *arg, u32 mask)
 {
        int i;
-       unsigned long flags;
        int ret = -EINVAL;
        struct omap_dispc_isr_data *isr_data;
 
-       spin_lock_irqsave(&dispc.irq_lock, flags);
-
        for (i = 0; i < DISPC_MAX_NR_ISRS; i++) {
                isr_data = &dispc.registered_isr[i];
                if (isr_data->isr != isr || isr_data->arg != arg ||
@@ -3078,6 +3081,16 @@ int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask)
        if (ret == 0)
                _omap_dispc_set_irqs();
 
+       return ret;
+}
+
+int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask)
+{
+       unsigned long flags;
+       int ret;
+
+       spin_lock_irqsave(&dispc.irq_lock, flags);
+       ret = omap_dispc_unregister_isr_unlocked(isr, arg, mask);
        spin_unlock_irqrestore(&dispc.irq_lock, flags);
 
        return ret;
@@ -3282,13 +3295,13 @@ static void dispc_error_worker(struct work_struct *work)
        dispc_runtime_put();
 }
 
-int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout)
+static void dispc_irq_wait_handler(void *data, u32 mask)
 {
-       void dispc_irq_wait_handler(void *data, u32 mask)
-       {
-               complete((struct completion *)data);
-       }
+       complete((struct completion *)data);
+}
 
+int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout)
+{
        int r;
        DECLARE_COMPLETION_ONSTACK(completion);
 
@@ -3314,11 +3327,6 @@ int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout)
 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
                unsigned long timeout)
 {
-       void dispc_irq_wait_handler(void *data, u32 mask)
-       {
-               complete((struct completion *)data);
-       }
-
        int r;
        DECLARE_COMPLETION_ONSTACK(completion);