dispc_write_reg(vsi_reg[plane-1], val);
}
-static void _dispc_set_pix_inc(enum omap_plane plane, u16 inc)
+static void _dispc_set_pix_inc(enum omap_plane plane, s32 inc)
{
const struct dispc_reg ri_reg[] = { DISPC_GFX_PIXEL_INC,
DISPC_VID_PIXEL_INC(0),
dispc_write_reg(ri_reg[plane], inc);
}
-static void _dispc_set_row_inc(enum omap_plane plane, u16 inc)
+static void _dispc_set_row_inc(enum omap_plane plane, s32 inc)
{
const struct dispc_reg ri_reg[] = { DISPC_GFX_ROW_INC,
DISPC_VID_ROW_INC(0),
}
}
-static int pixinc(int pixels, u8 ps)
+static s32 pixinc(int pixels, u8 ps)
{
if (pixels == 1)
return 1;
u16 width, u16 height,
enum omap_color_mode color_mode, bool fieldmode,
unsigned *offset0, unsigned *offset1,
- u16 *row_inc, u16 *pix_inc)
+ s32 *row_inc, s32 *pix_inc)
{
u8 ps;
u16 fbw, fbh;
bool fieldmode = 0;
int cconv = 0;
unsigned offset0, offset1;
- u16 row_inc;
- u16 pix_inc;
+ s32 row_inc;
+ s32 pix_inc;
if (plane == OMAP_DSS_GFX) {
if (width != out_width || height != out_height)