ath9k: Add open loop power control support for AR9287.

[pandora-kernel.git] / drivers / net / wireless / ath / ath9k / hw.c

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 71a3bcc..125e689 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -407,7 +407,7 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
        ah->config.cck_trig_high = 200;
        ah->config.cck_trig_low = 100;
        ah->config.enable_ani = 1;
-       ah->config.diversity_control = 0;
+       ah->config.diversity_control = ATH9K_ANT_VARIABLE;
        ah->config.antenna_switch_swap = 0;
 
        for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
@@ -452,9 +452,6 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
        ah->regulatory.power_limit = MAX_RATE_POWER;
        ah->regulatory.tp_scale = ATH9K_TP_SCALE_MAX;
        ah->atim_window = 0;
-       ah->diversity_control = ah->config.diversity_control;
-       ah->antenna_switch_swap =
-               ah->config.antenna_switch_swap;
        ah->sta_id1_defaults = AR_STA_ID1_CRPT_MIC_ENABLE;
        ah->beacon_interval = 100;
        ah->enable_32kHz_clock = DONT_USE_32KHZ;
@@ -1335,11 +1332,21 @@ static void ath9k_olc_init(struct ath_hw *ah)
 {
        u32 i;
 
-       for (i = 0; i < AR9280_TX_GAIN_TABLE_SIZE; i++)
-               ah->originalGain[i] =
-                       MS(REG_READ(ah, AR_PHY_TX_GAIN_TBL1 + i * 4),
-                                       AR_PHY_TX_GAIN);
-       ah->PDADCdelta = 0;
+       if (OLC_FOR_AR9287_10_LATER) {
+               REG_SET_BIT(ah, AR_PHY_TX_PWRCTRL9,
+                               AR_PHY_TX_PWRCTRL9_RES_DC_REMOVAL);
+               ath9k_hw_analog_shift_rmw(ah, AR9287_AN_TXPC0,
+                               AR9287_AN_TXPC0_TXPCMODE,
+                               AR9287_AN_TXPC0_TXPCMODE_S,
+                               AR9287_AN_TXPC0_TXPCMODE_TEMPSENSE);
+               udelay(100);
+       } else {
+               for (i = 0; i < AR9280_TX_GAIN_TABLE_SIZE; i++)
+                       ah->originalGain[i] =
+                               MS(REG_READ(ah, AR_PHY_TX_GAIN_TBL1 + i * 4),
+                                               AR_PHY_TX_GAIN);
+               ah->PDADCdelta = 0;
+       }
 }
 
 static u32 ath9k_regd_get_ctl(struct ath_regulatory *reg,
@@ -3891,7 +3898,7 @@ bool ath9k_hw_setantennaswitch(struct ath_hw *ah,
                        break;
                }
        } else {
-               ah->diversity_control = settings;
+               ah->config.diversity_control = settings;
        }
 
        return true;
@@ -4019,14 +4026,12 @@ void ath9k_hw_reset_tsf(struct ath_hw *ah)
        ath9k_ps_restore(ah->ah_sc);
 }
 
-bool ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting)
+void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting)
 {
        if (setting)
                ah->misc_mode |= AR_PCU_TX_ADD_TSF;
        else
                ah->misc_mode &= ~AR_PCU_TX_ADD_TSF;
-
-       return true;
 }
 
 bool ath9k_hw_setslottime(struct ath_hw *ah, u32 us)