i7core_edac: Better describe the supported devices
[pandora-kernel.git] / drivers / edac / i7core_edac.c
index 94aeca0..6b8b7b4 100644 (file)
@@ -1,9 +1,14 @@
-/* Intel 7 core  Memory Controller kernel module (Nehalem)
+/* Intel i7 core/Nehalem Memory Controller kernel module
+ *
+ * This driver supports yhe memory controllers found on the Intel
+ * processor families i7core, i7core 7xx/8xx, i5core, Xeon 35xx,
+ * Xeon 55xx and Xeon 56xx also known as Nehalem, Nehalem-EP, Lynnfield
+ * and Westmere-EP.
  *
  * This file may be distributed under the terms of the
  * GNU General Public License version 2 only.
  *
- * Copyright (c) 2009 by:
+ * Copyright (c) 2009-2010 by:
  *      Mauro Carvalho Chehab <mchehab@redhat.com>
  *
  * Red Hat Inc. http://www.redhat.com
@@ -25,6 +30,7 @@
 #include <linux/pci.h>
 #include <linux/pci_ids.h>
 #include <linux/slab.h>
+#include <linux/delay.h>
 #include <linux/edac.h>
 #include <linux/mmzone.h>
 #include <linux/edac_mce.h>
@@ -202,12 +208,19 @@ struct pci_id_descr {
        int                     dev;
        int                     func;
        int                     dev_id;
+       int                     optional;
+};
+
+struct pci_id_table {
+       struct pci_id_descr     *descr;
+       int                     n_devs;
 };
 
 struct i7core_dev {
        struct list_head        list;
        u8                      socket;
        struct pci_dev          **pdev;
+       int                     n_devs;
        struct mem_ctl_info     *mci;
 };
 
@@ -259,11 +272,12 @@ static DEFINE_MUTEX(i7core_edac_lock);
        .func = (function),                     \
        .dev_id = (device_id)
 
-struct pci_id_descr pci_dev_descr[] = {
+struct pci_id_descr pci_dev_descr_i7core_nehalem[] = {
                /* Memory controller */
        { PCI_DESCR(3, 0, PCI_DEVICE_ID_INTEL_I7_MCR)     },
        { PCI_DESCR(3, 1, PCI_DEVICE_ID_INTEL_I7_MC_TAD)  },
-       { PCI_DESCR(3, 2, PCI_DEVICE_ID_INTEL_I7_MC_RAS)  }, /* if RDIMM */
+                       /* Exists only for RDIMM */
+       { PCI_DESCR(3, 2, PCI_DEVICE_ID_INTEL_I7_MC_RAS), .optional = 1  },
        { PCI_DESCR(3, 4, PCI_DEVICE_ID_INTEL_I7_MC_TEST) },
 
                /* Channel 0 */
@@ -291,16 +305,76 @@ struct pci_id_descr pci_dev_descr[] = {
         * the probing code needs to test for the other address in case of
         * failure of this one
         */
-       { PCI_DESCR(0, 0, PCI_DEVICE_ID_INTEL_I7_NOCORE)  },
+       { PCI_DESCR(0, 0, PCI_DEVICE_ID_INTEL_I7_NONCORE)  },
+
+};
+
+struct pci_id_descr pci_dev_descr_lynnfield[] = {
+       { PCI_DESCR( 3, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR)         },
+       { PCI_DESCR( 3, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD)      },
+       { PCI_DESCR( 3, 4, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST)     },
+
+       { PCI_DESCR( 4, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL) },
+       { PCI_DESCR( 4, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR) },
+       { PCI_DESCR( 4, 2, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK) },
+       { PCI_DESCR( 4, 3, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC)   },
+
+       { PCI_DESCR( 5, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL) },
+       { PCI_DESCR( 5, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR) },
+       { PCI_DESCR( 5, 2, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK) },
+       { PCI_DESCR( 5, 3, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC)   },
+
+       /*
+        * This is the PCI device has an alternate address on some
+        * processors like Core i7 860
+        */
+       { PCI_DESCR( 0, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE)     },
+};
+
+struct pci_id_descr pci_dev_descr_i7core_westmere[] = {
+               /* Memory controller */
+       { PCI_DESCR(3, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR_REV2)     },
+       { PCI_DESCR(3, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD_REV2)  },
+                       /* Exists only for RDIMM */
+       { PCI_DESCR(3, 2, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_RAS_REV2), .optional = 1  },
+       { PCI_DESCR(3, 4, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST_REV2) },
+
+               /* Channel 0 */
+       { PCI_DESCR(4, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL_REV2) },
+       { PCI_DESCR(4, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR_REV2) },
+       { PCI_DESCR(4, 2, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK_REV2) },
+       { PCI_DESCR(4, 3, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC_REV2)   },
+
+               /* Channel 1 */
+       { PCI_DESCR(5, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL_REV2) },
+       { PCI_DESCR(5, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR_REV2) },
+       { PCI_DESCR(5, 2, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK_REV2) },
+       { PCI_DESCR(5, 3, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC_REV2)   },
+
+               /* Channel 2 */
+       { PCI_DESCR(6, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_CTRL_REV2) },
+       { PCI_DESCR(6, 1, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2) },
+       { PCI_DESCR(6, 2, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2) },
+       { PCI_DESCR(6, 3, PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2)   },
 
+               /* Generic Non-core registers */
+       { PCI_DESCR(0, 0, PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_REV2)  },
+
+};
+
+#define PCI_ID_TABLE_ENTRY(A) { A, ARRAY_SIZE(A) }
+struct pci_id_table pci_dev_table[] = {
+       PCI_ID_TABLE_ENTRY(pci_dev_descr_i7core_nehalem),
+       PCI_ID_TABLE_ENTRY(pci_dev_descr_lynnfield),
+       PCI_ID_TABLE_ENTRY(pci_dev_descr_i7core_westmere),
 };
-#define N_DEVS ARRAY_SIZE(pci_dev_descr)
 
 /*
  *     pci_device_id   table for which devices we are looking for
  */
 static const struct pci_device_id i7core_pci_tbl[] __devinitdata = {
        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X58_HUB_MGMT)},
+       {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_LINK0)},
        {0,}                    /* 0 terminated list. */
 };
 
@@ -380,7 +454,7 @@ static struct pci_dev *get_pdev_slot_func(u8 socket, unsigned slot,
        if (!i7core_dev)
                return NULL;
 
-       for (i = 0; i < N_DEVS; i++) {
+       for (i = 0; i < i7core_dev->n_devs; i++) {
                if (!i7core_dev->pdev[i])
                        continue;
 
@@ -519,6 +593,9 @@ static int get_dimm_config(struct mem_ctl_info *mci, int *csrow)
        for (i = 0; i < NUM_CHANS; i++) {
                u32 data, dimm_dod[3], value[8];
 
+               if (!pvt->pci_ch[i][0])
+                       continue;
+
                if (!CH_ACTIVE(pvt, i)) {
                        debugf0("Channel %i is not active\n", i);
                        continue;
@@ -800,7 +877,7 @@ static ssize_t i7core_inject_store_##param(                 \
        if (pvt->inject.enable)                                 \
                disable_inject(mci);                            \
                                                                \
-       if (!strcasecmp(data, "any"))                           \
+       if (!strcasecmp(data, "any") || !strcasecmp(data, "any\n"))\
                value = -1;                                     \
        else {                                                  \
                rc = strict_strtoul(data, 10, &value);          \
@@ -914,41 +991,41 @@ static ssize_t i7core_inject_enable_store(struct mem_ctl_info *mci,
 
        /* Sets pvt->inject.dimm mask */
        if (pvt->inject.dimm < 0)
-               mask |= 1L << 41;
+               mask |= 1LL << 41;
        else {
                if (pvt->channel[pvt->inject.channel].dimms > 2)
-                       mask |= (pvt->inject.dimm & 0x3L) << 35;
+                       mask |= (pvt->inject.dimm & 0x3LL) << 35;
                else
-                       mask |= (pvt->inject.dimm & 0x1L) << 36;
+                       mask |= (pvt->inject.dimm & 0x1LL) << 36;
        }
 
        /* Sets pvt->inject.rank mask */
        if (pvt->inject.rank < 0)
-               mask |= 1L << 40;
+               mask |= 1LL << 40;
        else {
                if (pvt->channel[pvt->inject.channel].dimms > 2)
-                       mask |= (pvt->inject.rank & 0x1L) << 34;
+                       mask |= (pvt->inject.rank & 0x1LL) << 34;
                else
-                       mask |= (pvt->inject.rank & 0x3L) << 34;
+                       mask |= (pvt->inject.rank & 0x3LL) << 34;
        }
 
        /* Sets pvt->inject.bank mask */
        if (pvt->inject.bank < 0)
-               mask |= 1L << 39;
+               mask |= 1LL << 39;
        else
-               mask |= (pvt->inject.bank & 0x15L) << 30;
+               mask |= (pvt->inject.bank & 0x15LL) << 30;
 
        /* Sets pvt->inject.page mask */
        if (pvt->inject.page < 0)
-               mask |= 1L << 38;
+               mask |= 1LL << 38;
        else
-               mask |= (pvt->inject.page & 0xffffL) << 14;
+               mask |= (pvt->inject.page & 0xffff) << 14;
 
        /* Sets pvt->inject.column mask */
        if (pvt->inject.col < 0)
-               mask |= 1L << 37;
+               mask |= 1LL << 37;
        else
-               mask |= (pvt->inject.col & 0x3fffL);
+               mask |= (pvt->inject.col & 0x3fff);
 
        /*
         * bit    0: REPEAT_EN
@@ -998,6 +1075,9 @@ static ssize_t i7core_inject_enable_show(struct mem_ctl_info *mci,
        struct i7core_pvt *pvt = mci->pvt_info;
        u32 injectmask;
 
+       if (!pvt->pci_ch[pvt->inject.channel][0])
+               return 0;
+
        pci_read_config_dword(pvt->pci_ch[pvt->inject.channel][0],
                               MC_CHANNEL_ERROR_INJECT, &injectmask);
 
@@ -1116,7 +1196,7 @@ static void i7core_put_devices(struct i7core_dev *i7core_dev)
        int i;
 
        debugf0(__FILE__ ": %s()\n", __func__);
-       for (i = 0; i < N_DEVS; i++) {
+       for (i = 0; i < i7core_dev->n_devs; i++) {
                struct pci_dev *pdev = i7core_dev->pdev[i];
                if (!pdev)
                        continue;
@@ -1138,7 +1218,7 @@ static void i7core_put_all_devices(void)
                i7core_put_devices(i7core_dev);
 }
 
-static void i7core_xeon_pci_fixup(void)
+static void __init i7core_xeon_pci_fixup(struct pci_id_table *table)
 {
        struct pci_dev *pdev = NULL;
        int i;
@@ -1147,11 +1227,13 @@ static void i7core_xeon_pci_fixup(void)
         * aren't announced by acpi. So, we need to use a legacy scan probing
         * to detect them
         */
-       pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
-                             pci_dev_descr[0].dev_id, NULL);
-       if (unlikely(!pdev)) {
-               for (i = 0; i < MAX_SOCKET_BUSES; i++)
-                       pcibios_scan_specific_bus(255-i);
+       while (table && table->descr) {
+               pdev = pci_get_device(PCI_VENDOR_ID_INTEL, table->descr[0].dev_id, NULL);
+               if (unlikely(!pdev)) {
+                       for (i = 0; i < MAX_SOCKET_BUSES; i++)
+                               pcibios_scan_specific_bus(255-i);
+               }
+               table++;
        }
 }
 
@@ -1161,7 +1243,8 @@ static void i7core_xeon_pci_fixup(void)
  *
  *                     Need to 'get' device 16 func 1 and func 2
  */
-int i7core_get_onedevice(struct pci_dev **prev, int devno)
+int i7core_get_onedevice(struct pci_dev **prev, int devno,
+                        struct pci_id_descr *dev_descr, unsigned n_devs)
 {
        struct i7core_dev *i7core_dev;
 
@@ -1170,16 +1253,21 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno)
        u8 socket = 0;
 
        pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
-                             pci_dev_descr[devno].dev_id, *prev);
+                             dev_descr->dev_id, *prev);
 
        /*
         * On Xeon 55xx, the Intel Quckpath Arch Generic Non-core regs
         * is at addr 8086:2c40, instead of 8086:2c41. So, we need
         * to probe for the alternate address in case of failure
         */
-       if (pci_dev_descr[devno].dev_id == PCI_DEVICE_ID_INTEL_I7_NOCORE && !pdev)
+       if (dev_descr->dev_id == PCI_DEVICE_ID_INTEL_I7_NONCORE && !pdev)
+               pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
+                                     PCI_DEVICE_ID_INTEL_I7_NONCORE_ALT, *prev);
+
+       if (dev_descr->dev_id == PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE && !pdev)
                pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
-                                     PCI_DEVICE_ID_INTEL_I7_NOCORE_ALT, *prev);
+                                     PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_ALT,
+                                     *prev);
 
        if (!pdev) {
                if (*prev) {
@@ -1187,19 +1275,16 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno)
                        return 0;
                }
 
-               /*
-                * Dev 3 function 2 only exists on chips with RDIMMs
-                * so, it is ok to not found it
-                */
-               if ((pci_dev_descr[devno].dev == 3) && (pci_dev_descr[devno].func == 2)) {
-                       *prev = pdev;
+               if (dev_descr->optional)
                        return 0;
-               }
+
+               if (devno == 0)
+                       return -ENODEV;
 
                i7core_printk(KERN_ERR,
                        "Device not found: dev %02x.%d PCI ID %04x:%04x\n",
-                       pci_dev_descr[devno].dev, pci_dev_descr[devno].func,
-                       PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id);
+                       dev_descr->dev, dev_descr->func,
+                       PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
 
                /* End of list, leave */
                return -ENODEV;
@@ -1216,11 +1301,14 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno)
                i7core_dev = kzalloc(sizeof(*i7core_dev), GFP_KERNEL);
                if (!i7core_dev)
                        return -ENOMEM;
-               i7core_dev->pdev = kzalloc(sizeof(*i7core_dev->pdev) * N_DEVS,
+               i7core_dev->pdev = kzalloc(sizeof(*i7core_dev->pdev) * n_devs,
                                           GFP_KERNEL);
-               if (!i7core_dev->pdev)
+               if (!i7core_dev->pdev) {
+                       kfree(i7core_dev);
                        return -ENOMEM;
+               }
                i7core_dev->socket = socket;
+               i7core_dev->n_devs = n_devs;
                list_add_tail(&i7core_dev->list, &i7core_edac_list);
        }
 
@@ -1228,8 +1316,8 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno)
                i7core_printk(KERN_ERR,
                        "Duplicated device for "
                        "dev %02x:%02x.%d PCI ID %04x:%04x\n",
-                       bus, pci_dev_descr[devno].dev, pci_dev_descr[devno].func,
-                       PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id);
+                       bus, dev_descr->dev, dev_descr->func,
+                       PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
                pci_dev_put(pdev);
                return -ENODEV;
        }
@@ -1237,14 +1325,14 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno)
        i7core_dev->pdev[devno] = pdev;
 
        /* Sanity check */
-       if (unlikely(PCI_SLOT(pdev->devfn) != pci_dev_descr[devno].dev ||
-                       PCI_FUNC(pdev->devfn) != pci_dev_descr[devno].func)) {
+       if (unlikely(PCI_SLOT(pdev->devfn) != dev_descr->dev ||
+                       PCI_FUNC(pdev->devfn) != dev_descr->func)) {
                i7core_printk(KERN_ERR,
                        "Device PCI ID %04x:%04x "
                        "has dev %02x:%02x.%d instead of dev %02x:%02x.%d\n",
-                       PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id,
+                       PCI_VENDOR_ID_INTEL, dev_descr->dev_id,
                        bus, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
-                       bus, pci_dev_descr[devno].dev, pci_dev_descr[devno].func);
+                       bus, dev_descr->dev, dev_descr->func);
                return -ENODEV;
        }
 
@@ -1253,37 +1341,49 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno)
                i7core_printk(KERN_ERR,
                        "Couldn't enable "
                        "dev %02x:%02x.%d PCI ID %04x:%04x\n",
-                       bus, pci_dev_descr[devno].dev, pci_dev_descr[devno].func,
-                       PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id);
+                       bus, dev_descr->dev, dev_descr->func,
+                       PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
                return -ENODEV;
        }
 
        debugf0("Detected socket %d dev %02x:%02x.%d PCI ID %04x:%04x\n",
-               socket, bus, pci_dev_descr[devno].dev,
-               pci_dev_descr[devno].func,
-               PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id);
+               socket, bus, dev_descr->dev,
+               dev_descr->func,
+               PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
 
        *prev = pdev;
 
        return 0;
 }
 
-static int i7core_get_devices(void)
+static int i7core_get_devices(struct pci_id_table *table)
 {
-       int i;
+       int i, rc;
        struct pci_dev *pdev = NULL;
-
-       for (i = 0; i < N_DEVS; i++) {
-               pdev = NULL;
-               do {
-                       if (i7core_get_onedevice(&pdev, i) < 0) {
-                               i7core_put_all_devices();
-                               return -ENODEV;
-                       }
-               } while (pdev);
+       struct pci_id_descr *dev_descr;
+
+       while (table && table->descr) {
+               dev_descr = table->descr;
+               for (i = 0; i < table->n_devs; i++) {
+                       pdev = NULL;
+                       do {
+                               rc = i7core_get_onedevice(&pdev, i, &dev_descr[i],
+                                                         table->n_devs);
+                               if (rc < 0) {
+                                       if (i == 0) {
+                                               i = table->n_devs;
+                                               break;
+                                       }
+                                       i7core_put_all_devices();
+                                       return -ENODEV;
+                               }
+                       } while (pdev);
+               }
+               table++;
        }
 
        return 0;
+       return 0;
 }
 
 static int mci_bind_devs(struct mem_ctl_info *mci,
@@ -1298,7 +1398,7 @@ static int mci_bind_devs(struct mem_ctl_info *mci,
        i7core_dev->mci = mci;
 
        pvt->is_registered = 0;
-       for (i = 0; i < N_DEVS; i++) {
+       for (i = 0; i < i7core_dev->n_devs; i++) {
                pdev = i7core_dev->pdev[i];
                if (!pdev)
                        continue;
@@ -1631,14 +1731,14 @@ static void i7core_check_error(struct mem_ctl_info *mci)
         * loosing an error.
         */
        smp_rmb();
-       count = (pvt->mce_out + sizeof(mce_entry) - pvt->mce_in)
-               % sizeof(mce_entry);
+       count = (pvt->mce_out + MCE_LOG_LEN - pvt->mce_in)
+               % MCE_LOG_LEN;
        if (!count)
-               return;
+               goto check_ce_error;
 
        m = pvt->mce_outentry;
-       if (pvt->mce_in + count > sizeof(mce_entry)) {
-               unsigned l = sizeof(mce_entry) - pvt->mce_in;
+       if (pvt->mce_in + count > MCE_LOG_LEN) {
+               unsigned l = MCE_LOG_LEN - pvt->mce_in;
 
                memcpy(m, &pvt->mce_entry[pvt->mce_in], sizeof(*m) * l);
                smp_wmb();
@@ -1667,6 +1767,7 @@ static void i7core_check_error(struct mem_ctl_info *mci)
        /*
         * Now, let's increment CE error counts
         */
+check_ce_error:
        if (!pvt->is_registered)
                i7core_udimm_check_mc_ecc_err(mci);
        else
@@ -1678,6 +1779,8 @@ static void i7core_check_error(struct mem_ctl_info *mci)
  *                             This routine simply queues mcelog errors, and
  *                             return. The error itself should be handled later
  *                             by i7core_check_error.
+ * WARNING: As this routine should be called at NMI time, extra care should
+ * be taken to avoid deadlocks, and to be as fast as possible.
  */
 static int i7core_mce_check_error(void *priv, struct mce *mce)
 {
@@ -1695,24 +1798,23 @@ static int i7core_mce_check_error(void *priv, struct mce *mce)
        if (mce->bank != 8)
                return 0;
 
+#ifdef CONFIG_SMP
        /* Only handle if it is the right mc controller */
-       if (cpu_data(mce->cpu).phys_proc_id != pvt->i7core_dev->socket) {
-               debugf0("mc%d: ignoring mce log for socket %d. "
-                       "Another mc should get it.\n",
-                       pvt->i7core_dev->socket,
-                       cpu_data(mce->cpu).phys_proc_id);
+       if (cpu_data(mce->cpu).phys_proc_id != pvt->i7core_dev->socket)
                return 0;
-       }
+#endif
 
        smp_rmb();
-       if ((pvt->mce_out + 1) % sizeof(mce_entry) == pvt->mce_in) {
+       if ((pvt->mce_out + 1) % MCE_LOG_LEN == pvt->mce_in) {
                smp_wmb();
                pvt->mce_overrun++;
                return 0;
        }
-       smp_wmb();
-       pvt->mce_out = (pvt->mce_out + 1) % sizeof(mce_entry);
+
+       /* Copy memory error at the ringbuffer */
        memcpy(&pvt->mce_entry[pvt->mce_out], mce, sizeof(*mce));
+       smp_wmb();
+       pvt->mce_out = (pvt->mce_out + 1) % MCE_LOG_LEN;
 
        /* Handle fatal errors immediately */
        if (mce->mcgstatus & 1)
@@ -1813,7 +1915,8 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev,
        }
 
 fail:
-       edac_mc_free(mci);
+       if (rc < 0)
+               edac_mc_free(mci);
        return rc;
 }
 
@@ -1839,7 +1942,8 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
 
        /* get the pci devices we want to reserve for our use */
        mutex_lock(&i7core_edac_lock);
-       rc = i7core_get_devices();
+
+       rc = i7core_get_devices(pci_dev_table);
        if (unlikely(rc < 0))
                goto fail0;
 
@@ -1938,7 +2042,7 @@ static int __init i7core_init(void)
        /* Ensure that the OPSTATE is set correctly for POLL or NMI */
        opstate_init();
 
-       i7core_xeon_pci_fixup();
+       i7core_xeon_pci_fixup(pci_dev_table);
 
        pci_rc = pci_register_driver(&i7core_driver);