edac: move dimm properties to struct dimm_info

[pandora-kernel.git] / drivers / edac / e7xxx_edac.c

diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c
index 68dea87..5ed97f6 100644 (file)
--- a/drivers/edac/e7xxx_edac.c
+++ b/drivers/edac/e7xxx_edac.c
@@ -347,11 +347,12 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
                        int dev_idx, u32 drc)
 {
        unsigned long last_cumul_size;
-       int index;
+       int index, j;
        u8 value;
        u32 dra, cumul_size;
        int drc_chan, drc_drbg, drc_ddim, mem_dev;
        struct csrow_info *csrow;
+       struct dimm_info *dimm;
 
        pci_read_config_dword(pdev, E7XXX_DRA, &dra);
        drc_chan = dual_channel_active(drc, dev_idx);
@@ -381,24 +382,29 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
                csrow->last_page = cumul_size - 1;
                csrow->nr_pages = cumul_size - last_cumul_size;
                last_cumul_size = cumul_size;
-               csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
-               csrow->mtype = MEM_RDDR;        /* only one type supported */
-               csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
-
-               /*
-                * if single channel or x8 devices then SECDED
-                * if dual channel and x4 then S4ECD4ED
-                */
-               if (drc_ddim) {
-                       if (drc_chan && mem_dev) {
-                               csrow->edac_mode = EDAC_S4ECD4ED;
-                               mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
-                       } else {
-                               csrow->edac_mode = EDAC_SECDED;
-                               mci->edac_cap |= EDAC_FLAG_SECDED;
-                       }
-               } else
-                       csrow->edac_mode = EDAC_NONE;
+
+               for (j = 0; j < drc_chan + 1; j++) {
+                       dimm = csrow->channels[j].dimm;
+
+                       dimm->grain = 1 << 12;  /* 4KiB - resolution of CELOG */
+                       dimm->mtype = MEM_RDDR; /* only one type supported */
+                       dimm->dtype = mem_dev ? DEV_X4 : DEV_X8;
+
+                       /*
+                       * if single channel or x8 devices then SECDED
+                       * if dual channel and x4 then S4ECD4ED
+                       */
+                       if (drc_ddim) {
+                               if (drc_chan && mem_dev) {
+                                       dimm->edac_mode = EDAC_S4ECD4ED;
+                                       mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
+                               } else {
+                                       dimm->edac_mode = EDAC_SECDED;
+                                       mci->edac_cap |= EDAC_FLAG_SECDED;
+                               }
+                       } else
+                               dimm->edac_mode = EDAC_NONE;
+               }
        }
 }