ARM: Allow SMP kernels to boot on UP systems

[pandora-kernel.git] / arch / arm / mm / cache-v7.S

diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 37c8157..e8ea1a0 100644 (file)
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -91,11 +91,8 @@ ENTRY(v7_flush_kern_cache_all)
  THUMB(        stmfd   sp!, {r4-r7, r9-r11, lr}        )
        bl      v7_flush_dcache_all
        mov     r0, #0
-#ifdef CONFIG_SMP
-       mcr     p15, 0, r0, c7, c1, 0           @ invalidate I-cache inner shareable
-#else
-       mcr     p15, 0, r0, c7, c5, 0           @ I+BTB cache invalidate
-#endif
+       ALT_SMP(mcr     p15, 0, r0, c7, c1, 0)  @ invalidate I-cache inner shareable
+       ALT_UP(mcr      p15, 0, r0, c7, c5, 0)  @ I+BTB cache invalidate
  ARM(  ldmfd   sp!, {r4-r5, r7, r9-r11, lr}    )
  THUMB(        ldmfd   sp!, {r4-r7, r9-r11, lr}        )
        mov     pc, lr
@@ -171,11 +168,8 @@ ENTRY(v7_coherent_user_range)
        cmp     r0, r1
        blo     1b
        mov     r0, #0
-#ifdef CONFIG_SMP
-       mcr     p15, 0, r0, c7, c1, 6           @ invalidate BTB Inner Shareable
-#else
-       mcr     p15, 0, r0, c7, c5, 6           @ invalidate BTB
-#endif
+       ALT_SMP(mcr     p15, 0, r0, c7, c1, 6)  @ invalidate BTB Inner Shareable
+       ALT_UP(mcr      p15, 0, r0, c7, c5, 6)  @ invalidate BTB
        dsb
        isb
        mov     pc, lr