Merge branch 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[pandora-kernel.git] / arch / arm / mach-davinci / dm355.c
index dedf4d4..3dc0a88 100644 (file)
@@ -29,6 +29,7 @@
 #include <mach/serial.h>
 #include <mach/common.h>
 #include <mach/asp.h>
+#include <mach/spi.h>
 
 #include "clock.h"
 #include "mux.h"
@@ -125,7 +126,6 @@ static struct clk vpss_slave_clk = {
        .lpsc = DAVINCI_LPSC_VPSSSLV,
 };
 
-
 static struct clk clkout1_clk = {
        .name = "clkout1",
        .parent = &pll1_aux_clk,
@@ -335,7 +335,7 @@ static struct clk usb_clk = {
        .lpsc = DAVINCI_LPSC_USB,
 };
 
-static struct davinci_clk dm355_clks[] = {
+static struct clk_lookup dm355_clks[] = {
        CLK(NULL, "ref", &ref_clk),
        CLK(NULL, "pll1", &pll1_clk),
        CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
@@ -363,9 +363,9 @@ static struct davinci_clk dm355_clks[] = {
        CLK("davinci-asp.1", NULL, &asp1_clk),
        CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
        CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
-       CLK(NULL, "spi0", &spi0_clk),
-       CLK(NULL, "spi1", &spi1_clk),
-       CLK(NULL, "spi2", &spi2_clk),
+       CLK("spi_davinci.0", NULL, &spi0_clk),
+       CLK("spi_davinci.1", NULL, &spi1_clk),
+       CLK("spi_davinci.2", NULL, &spi2_clk),
        CLK(NULL, "gpio", &gpio_clk),
        CLK(NULL, "aemif", &aemif_clk),
        CLK(NULL, "pwm0", &pwm0_clk),
@@ -392,24 +392,40 @@ static struct resource dm355_spi0_resources[] = {
                .flags = IORESOURCE_MEM,
        },
        {
-               .start = IRQ_DM355_SPINT0_1,
+               .start = IRQ_DM355_SPINT0_0,
                .flags = IORESOURCE_IRQ,
        },
-       /* Not yet used, so not included:
-        * IORESOURCE_IRQ:
-        *  - IRQ_DM355_SPINT0_0
-        * IORESOURCE_DMA:
-        *  - DAVINCI_DMA_SPI_SPIX
-        *  - DAVINCI_DMA_SPI_SPIR
-        */
+       {
+               .start = 17,
+               .flags = IORESOURCE_DMA,
+       },
+       {
+               .start = 16,
+               .flags = IORESOURCE_DMA,
+       },
+       {
+               .start = EVENTQ_1,
+               .flags = IORESOURCE_DMA,
+       },
 };
 
+static struct davinci_spi_platform_data dm355_spi0_pdata = {
+       .version        = SPI_VERSION_1,
+       .num_chipselect = 2,
+       .clk_internal   = 1,
+       .cs_hold        = 1,
+       .intr_level     = 0,
+       .poll_mode      = 1,    /* 0 -> interrupt mode 1-> polling mode */
+       .c2tdelay       = 0,
+       .t2cdelay       = 0,
+};
 static struct platform_device dm355_spi0_device = {
        .name = "spi_davinci",
        .id = 0,
        .dev = {
                .dma_mask = &dm355_spi0_dma_mask,
                .coherent_dma_mask = DMA_BIT_MASK(32),
+               .platform_data = &dm355_spi0_pdata,
        },
        .num_resources = ARRAY_SIZE(dm355_spi0_resources),
        .resource = dm355_spi0_resources,
@@ -564,13 +580,6 @@ static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
 
 /*----------------------------------------------------------------------*/
 
-static const s8 dma_chan_dm355_no_event[] = {
-       12, 13, 24, 56, 57,
-       58, 59, 60, 61, 62,
-       63,
-       -1
-};
-
 static const s8
 queue_tc_mapping[][2] = {
        /* {event queue no, TC no} */
@@ -594,7 +603,6 @@ static struct edma_soc_info dm355_edma_info[] = {
                .n_slot                 = 128,
                .n_tc                   = 2,
                .n_cc                   = 1,
-               .noevent                = dma_chan_dm355_no_event,
                .queue_tc_mapping       = queue_tc_mapping,
                .queue_priority_mapping = queue_priority_mapping,
        },
@@ -665,6 +673,17 @@ static struct platform_device dm355_asp1_device = {
        .resource       = dm355_asp1_resources,
 };
 
+static void dm355_ccdc_setup_pinmux(void)
+{
+       davinci_cfg_reg(DM355_VIN_PCLK);
+       davinci_cfg_reg(DM355_VIN_CAM_WEN);
+       davinci_cfg_reg(DM355_VIN_CAM_VD);
+       davinci_cfg_reg(DM355_VIN_CAM_HD);
+       davinci_cfg_reg(DM355_VIN_YIN_EN);
+       davinci_cfg_reg(DM355_VIN_CINL_EN);
+       davinci_cfg_reg(DM355_VIN_CINH_EN);
+}
+
 static struct resource dm355_vpss_resources[] = {
        {
                /* VPSS BL Base address */
@@ -701,6 +720,10 @@ static struct resource vpfe_resources[] = {
                .end            = IRQ_VDINT1,
                .flags          = IORESOURCE_IRQ,
        },
+};
+
+static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static struct resource dm355_ccdc_resource[] = {
        /* CCDC Base address */
        {
                .flags          = IORESOURCE_MEM,
@@ -708,8 +731,18 @@ static struct resource vpfe_resources[] = {
                .end            = 0x01c70600 + 0x1ff,
        },
 };
+static struct platform_device dm355_ccdc_dev = {
+       .name           = "dm355_ccdc",
+       .id             = -1,
+       .num_resources  = ARRAY_SIZE(dm355_ccdc_resource),
+       .resource       = dm355_ccdc_resource,
+       .dev = {
+               .dma_mask               = &vpfe_capture_dma_mask,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+               .platform_data          = dm355_ccdc_setup_pinmux,
+       },
+};
 
-static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
 static struct platform_device vpfe_capture_dev = {
        .name           = CAPTURE_DRV_NAME,
        .id             = -1,
@@ -857,20 +890,13 @@ static int __init dm355_init_devices(void)
        if (!cpu_is_davinci_dm355())
                return 0;
 
+       /* Add ccdc clock aliases */
+       clk_add_alias("master", dm355_ccdc_dev.name, "vpss_master", NULL);
+       clk_add_alias("slave", dm355_ccdc_dev.name, "vpss_master", NULL);
        davinci_cfg_reg(DM355_INT_EDMA_CC);
        platform_device_register(&dm355_edma_device);
        platform_device_register(&dm355_vpss_device);
-       /*
-        * setup Mux configuration for vpfe input and register
-        * vpfe capture platform device
-        */
-       davinci_cfg_reg(DM355_VIN_PCLK);
-       davinci_cfg_reg(DM355_VIN_CAM_WEN);
-       davinci_cfg_reg(DM355_VIN_CAM_VD);
-       davinci_cfg_reg(DM355_VIN_CAM_HD);
-       davinci_cfg_reg(DM355_VIN_YIN_EN);
-       davinci_cfg_reg(DM355_VIN_CINL_EN);
-       davinci_cfg_reg(DM355_VIN_CINH_EN);
+       platform_device_register(&dm355_ccdc_dev);
        platform_device_register(&vpfe_capture_dev);
 
        return 0;