Merge branches 'btc', 'dma', 'entry', 'fixes', 'linker-layout', 'misc', 'mmci', ...

[pandora-kernel.git] / arch / arm / kernel / setup.c

diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index ed11fb0..9c3278f 100644 (file)
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -73,6 +73,7 @@ __setup("fpe=", fpe_setup);
 #endif
 
 extern void paging_init(struct machine_desc *desc);
+extern void sanity_check_meminfo(void);
 extern void reboot_setup(char *str);
 
 unsigned int processor_id;
@@ -342,54 +343,6 @@ static void __init feat_v6_fixup(void)
                elf_hwcap &= ~HWCAP_TLS;
 }
 
-static void __init setup_processor(void)
-{
-       struct proc_info_list *list;
-
-       /*
-        * locate processor in the list of supported processor
-        * types.  The linker builds this table for us from the
-        * entries in arch/arm/mm/proc-*.S
-        */
-       list = lookup_processor_type(read_cpuid_id());
-       if (!list) {
-               printk("CPU configuration botched (ID %08x), unable "
-                      "to continue.\n", read_cpuid_id());
-               while (1);
-       }
-
-       cpu_name = list->cpu_name;
-
-#ifdef MULTI_CPU
-       processor = *list->proc;
-#endif
-#ifdef MULTI_TLB
-       cpu_tlb = *list->tlb;
-#endif
-#ifdef MULTI_USER
-       cpu_user = *list->user;
-#endif
-#ifdef MULTI_CACHE
-       cpu_cache = *list->cache;
-#endif
-
-       printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
-              cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
-              proc_arch[cpu_architecture()], cr_alignment);
-
-       sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
-       sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
-       elf_hwcap = list->elf_hwcap;
-#ifndef CONFIG_ARM_THUMB
-       elf_hwcap &= ~HWCAP_THUMB;
-#endif
-
-       feat_v6_fixup();
-
-       cacheid_init();
-       cpu_proc_init();
-}
-
 /*
  * cpu_init - initialise one CPU.
  *
@@ -405,6 +358,8 @@ void cpu_init(void)
                BUG();
        }
 
+       cpu_proc_init();
+
        /*
         * Define the placement constraint for the inline asm directive below.
         * In Thumb-2, msr with an immediate value is not allowed.
@@ -441,6 +396,54 @@ void cpu_init(void)
            : "r14");
 }
 
+static void __init setup_processor(void)
+{
+       struct proc_info_list *list;
+
+       /*
+        * locate processor in the list of supported processor
+        * types.  The linker builds this table for us from the
+        * entries in arch/arm/mm/proc-*.S
+        */
+       list = lookup_processor_type(read_cpuid_id());
+       if (!list) {
+               printk("CPU configuration botched (ID %08x), unable "
+                      "to continue.\n", read_cpuid_id());
+               while (1);
+       }
+
+       cpu_name = list->cpu_name;
+
+#ifdef MULTI_CPU
+       processor = *list->proc;
+#endif
+#ifdef MULTI_TLB
+       cpu_tlb = *list->tlb;
+#endif
+#ifdef MULTI_USER
+       cpu_user = *list->user;
+#endif
+#ifdef MULTI_CACHE
+       cpu_cache = *list->cache;
+#endif
+
+       printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
+              cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
+              proc_arch[cpu_architecture()], cr_alignment);
+
+       sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
+       sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
+       elf_hwcap = list->elf_hwcap;
+#ifndef CONFIG_ARM_THUMB
+       elf_hwcap &= ~HWCAP_THUMB;
+#endif
+
+       feat_v6_fixup();
+
+       cacheid_init();
+       cpu_init();
+}
+
 void __init dump_machine_table(void)
 {
        struct machine_desc *p;
@@ -900,6 +903,7 @@ void __init setup_arch(char **cmdline_p)
 
        parse_early_param();
 
+       sanity_check_meminfo();
        arm_memblock_init(&meminfo, mdesc);
 
        paging_init(mdesc);
@@ -913,7 +917,6 @@ void __init setup_arch(char **cmdline_p)
 #endif
        reserve_crashkernel();
 
-       cpu_init();
        tcm_init();
 
 #ifdef CONFIG_MULTI_IRQ_HANDLER