e44c0e3a89b681acd0a84e8e681daa22a1312f89
[pandora-kernel.git] / sound / soc / codecs / wm_hubs.c
1 /*
2  * wm_hubs.c  --  WM8993/4 common code
3  *
4  * Copyright 2009 Wolfson Microelectronics plc
5  *
6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7  *
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/init.h>
17 #include <linux/delay.h>
18 #include <linux/pm.h>
19 #include <linux/i2c.h>
20 #include <linux/platform_device.h>
21 #include <linux/mfd/wm8994/registers.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/initval.h>
27 #include <sound/tlv.h>
28
29 #include "wm8993.h"
30 #include "wm_hubs.h"
31
32 const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
33 EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
34
35 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
36 static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
37 static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
38 static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
39 static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
40 static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
41 static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
42 static const unsigned int spkboost_tlv[] = {
43         TLV_DB_RANGE_HEAD(2),
44         0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
45         7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
46 };
47 static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
48
49 static const char *speaker_ref_text[] = {
50         "SPKVDD/2",
51         "VMID",
52 };
53
54 static const struct soc_enum speaker_ref =
55         SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
56
57 static const char *speaker_mode_text[] = {
58         "Class D",
59         "Class AB",
60 };
61
62 static const struct soc_enum speaker_mode =
63         SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
64
65 static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
66 {
67         struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
68         unsigned int reg;
69         int count = 0;
70         int timeout;
71         unsigned int val;
72
73         val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
74
75         /* Trigger the command */
76         snd_soc_write(codec, WM8993_DC_SERVO_0, val);
77
78         dev_dbg(codec->dev, "Waiting for DC servo...\n");
79
80         if (hubs->dcs_done_irq)
81                 timeout = 4;
82         else
83                 timeout = 400;
84
85         do {
86                 count++;
87
88                 if (hubs->dcs_done_irq)
89                         wait_for_completion_timeout(&hubs->dcs_done,
90                                                     msecs_to_jiffies(250));
91                 else
92                         msleep(1);
93
94                 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
95                 dev_dbg(codec->dev, "DC servo: %x\n", reg);
96         } while (reg & op && count < timeout);
97
98         if (reg & op)
99                 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
100                         op);
101 }
102
103 irqreturn_t wm_hubs_dcs_done(int irq, void *data)
104 {
105         struct wm_hubs_data *hubs = data;
106
107         complete(&hubs->dcs_done);
108
109         return IRQ_HANDLED;
110 }
111 EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
112
113 /*
114  * Startup calibration of the DC servo
115  */
116 static void calibrate_dc_servo(struct snd_soc_codec *codec)
117 {
118         struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
119         s8 offset;
120         u16 reg, reg_l, reg_r, dcs_cfg, dcs_reg;
121
122         switch (hubs->dcs_readback_mode) {
123         case 2:
124                 dcs_reg = WM8994_DC_SERVO_4E;
125                 break;
126         default:
127                 dcs_reg = WM8993_DC_SERVO_3;
128                 break;
129         }
130
131         /* If we're using a digital only path and have a previously
132          * callibrated DC servo offset stored then use that. */
133         if (hubs->class_w && hubs->class_w_dcs) {
134                 dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
135                         hubs->class_w_dcs);
136                 snd_soc_write(codec, dcs_reg, hubs->class_w_dcs);
137                 wait_for_dc_servo(codec,
138                                   WM8993_DCS_TRIG_DAC_WR_0 |
139                                   WM8993_DCS_TRIG_DAC_WR_1);
140                 return;
141         }
142
143         if (hubs->series_startup) {
144                 /* Set for 32 series updates */
145                 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
146                                     WM8993_DCS_SERIES_NO_01_MASK,
147                                     32 << WM8993_DCS_SERIES_NO_01_SHIFT);
148                 wait_for_dc_servo(codec,
149                                   WM8993_DCS_TRIG_SERIES_0 |
150                                   WM8993_DCS_TRIG_SERIES_1);
151         } else {
152                 wait_for_dc_servo(codec,
153                                   WM8993_DCS_TRIG_STARTUP_0 |
154                                   WM8993_DCS_TRIG_STARTUP_1);
155         }
156
157         /* Different chips in the family support different readback
158          * methods.
159          */
160         switch (hubs->dcs_readback_mode) {
161         case 0:
162                 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
163                         & WM8993_DCS_INTEG_CHAN_0_MASK;
164                 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
165                         & WM8993_DCS_INTEG_CHAN_1_MASK;
166                 break;
167         case 2:
168         case 1:
169                 reg = snd_soc_read(codec, dcs_reg);
170                 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
171                         >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
172                 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
173                 break;
174         default:
175                 WARN(1, "Unknown DCS readback method\n");
176                 break;
177         }
178
179         dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
180
181         /* Apply correction to DC servo result */
182         if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
183                 dev_dbg(codec->dev,
184                         "Applying %d/%d code DC servo correction\n",
185                         hubs->dcs_codes_l, hubs->dcs_codes_r);
186
187                 /* HPOUT1R */
188                 offset = reg_r;
189                 offset += hubs->dcs_codes_r;
190                 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
191
192                 /* HPOUT1L */
193                 offset = reg_l;
194                 offset += hubs->dcs_codes_l;
195                 dcs_cfg |= (u8)offset;
196
197                 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
198
199                 /* Do it */
200                 snd_soc_write(codec, dcs_reg, dcs_cfg);
201                 wait_for_dc_servo(codec,
202                                   WM8993_DCS_TRIG_DAC_WR_0 |
203                                   WM8993_DCS_TRIG_DAC_WR_1);
204         } else {
205                 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
206                 dcs_cfg |= reg_l;
207         }
208
209         /* Save the callibrated offset if we're in class W mode and
210          * therefore don't have any analogue signal mixed in. */
211         if (hubs->class_w)
212                 hubs->class_w_dcs = dcs_cfg;
213 }
214
215 /*
216  * Update the DC servo calibration on gain changes
217  */
218 static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
219                                struct snd_ctl_elem_value *ucontrol)
220 {
221         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
222         struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
223         int ret;
224
225         ret = snd_soc_put_volsw(kcontrol, ucontrol);
226
227         /* Updating the analogue gains invalidates the DC servo cache */
228         hubs->class_w_dcs = 0;
229
230         /* If we're applying an offset correction then updating the
231          * callibration would be likely to introduce further offsets. */
232         if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
233                 return ret;
234
235         /* Only need to do this if the outputs are active */
236         if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
237             & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
238                 snd_soc_update_bits(codec,
239                                     WM8993_DC_SERVO_0,
240                                     WM8993_DCS_TRIG_SINGLE_0 |
241                                     WM8993_DCS_TRIG_SINGLE_1,
242                                     WM8993_DCS_TRIG_SINGLE_0 |
243                                     WM8993_DCS_TRIG_SINGLE_1);
244
245         return ret;
246 }
247
248 static const struct snd_kcontrol_new analogue_snd_controls[] = {
249 SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
250                inpga_tlv),
251 SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
252 SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
253
254 SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
255                inpga_tlv),
256 SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
257 SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
258
259
260 SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
261                inpga_tlv),
262 SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
263 SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
264
265 SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
266                inpga_tlv),
267 SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
268 SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
269
270 SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
271                inmix_sw_tlv),
272 SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
273                inmix_sw_tlv),
274 SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
275                inmix_tlv),
276 SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
277 SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
278                inmix_tlv),
279
280 SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
281                inmix_sw_tlv),
282 SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
283                inmix_sw_tlv),
284 SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
285                inmix_tlv),
286 SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
287 SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
288                inmix_tlv),
289
290 SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
291                outmix_tlv),
292 SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
293                outmix_tlv),
294 SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
295                outmix_tlv),
296 SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
297                outmix_tlv),
298 SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
299                outmix_tlv),
300 SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
301                WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
302 SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
303                WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
304 SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
305                outmix_tlv),
306
307 SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
308                WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
309 SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
310                WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
311 SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
312                WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
313 SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
314                WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
315 SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
316                WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
317 SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
318                WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
319 SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
320                WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
321 SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
322                WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
323
324 SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
325                  WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
326 SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
327              WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
328 SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
329              WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
330
331 SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
332 SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
333
334 SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
335                5, 1, 1, wm_hubs_spkmix_tlv),
336 SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
337                4, 1, 1, wm_hubs_spkmix_tlv),
338 SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
339                3, 1, 1, wm_hubs_spkmix_tlv),
340
341 SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
342                5, 1, 1, wm_hubs_spkmix_tlv),
343 SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
344                4, 1, 1, wm_hubs_spkmix_tlv),
345 SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
346                3, 1, 1, wm_hubs_spkmix_tlv),
347
348 SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
349                  WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
350                  0, 3, 1, spkmixout_tlv),
351 SOC_DOUBLE_R_TLV("Speaker Volume",
352                  WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
353                  0, 63, 0, outpga_tlv),
354 SOC_DOUBLE_R("Speaker Switch",
355              WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
356              6, 1, 0),
357 SOC_DOUBLE_R("Speaker ZC Switch",
358              WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
359              7, 1, 0),
360 SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
361                spkboost_tlv),
362 SOC_ENUM("Speaker Reference", speaker_ref),
363 SOC_ENUM("Speaker Mode", speaker_mode),
364
365 SOC_DOUBLE_R_EXT_TLV("Headphone Volume",
366                      WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME,
367                      0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo,
368                      outpga_tlv),
369
370 SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
371              WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
372 SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
373              WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
374
375 SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
376 SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
377 SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
378                line_tlv),
379
380 SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
381 SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
382 SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
383                line_tlv),
384 };
385
386 static int hp_supply_event(struct snd_soc_dapm_widget *w,
387                            struct snd_kcontrol *kcontrol, int event)
388 {
389         struct snd_soc_codec *codec = w->codec;
390         struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
391
392         switch (event) {
393         case SND_SOC_DAPM_PRE_PMU:
394                 switch (hubs->hp_startup_mode) {
395                 case 0:
396                         break;
397                 case 1:
398                         /* Enable the headphone amp */
399                         snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
400                                             WM8993_HPOUT1L_ENA |
401                                             WM8993_HPOUT1R_ENA,
402                                             WM8993_HPOUT1L_ENA |
403                                             WM8993_HPOUT1R_ENA);
404
405                         /* Enable the second stage */
406                         snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
407                                             WM8993_HPOUT1L_DLY |
408                                             WM8993_HPOUT1R_DLY,
409                                             WM8993_HPOUT1L_DLY |
410                                             WM8993_HPOUT1R_DLY);
411                         break;
412                 default:
413                         dev_err(codec->dev, "Unknown HP startup mode %d\n",
414                                 hubs->hp_startup_mode);
415                         break;
416                 }
417                 break;
418
419         case SND_SOC_DAPM_PRE_PMD:
420                 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
421                                     WM8993_CP_ENA, 0);
422                 break;
423         }
424
425         return 0;
426 }
427
428 static int hp_event(struct snd_soc_dapm_widget *w,
429                     struct snd_kcontrol *kcontrol, int event)
430 {
431         struct snd_soc_codec *codec = w->codec;
432         unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
433
434         switch (event) {
435         case SND_SOC_DAPM_POST_PMU:
436                 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
437                                     WM8993_CP_ENA, WM8993_CP_ENA);
438
439                 msleep(5);
440
441                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
442                                     WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
443                                     WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
444
445                 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
446                 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
447
448                 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
449                                     WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
450
451                 calibrate_dc_servo(codec);
452
453                 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
454                         WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
455                 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
456                 break;
457
458         case SND_SOC_DAPM_PRE_PMD:
459                 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
460                                     WM8993_HPOUT1L_OUTP |
461                                     WM8993_HPOUT1R_OUTP |
462                                     WM8993_HPOUT1L_RMV_SHORT |
463                                     WM8993_HPOUT1R_RMV_SHORT, 0);
464
465                 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
466                                     WM8993_HPOUT1L_DLY |
467                                     WM8993_HPOUT1R_DLY, 0);
468
469                 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
470
471                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
472                                     WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
473                                     0);
474                 break;
475         }
476
477         return 0;
478 }
479
480 static int earpiece_event(struct snd_soc_dapm_widget *w,
481                           struct snd_kcontrol *control, int event)
482 {
483         struct snd_soc_codec *codec = w->codec;
484         u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
485
486         switch (event) {
487         case SND_SOC_DAPM_PRE_PMU:
488                 reg |= WM8993_HPOUT2_IN_ENA;
489                 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
490                 udelay(50);
491                 break;
492
493         case SND_SOC_DAPM_POST_PMD:
494                 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
495                 break;
496
497         default:
498                 BUG();
499                 break;
500         }
501
502         return 0;
503 }
504
505 static const struct snd_kcontrol_new in1l_pga[] = {
506 SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
507 SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
508 };
509
510 static const struct snd_kcontrol_new in1r_pga[] = {
511 SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
512 SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
513 };
514
515 static const struct snd_kcontrol_new in2l_pga[] = {
516 SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
517 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
518 };
519
520 static const struct snd_kcontrol_new in2r_pga[] = {
521 SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
522 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
523 };
524
525 static const struct snd_kcontrol_new mixinl[] = {
526 SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
527 SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
528 };
529
530 static const struct snd_kcontrol_new mixinr[] = {
531 SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
532 SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
533 };
534
535 static const struct snd_kcontrol_new left_output_mixer[] = {
536 SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
537 SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
538 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
539 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
540 SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
541 SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
542 SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
543 SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
544 };
545
546 static const struct snd_kcontrol_new right_output_mixer[] = {
547 SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
548 SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
549 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
550 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
551 SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
552 SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
553 SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
554 SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
555 };
556
557 static const struct snd_kcontrol_new earpiece_mixer[] = {
558 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
559 SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
560 SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
561 };
562
563 static const struct snd_kcontrol_new left_speaker_boost[] = {
564 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
565 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
566 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
567 };
568
569 static const struct snd_kcontrol_new right_speaker_boost[] = {
570 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
571 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
572 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
573 };
574
575 static const struct snd_kcontrol_new line1_mix[] = {
576 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
577 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
578 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
579 };
580
581 static const struct snd_kcontrol_new line1n_mix[] = {
582 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
583 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
584 };
585
586 static const struct snd_kcontrol_new line1p_mix[] = {
587 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
588 };
589
590 static const struct snd_kcontrol_new line2_mix[] = {
591 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0),
592 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0),
593 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
594 };
595
596 static const struct snd_kcontrol_new line2n_mix[] = {
597 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
598 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
599 };
600
601 static const struct snd_kcontrol_new line2p_mix[] = {
602 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
603 };
604
605 static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
606 SND_SOC_DAPM_INPUT("IN1LN"),
607 SND_SOC_DAPM_INPUT("IN1LP"),
608 SND_SOC_DAPM_INPUT("IN2LN"),
609 SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
610 SND_SOC_DAPM_INPUT("IN1RN"),
611 SND_SOC_DAPM_INPUT("IN1RP"),
612 SND_SOC_DAPM_INPUT("IN2RN"),
613 SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
614
615 SND_SOC_DAPM_MICBIAS("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0),
616 SND_SOC_DAPM_MICBIAS("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0),
617
618 SND_SOC_DAPM_SUPPLY("LINEOUT_VMID_BUF", WM8993_ANTIPOP1, 7, 0, NULL, 0),
619
620 SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
621                    in1l_pga, ARRAY_SIZE(in1l_pga)),
622 SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
623                    in1r_pga, ARRAY_SIZE(in1r_pga)),
624
625 SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
626                    in2l_pga, ARRAY_SIZE(in2l_pga)),
627 SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
628                    in2r_pga, ARRAY_SIZE(in2r_pga)),
629
630 SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
631                    mixinl, ARRAY_SIZE(mixinl)),
632 SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
633                    mixinr, ARRAY_SIZE(mixinr)),
634
635 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
636                    left_output_mixer, ARRAY_SIZE(left_output_mixer)),
637 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
638                    right_output_mixer, ARRAY_SIZE(right_output_mixer)),
639
640 SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
641 SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
642
643 SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event, 
644                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
645 SND_SOC_DAPM_PGA_E("Headphone PGA", SND_SOC_NOPM, 0, 0,
646                    NULL, 0,
647                    hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
648
649 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
650                    earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
651 SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
652                    NULL, 0, earpiece_event,
653                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
654
655 SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
656                    left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
657 SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
658                    right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
659
660 SND_SOC_DAPM_PGA("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
661                  NULL, 0),
662 SND_SOC_DAPM_PGA("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
663                  NULL, 0),
664
665 SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
666                    line1_mix, ARRAY_SIZE(line1_mix)),
667 SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
668                    line2_mix, ARRAY_SIZE(line2_mix)),
669
670 SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
671                    line1n_mix, ARRAY_SIZE(line1n_mix)),
672 SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
673                    line1p_mix, ARRAY_SIZE(line1p_mix)),
674 SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
675                    line2n_mix, ARRAY_SIZE(line2n_mix)),
676 SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
677                    line2p_mix, ARRAY_SIZE(line2p_mix)),
678
679 SND_SOC_DAPM_PGA("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
680                  NULL, 0),
681 SND_SOC_DAPM_PGA("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
682                  NULL, 0),
683 SND_SOC_DAPM_PGA("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
684                  NULL, 0),
685 SND_SOC_DAPM_PGA("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
686                  NULL, 0),
687
688 SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
689 SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
690 SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
691 SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
692 SND_SOC_DAPM_OUTPUT("HPOUT1L"),
693 SND_SOC_DAPM_OUTPUT("HPOUT1R"),
694 SND_SOC_DAPM_OUTPUT("HPOUT2P"),
695 SND_SOC_DAPM_OUTPUT("HPOUT2N"),
696 SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
697 SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
698 SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
699 SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
700 };
701
702 static const struct snd_soc_dapm_route analogue_routes[] = {
703         { "MICBIAS1", NULL, "CLK_SYS" },
704         { "MICBIAS2", NULL, "CLK_SYS" },
705
706         { "IN1L PGA", "IN1LP Switch", "IN1LP" },
707         { "IN1L PGA", "IN1LN Switch", "IN1LN" },
708
709         { "IN1L PGA", NULL, "VMID" },
710         { "IN1R PGA", NULL, "VMID" },
711         { "IN2L PGA", NULL, "VMID" },
712         { "IN2R PGA", NULL, "VMID" },
713
714         { "IN1R PGA", "IN1RP Switch", "IN1RP" },
715         { "IN1R PGA", "IN1RN Switch", "IN1RN" },
716
717         { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
718         { "IN2L PGA", "IN2LN Switch", "IN2LN" },
719
720         { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
721         { "IN2R PGA", "IN2RN Switch", "IN2RN" },
722
723         { "Direct Voice", NULL, "IN2LP:VXRN" },
724         { "Direct Voice", NULL, "IN2RP:VXRP" },
725
726         { "MIXINL", "IN1L Switch", "IN1L PGA" },
727         { "MIXINL", "IN2L Switch", "IN2L PGA" },
728         { "MIXINL", NULL, "Direct Voice" },
729         { "MIXINL", NULL, "IN1LP" },
730         { "MIXINL", NULL, "Left Output Mixer" },
731         { "MIXINL", NULL, "VMID" },
732
733         { "MIXINR", "IN1R Switch", "IN1R PGA" },
734         { "MIXINR", "IN2R Switch", "IN2R PGA" },
735         { "MIXINR", NULL, "Direct Voice" },
736         { "MIXINR", NULL, "IN1RP" },
737         { "MIXINR", NULL, "Right Output Mixer" },
738         { "MIXINR", NULL, "VMID" },
739
740         { "ADCL", NULL, "MIXINL" },
741         { "ADCR", NULL, "MIXINR" },
742
743         { "Left Output Mixer", "Left Input Switch", "MIXINL" },
744         { "Left Output Mixer", "Right Input Switch", "MIXINR" },
745         { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
746         { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
747         { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
748         { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
749         { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
750
751         { "Right Output Mixer", "Left Input Switch", "MIXINL" },
752         { "Right Output Mixer", "Right Input Switch", "MIXINR" },
753         { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
754         { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
755         { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
756         { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
757         { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
758
759         { "Left Output PGA", NULL, "Left Output Mixer" },
760         { "Left Output PGA", NULL, "TOCLK" },
761
762         { "Right Output PGA", NULL, "Right Output Mixer" },
763         { "Right Output PGA", NULL, "TOCLK" },
764
765         { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
766         { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
767         { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
768
769         { "Earpiece Driver", NULL, "VMID" },
770         { "Earpiece Driver", NULL, "Earpiece Mixer" },
771         { "HPOUT2N", NULL, "Earpiece Driver" },
772         { "HPOUT2P", NULL, "Earpiece Driver" },
773
774         { "SPKL", "Input Switch", "MIXINL" },
775         { "SPKL", "IN1LP Switch", "IN1LP" },
776         { "SPKL", "Output Switch", "Left Output PGA" },
777         { "SPKL", NULL, "TOCLK" },
778
779         { "SPKR", "Input Switch", "MIXINR" },
780         { "SPKR", "IN1RP Switch", "IN1RP" },
781         { "SPKR", "Output Switch", "Right Output PGA" },
782         { "SPKR", NULL, "TOCLK" },
783
784         { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
785         { "SPKL Boost", "SPKL Switch", "SPKL" },
786         { "SPKL Boost", "SPKR Switch", "SPKR" },
787
788         { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
789         { "SPKR Boost", "SPKR Switch", "SPKR" },
790         { "SPKR Boost", "SPKL Switch", "SPKL" },
791
792         { "SPKL Driver", NULL, "VMID" },
793         { "SPKL Driver", NULL, "SPKL Boost" },
794         { "SPKL Driver", NULL, "CLK_SYS" },
795
796         { "SPKR Driver", NULL, "VMID" },
797         { "SPKR Driver", NULL, "SPKR Boost" },
798         { "SPKR Driver", NULL, "CLK_SYS" },
799
800         { "SPKOUTLP", NULL, "SPKL Driver" },
801         { "SPKOUTLN", NULL, "SPKL Driver" },
802         { "SPKOUTRP", NULL, "SPKR Driver" },
803         { "SPKOUTRN", NULL, "SPKR Driver" },
804
805         { "Left Headphone Mux", "Mixer", "Left Output PGA" },
806         { "Right Headphone Mux", "Mixer", "Right Output PGA" },
807
808         { "Headphone PGA", NULL, "Left Headphone Mux" },
809         { "Headphone PGA", NULL, "Right Headphone Mux" },
810         { "Headphone PGA", NULL, "VMID" },
811         { "Headphone PGA", NULL, "CLK_SYS" },
812         { "Headphone PGA", NULL, "Headphone Supply" },
813
814         { "HPOUT1L", NULL, "Headphone PGA" },
815         { "HPOUT1R", NULL, "Headphone PGA" },
816
817         { "LINEOUT1N Driver", NULL, "VMID" },
818         { "LINEOUT1P Driver", NULL, "VMID" },
819         { "LINEOUT2N Driver", NULL, "VMID" },
820         { "LINEOUT2P Driver", NULL, "VMID" },
821
822         { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
823         { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
824         { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
825         { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
826 };
827
828 static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
829         { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
830         { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
831         { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
832
833         { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
834         { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
835 };
836
837 static const struct snd_soc_dapm_route lineout1_se_routes[] = {
838         { "LINEOUT1N Mixer", NULL, "LINEOUT_VMID_BUF" },
839         { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
840         { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
841
842         { "LINEOUT1P Mixer", NULL, "LINEOUT_VMID_BUF" },
843         { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
844
845         { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
846         { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
847 };
848
849 static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
850         { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" },
851         { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" },
852         { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
853
854         { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
855         { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
856 };
857
858 static const struct snd_soc_dapm_route lineout2_se_routes[] = {
859         { "LINEOUT2N Mixer", NULL, "LINEOUT_VMID_BUF" },
860         { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
861         { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
862
863         { "LINEOUT2P Mixer", NULL, "LINEOUT_VMID_BUF" },
864         { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
865
866         { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
867         { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
868 };
869
870 int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
871 {
872         struct snd_soc_dapm_context *dapm = &codec->dapm;
873
874         /* Latch volume update bits & default ZC on */
875         snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
876                             WM8993_IN1_VU, WM8993_IN1_VU);
877         snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
878                             WM8993_IN1_VU, WM8993_IN1_VU);
879         snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
880                             WM8993_IN2_VU, WM8993_IN2_VU);
881         snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
882                             WM8993_IN2_VU, WM8993_IN2_VU);
883
884         snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
885                             WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
886         snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
887                             WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
888
889         snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
890                             WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
891                             WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
892         snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
893                             WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
894                             WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
895
896         snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
897                             WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
898                             WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
899         snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
900                             WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
901                             WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
902
903         snd_soc_add_controls(codec, analogue_snd_controls,
904                              ARRAY_SIZE(analogue_snd_controls));
905
906         snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
907                                   ARRAY_SIZE(analogue_dapm_widgets));
908         return 0;
909 }
910 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
911
912 int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
913                                 int lineout1_diff, int lineout2_diff)
914 {
915         struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
916         struct snd_soc_dapm_context *dapm = &codec->dapm;
917
918         init_completion(&hubs->dcs_done);
919
920         snd_soc_dapm_add_routes(dapm, analogue_routes,
921                                 ARRAY_SIZE(analogue_routes));
922
923         if (lineout1_diff)
924                 snd_soc_dapm_add_routes(dapm,
925                                         lineout1_diff_routes,
926                                         ARRAY_SIZE(lineout1_diff_routes));
927         else
928                 snd_soc_dapm_add_routes(dapm,
929                                         lineout1_se_routes,
930                                         ARRAY_SIZE(lineout1_se_routes));
931
932         if (lineout2_diff)
933                 snd_soc_dapm_add_routes(dapm,
934                                         lineout2_diff_routes,
935                                         ARRAY_SIZE(lineout2_diff_routes));
936         else
937                 snd_soc_dapm_add_routes(dapm,
938                                         lineout2_se_routes,
939                                         ARRAY_SIZE(lineout2_se_routes));
940
941         return 0;
942 }
943 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
944
945 int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
946                                   int lineout1_diff, int lineout2_diff,
947                                   int lineout1fb, int lineout2fb,
948                                   int jd_scthr, int jd_thr, int micbias1_lvl,
949                                   int micbias2_lvl)
950 {
951         if (!lineout1_diff)
952                 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
953                                     WM8993_LINEOUT1_MODE,
954                                     WM8993_LINEOUT1_MODE);
955         if (!lineout2_diff)
956                 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
957                                     WM8993_LINEOUT2_MODE,
958                                     WM8993_LINEOUT2_MODE);
959
960         /* If the line outputs are differential then we aren't presenting
961          * VMID as an output and can disable it.
962          */
963         if (lineout1_diff && lineout2_diff)
964                 codec->dapm.idle_bias_off = 1;
965
966         if (lineout1fb)
967                 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
968                                     WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
969
970         if (lineout2fb)
971                 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
972                                     WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
973
974         snd_soc_update_bits(codec, WM8993_MICBIAS,
975                             WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
976                             WM8993_MICB1_LVL | WM8993_MICB2_LVL,
977                             jd_scthr << WM8993_JD_SCTHR_SHIFT |
978                             jd_thr << WM8993_JD_THR_SHIFT |
979                             micbias1_lvl |
980                             micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
981
982         return 0;
983 }
984 EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
985
986 MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
987 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
988 MODULE_LICENSE("GPL");