sound/soc/codecs/wm8804.c

   1 /*
   2  * wm8804.c  --  WM8804 S/PDIF transceiver driver
   3  *
   4  * Copyright 2010 Wolfson Microelectronics plc
   5  *
   6  * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/pm.h>
  18 #include <linux/i2c.h>
  19 #include <linux/of_device.h>
  20 #include <linux/spi/spi.h>
  21 #include <linux/regulator/consumer.h>
  22 #include <linux/slab.h>
  23 #include <sound/core.h>
  24 #include <sound/pcm.h>
  25 #include <sound/pcm_params.h>
  26 #include <sound/soc.h>
  27 #include <sound/initval.h>
  28 #include <sound/tlv.h>
  29
  30 #include "wm8804.h"
  31
  32 #define WM8804_NUM_SUPPLIES 2
  33 static const char *wm8804_supply_names[WM8804_NUM_SUPPLIES] = {
  34         "PVDD",
  35         "DVDD"
  36 };
  37
  38 static const u8 wm8804_reg_defs[] = {
  39         0x05,     /* R0  - RST/DEVID1 */
  40         0x88,     /* R1  - DEVID2 */
  41         0x04,     /* R2  - DEVREV */
  42         0x21,     /* R3  - PLL1 */
  43         0xFD,     /* R4  - PLL2 */
  44         0x36,     /* R5  - PLL3 */
  45         0x07,     /* R6  - PLL4 */
  46         0x16,     /* R7  - PLL5 */
  47         0x18,     /* R8  - PLL6 */
  48         0xFF,     /* R9  - SPDMODE */
  49         0x00,     /* R10 - INTMASK */
  50         0x00,     /* R11 - INTSTAT */
  51         0x00,     /* R12 - SPDSTAT */
  52         0x00,     /* R13 - RXCHAN1 */
  53         0x00,     /* R14 - RXCHAN2 */
  54         0x00,     /* R15 - RXCHAN3 */
  55         0x00,     /* R16 - RXCHAN4 */
  56         0x00,     /* R17 - RXCHAN5 */
  57         0x00,     /* R18 - SPDTX1 */
  58         0x00,     /* R19 - SPDTX2 */
  59         0x00,     /* R20 - SPDTX3 */
  60         0x71,     /* R21 - SPDTX4 */
  61         0x0B,     /* R22 - SPDTX5 */
  62         0x70,     /* R23 - GPO0 */
  63         0x57,     /* R24 - GPO1 */
  64         0x00,     /* R25 */
  65         0x42,     /* R26 - GPO2 */
  66         0x06,     /* R27 - AIFTX */
  67         0x06,     /* R28 - AIFRX */
  68         0x80,     /* R29 - SPDRX1 */
  69         0x07,     /* R30 - PWRDN */
  70 };
  71
  72 struct wm8804_priv {
  73         enum snd_soc_control_type control_type;
  74         struct regulator_bulk_data supplies[WM8804_NUM_SUPPLIES];
  75         struct notifier_block disable_nb[WM8804_NUM_SUPPLIES];
  76         struct snd_soc_codec *codec;
  77 };
  78
  79 static int txsrc_get(struct snd_kcontrol *kcontrol,
  80                      struct snd_ctl_elem_value *ucontrol);
  81
  82 static int txsrc_put(struct snd_kcontrol *kcontrol,
  83                      struct snd_ctl_elem_value *ucontrol);
  84
  85 /*
  86  * We can't use the same notifier block for more than one supply and
  87  * there's no way I can see to get from a callback to the caller
  88  * except container_of().
  89  */
  90 #define WM8804_REGULATOR_EVENT(n) \
  91 static int wm8804_regulator_event_##n(struct notifier_block *nb, \
  92                                       unsigned long event, void *data)    \
  93 { \
  94         struct wm8804_priv *wm8804 = container_of(nb, struct wm8804_priv, \
  95                                                   disable_nb[n]); \
  96         if (event & REGULATOR_EVENT_DISABLE) { \
  97                 wm8804->codec->cache_sync = 1; \
  98         } \
  99         return 0; \
 100 }
 101
 102 WM8804_REGULATOR_EVENT(0)
 103 WM8804_REGULATOR_EVENT(1)
 104
 105 static const char *txsrc_text[] = { "S/PDIF RX", "AIF" };
 106 static const SOC_ENUM_SINGLE_EXT_DECL(txsrc, txsrc_text);
 107
 108 static const struct snd_kcontrol_new wm8804_snd_controls[] = {
 109         SOC_ENUM_EXT("Input Source", txsrc, txsrc_get, txsrc_put),
 110         SOC_SINGLE("TX Playback Switch", WM8804_PWRDN, 2, 1, 1),
 111         SOC_SINGLE("AIF Playback Switch", WM8804_PWRDN, 4, 1, 1)
 112 };
 113
 114 static int txsrc_get(struct snd_kcontrol *kcontrol,
 115                      struct snd_ctl_elem_value *ucontrol)
 116 {
 117         struct snd_soc_codec *codec;
 118         unsigned int src;
 119
 120         codec = snd_kcontrol_chip(kcontrol);
 121         src = snd_soc_read(codec, WM8804_SPDTX4);
 122         if (src & 0x40)
 123                 ucontrol->value.integer.value[0] = 1;
 124         else
 125                 ucontrol->value.integer.value[0] = 0;
 126
 127         return 0;
 128 }
 129
 130 static int txsrc_put(struct snd_kcontrol *kcontrol,
 131                      struct snd_ctl_elem_value *ucontrol)
 132 {
 133         struct snd_soc_codec *codec;
 134         unsigned int src, txpwr;
 135
 136         codec = snd_kcontrol_chip(kcontrol);
 137
 138         if (ucontrol->value.integer.value[0] != 0
 139                         && ucontrol->value.integer.value[0] != 1)
 140                 return -EINVAL;
 141
 142         src = snd_soc_read(codec, WM8804_SPDTX4);
 143         switch ((src & 0x40) >> 6) {
 144         case 0:
 145                 if (!ucontrol->value.integer.value[0])
 146                         return 0;
 147                 break;
 148         case 1:
 149                 if (ucontrol->value.integer.value[1])
 150                         return 0;
 151                 break;
 152         }
 153
 154         /* save the current power state of the transmitter */
 155         txpwr = snd_soc_read(codec, WM8804_PWRDN) & 0x4;
 156         /* power down the transmitter */
 157         snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x4);
 158         /* set the tx source */
 159         snd_soc_update_bits(codec, WM8804_SPDTX4, 0x40,
 160                             ucontrol->value.integer.value[0] << 6);
 161
 162         if (ucontrol->value.integer.value[0]) {
 163                 /* power down the receiver */
 164                 snd_soc_update_bits(codec, WM8804_PWRDN, 0x2, 0x2);
 165                 /* power up the AIF */
 166                 snd_soc_update_bits(codec, WM8804_PWRDN, 0x10, 0);
 167         } else {
 168                 /* don't power down the AIF -- may be used as an output */
 169                 /* power up the receiver */
 170                 snd_soc_update_bits(codec, WM8804_PWRDN, 0x2, 0);
 171         }
 172
 173         /* restore the transmitter's configuration */
 174         snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, txpwr);
 175
 176         return 0;
 177 }
 178
 179 static int wm8804_volatile(struct snd_soc_codec *codec, unsigned int reg)
 180 {
 181         switch (reg) {
 182         case WM8804_RST_DEVID1:
 183         case WM8804_DEVID2:
 184         case WM8804_DEVREV:
 185         case WM8804_INTSTAT:
 186         case WM8804_SPDSTAT:
 187         case WM8804_RXCHAN1:
 188         case WM8804_RXCHAN2:
 189         case WM8804_RXCHAN3:
 190         case WM8804_RXCHAN4:
 191         case WM8804_RXCHAN5:
 192                 return 1;
 193         default:
 194                 break;
 195         }
 196
 197         return 0;
 198 }
 199
 200 static int wm8804_reset(struct snd_soc_codec *codec)
 201 {
 202         return snd_soc_write(codec, WM8804_RST_DEVID1, 0x0);
 203 }
 204
 205 static int wm8804_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 206 {
 207         struct snd_soc_codec *codec;
 208         u16 format, master, bcp, lrp;
 209
 210         codec = dai->codec;
 211
 212         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 213         case SND_SOC_DAIFMT_I2S:
 214                 format = 0x2;
 215                 break;
 216         case SND_SOC_DAIFMT_RIGHT_J:
 217                 format = 0x0;
 218                 break;
 219         case SND_SOC_DAIFMT_LEFT_J:
 220                 format = 0x1;
 221                 break;
 222         case SND_SOC_DAIFMT_DSP_A:
 223         case SND_SOC_DAIFMT_DSP_B:
 224                 format = 0x3;
 225                 break;
 226         default:
 227                 dev_err(dai->dev, "Unknown dai format\n");
 228                 return -EINVAL;
 229         }
 230
 231         /* set data format */
 232         snd_soc_update_bits(codec, WM8804_AIFTX, 0x3, format);
 233         snd_soc_update_bits(codec, WM8804_AIFRX, 0x3, format);
 234
 235         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 236         case SND_SOC_DAIFMT_CBM_CFM:
 237                 master = 1;
 238                 break;
 239         case SND_SOC_DAIFMT_CBS_CFS:
 240                 master = 0;
 241                 break;
 242         default:
 243                 dev_err(dai->dev, "Unknown master/slave configuration\n");
 244                 return -EINVAL;
 245         }
 246
 247         /* set master/slave mode */
 248         snd_soc_update_bits(codec, WM8804_AIFRX, 0x40, master << 6);
 249
 250         bcp = lrp = 0;
 251         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 252         case SND_SOC_DAIFMT_NB_NF:
 253                 break;
 254         case SND_SOC_DAIFMT_IB_IF:
 255                 bcp = lrp = 1;
 256                 break;
 257         case SND_SOC_DAIFMT_IB_NF:
 258                 bcp = 1;
 259                 break;
 260         case SND_SOC_DAIFMT_NB_IF:
 261                 lrp = 1;
 262                 break;
 263         default:
 264                 dev_err(dai->dev, "Unknown polarity configuration\n");
 265                 return -EINVAL;
 266         }
 267
 268         /* set frame inversion */
 269         snd_soc_update_bits(codec, WM8804_AIFTX, 0x10 | 0x20,
 270                             (bcp << 4) | (lrp << 5));
 271         snd_soc_update_bits(codec, WM8804_AIFRX, 0x10 | 0x20,
 272                             (bcp << 4) | (lrp << 5));
 273         return 0;
 274 }
 275
 276 static int wm8804_hw_params(struct snd_pcm_substream *substream,
 277                             struct snd_pcm_hw_params *params,
 278                             struct snd_soc_dai *dai)
 279 {
 280         struct snd_soc_codec *codec;
 281         u16 blen;
 282
 283         codec = dai->codec;
 284
 285         switch (params_format(params)) {
 286         case SNDRV_PCM_FORMAT_S16_LE:
 287                 blen = 0x0;
 288                 break;
 289         case SNDRV_PCM_FORMAT_S20_3LE:
 290                 blen = 0x1;
 291                 break;
 292         case SNDRV_PCM_FORMAT_S24_LE:
 293                 blen = 0x2;
 294                 break;
 295         default:
 296                 dev_err(dai->dev, "Unsupported word length: %u\n",
 297                         params_format(params));
 298                 return -EINVAL;
 299         }
 300
 301         /* set word length */
 302         snd_soc_update_bits(codec, WM8804_AIFTX, 0xc, blen << 2);
 303         snd_soc_update_bits(codec, WM8804_AIFRX, 0xc, blen << 2);
 304
 305         return 0;
 306 }
 307
 308 struct pll_div {
 309         u32 prescale:1;
 310         u32 mclkdiv:1;
 311         u32 freqmode:2;
 312         u32 n:4;
 313         u32 k:22;
 314 };
 315
 316 /* PLL rate to output rate divisions */
 317 static struct {
 318         unsigned int div;
 319         unsigned int freqmode;
 320         unsigned int mclkdiv;
 321 } post_table[] = {
 322         {  2,  0, 0 },
 323         {  4,  0, 1 },
 324         {  4,  1, 0 },
 325         {  8,  1, 1 },
 326         {  8,  2, 0 },
 327         { 16,  2, 1 },
 328         { 12,  3, 0 },
 329         { 24,  3, 1 }
 330 };
 331
 332 #define FIXED_PLL_SIZE ((1ULL << 22) * 10)
 333 static int pll_factors(struct pll_div *pll_div, unsigned int target,
 334                        unsigned int source)
 335 {
 336         u64 Kpart;
 337         unsigned long int K, Ndiv, Nmod, tmp;
 338         int i;
 339
 340         /*
 341          * Scale the output frequency up; the PLL should run in the
 342          * region of 90-100MHz.
 343          */
 344         for (i = 0; i < ARRAY_SIZE(post_table); i++) {
 345                 tmp = target * post_table[i].div;
 346                 if (tmp >= 90000000 && tmp <= 100000000) {
 347                         pll_div->freqmode = post_table[i].freqmode;
 348                         pll_div->mclkdiv = post_table[i].mclkdiv;
 349                         target *= post_table[i].div;
 350                         break;
 351                 }
 352         }
 353
 354         if (i == ARRAY_SIZE(post_table)) {
 355                 pr_err("%s: Unable to scale output frequency: %uHz\n",
 356                        __func__, target);
 357                 return -EINVAL;
 358         }
 359
 360         pll_div->prescale = 0;
 361         Ndiv = target / source;
 362         if (Ndiv < 5) {
 363                 source >>= 1;
 364                 pll_div->prescale = 1;
 365                 Ndiv = target / source;
 366         }
 367
 368         if (Ndiv < 5 || Ndiv > 13) {
 369                 pr_err("%s: WM8804 N value is not within the recommended range: %lu\n",
 370                        __func__, Ndiv);
 371                 return -EINVAL;
 372         }
 373         pll_div->n = Ndiv;
 374
 375         Nmod = target % source;
 376         Kpart = FIXED_PLL_SIZE * (u64)Nmod;
 377
 378         do_div(Kpart, source);
 379
 380         K = Kpart & 0xffffffff;
 381         if ((K % 10) >= 5)
 382                 K += 5;
 383         K /= 10;
 384         pll_div->k = K;
 385
 386         return 0;
 387 }
 388
 389 static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
 390                           int source, unsigned int freq_in,
 391                           unsigned int freq_out)
 392 {
 393         struct snd_soc_codec *codec;
 394
 395         codec = dai->codec;
 396         if (!freq_in || !freq_out) {
 397                 /* disable the PLL */
 398                 snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
 399                 return 0;
 400         } else {
 401                 int ret;
 402                 struct pll_div pll_div;
 403
 404                 ret = pll_factors(&pll_div, freq_out, freq_in);
 405                 if (ret)
 406                         return ret;
 407
 408                 /* power down the PLL before reprogramming it */
 409                 snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
 410
 411                 if (!freq_in || !freq_out)
 412                         return 0;
 413
 414                 /* set PLLN and PRESCALE */
 415                 snd_soc_update_bits(codec, WM8804_PLL4, 0xf | 0x10,
 416                                     pll_div.n | (pll_div.prescale << 4));
 417                 /* set mclkdiv and freqmode */
 418                 snd_soc_update_bits(codec, WM8804_PLL5, 0x3 | 0x8,
 419                                     pll_div.freqmode | (pll_div.mclkdiv << 3));
 420                 /* set PLLK */
 421                 snd_soc_write(codec, WM8804_PLL1, pll_div.k & 0xff);
 422                 snd_soc_write(codec, WM8804_PLL2, (pll_div.k >> 8) & 0xff);
 423                 snd_soc_write(codec, WM8804_PLL3, pll_div.k >> 16);
 424
 425                 /* power up the PLL */
 426                 snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0);
 427         }
 428
 429         return 0;
 430 }
 431
 432 static int wm8804_set_sysclk(struct snd_soc_dai *dai,
 433                              int clk_id, unsigned int freq, int dir)
 434 {
 435         struct snd_soc_codec *codec;
 436
 437         codec = dai->codec;
 438
 439         switch (clk_id) {
 440         case WM8804_TX_CLKSRC_MCLK:
 441                 if ((freq >= 10000000 && freq <= 14400000)
 442                                 || (freq >= 16280000 && freq <= 27000000))
 443                         snd_soc_update_bits(codec, WM8804_PLL6, 0x80, 0x80);
 444                 else {
 445                         dev_err(dai->dev, "OSCCLOCK is not within the "
 446                                 "recommended range: %uHz\n", freq);
 447                         return -EINVAL;
 448                 }
 449                 break;
 450         case WM8804_TX_CLKSRC_PLL:
 451                 snd_soc_update_bits(codec, WM8804_PLL6, 0x80, 0);
 452                 break;
 453         case WM8804_CLKOUT_SRC_CLK1:
 454                 snd_soc_update_bits(codec, WM8804_PLL6, 0x8, 0);
 455                 break;
 456         case WM8804_CLKOUT_SRC_OSCCLK:
 457                 snd_soc_update_bits(codec, WM8804_PLL6, 0x8, 0x8);
 458                 break;
 459         default:
 460                 dev_err(dai->dev, "Unknown clock source: %d\n", clk_id);
 461                 return -EINVAL;
 462         }
 463
 464         return 0;
 465 }
 466
 467 static int wm8804_set_clkdiv(struct snd_soc_dai *dai,
 468                              int div_id, int div)
 469 {
 470         struct snd_soc_codec *codec;
 471
 472         codec = dai->codec;
 473         switch (div_id) {
 474         case WM8804_CLKOUT_DIV:
 475                 snd_soc_update_bits(codec, WM8804_PLL5, 0x30,
 476                                     (div & 0x3) << 4);
 477                 break;
 478         default:
 479                 dev_err(dai->dev, "Unknown clock divider: %d\n", div_id);
 480                 return -EINVAL;
 481         }
 482         return 0;
 483 }
 484
 485 static void wm8804_sync_cache(struct snd_soc_codec *codec)
 486 {
 487         short i;
 488         u8 *cache;
 489
 490         if (!codec->cache_sync)
 491                 return;
 492
 493         codec->cache_only = 0;
 494         cache = codec->reg_cache;
 495         for (i = 0; i < codec->driver->reg_cache_size; i++) {
 496                 if (i == WM8804_RST_DEVID1 || cache[i] == wm8804_reg_defs[i])
 497                         continue;
 498                 snd_soc_write(codec, i, cache[i]);
 499         }
 500         codec->cache_sync = 0;
 501 }
 502
 503 static int wm8804_set_bias_level(struct snd_soc_codec *codec,
 504                                  enum snd_soc_bias_level level)
 505 {
 506         int ret;
 507         struct wm8804_priv *wm8804;
 508
 509         wm8804 = snd_soc_codec_get_drvdata(codec);
 510         switch (level) {
 511         case SND_SOC_BIAS_ON:
 512                 break;
 513         case SND_SOC_BIAS_PREPARE:
 514                 /* power up the OSC and the PLL */
 515                 snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
 516                 break;
 517         case SND_SOC_BIAS_STANDBY:
 518                 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
 519                         ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies),
 520                                                     wm8804->supplies);
 521                         if (ret) {
 522                                 dev_err(codec->dev,
 523                                         "Failed to enable supplies: %d\n",
 524                                         ret);
 525                                 return ret;
 526                         }
 527                         wm8804_sync_cache(codec);
 528                 }
 529                 /* power down the OSC and the PLL */
 530                 snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0x9);
 531                 break;
 532         case SND_SOC_BIAS_OFF:
 533                 /* power down the OSC and the PLL */
 534                 snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0x9);
 535                 regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies),
 536                                        wm8804->supplies);
 537                 break;
 538         }
 539
 540         codec->dapm.bias_level = level;
 541         return 0;
 542 }
 543
 544 #ifdef CONFIG_PM
 545 static int wm8804_suspend(struct snd_soc_codec *codec, pm_message_t state)
 546 {
 547         wm8804_set_bias_level(codec, SND_SOC_BIAS_OFF);
 548         return 0;
 549 }
 550
 551 static int wm8804_resume(struct snd_soc_codec *codec)
 552 {
 553         wm8804_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 554         return 0;
 555 }
 556 #else
 557 #define wm8804_suspend NULL
 558 #define wm8804_resume NULL
 559 #endif
 560
 561 static int wm8804_remove(struct snd_soc_codec *codec)
 562 {
 563         struct wm8804_priv *wm8804;
 564         int i;
 565
 566         wm8804 = snd_soc_codec_get_drvdata(codec);
 567         wm8804_set_bias_level(codec, SND_SOC_BIAS_OFF);
 568
 569         for (i = 0; i < ARRAY_SIZE(wm8804->supplies); ++i)
 570                 regulator_unregister_notifier(wm8804->supplies[i].consumer,
 571                                               &wm8804->disable_nb[i]);
 572         regulator_bulk_free(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
 573         return 0;
 574 }
 575
 576 static int wm8804_probe(struct snd_soc_codec *codec)
 577 {
 578         struct wm8804_priv *wm8804;
 579         int i, id1, id2, ret;
 580
 581         wm8804 = snd_soc_codec_get_drvdata(codec);
 582         wm8804->codec = codec;
 583
 584         codec->dapm.idle_bias_off = 1;
 585
 586         ret = snd_soc_codec_set_cache_io(codec, 8, 8, wm8804->control_type);
 587         if (ret < 0) {
 588                 dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
 589                 return ret;
 590         }
 591
 592         for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++)
 593                 wm8804->supplies[i].supply = wm8804_supply_names[i];
 594
 595         ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8804->supplies),
 596                                  wm8804->supplies);
 597         if (ret) {
 598                 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
 599                 return ret;
 600         }
 601
 602         wm8804->disable_nb[0].notifier_call = wm8804_regulator_event_0;
 603         wm8804->disable_nb[1].notifier_call = wm8804_regulator_event_1;
 604
 605         /* This should really be moved into the regulator core */
 606         for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++) {
 607                 ret = regulator_register_notifier(wm8804->supplies[i].consumer,
 608                                                   &wm8804->disable_nb[i]);
 609                 if (ret != 0) {
 610                         dev_err(codec->dev,
 611                                 "Failed to register regulator notifier: %d\n",
 612                                 ret);
 613                 }
 614         }
 615
 616         ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies),
 617                                     wm8804->supplies);
 618         if (ret) {
 619                 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
 620                 goto err_reg_get;
 621         }
 622
 623         id1 = snd_soc_read(codec, WM8804_RST_DEVID1);
 624         if (id1 < 0) {
 625                 dev_err(codec->dev, "Failed to read device ID: %d\n", id1);
 626                 ret = id1;
 627                 goto err_reg_enable;
 628         }
 629
 630         id2 = snd_soc_read(codec, WM8804_DEVID2);
 631         if (id2 < 0) {
 632                 dev_err(codec->dev, "Failed to read device ID: %d\n", id2);
 633                 ret = id2;
 634                 goto err_reg_enable;
 635         }
 636
 637         id2 = (id2 << 8) | id1;
 638
 639         if (id2 != ((wm8804_reg_defs[WM8804_DEVID2] << 8)
 640                         | wm8804_reg_defs[WM8804_RST_DEVID1])) {
 641                 dev_err(codec->dev, "Invalid device ID: %#x\n", id2);
 642                 ret = -EINVAL;
 643                 goto err_reg_enable;
 644         }
 645
 646         ret = snd_soc_read(codec, WM8804_DEVREV);
 647         if (ret < 0) {
 648                 dev_err(codec->dev, "Failed to read device revision: %d\n",
 649                         ret);
 650                 goto err_reg_enable;
 651         }
 652         dev_info(codec->dev, "revision %c\n", ret + 'A');
 653
 654         ret = wm8804_reset(codec);
 655         if (ret < 0) {
 656                 dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
 657                 goto err_reg_enable;
 658         }
 659
 660         wm8804_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 661
 662         snd_soc_add_controls(codec, wm8804_snd_controls,
 663                              ARRAY_SIZE(wm8804_snd_controls));
 664         return 0;
 665
 666 err_reg_enable:
 667         regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
 668 err_reg_get:
 669         regulator_bulk_free(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
 670         return ret;
 671 }
 672
 673 static struct snd_soc_dai_ops wm8804_dai_ops = {
 674         .hw_params = wm8804_hw_params,
 675         .set_fmt = wm8804_set_fmt,
 676         .set_sysclk = wm8804_set_sysclk,
 677         .set_clkdiv = wm8804_set_clkdiv,
 678         .set_pll = wm8804_set_pll
 679 };
 680
 681 #define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
 682                         SNDRV_PCM_FMTBIT_S24_LE)
 683
 684 #define WM8804_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
 685                       SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
 686                       SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
 687                       SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
 688
 689 static struct snd_soc_dai_driver wm8804_dai = {
 690         .name = "wm8804-spdif",
 691         .playback = {
 692                 .stream_name = "Playback",
 693                 .channels_min = 2,
 694                 .channels_max = 2,
 695                 .rates = WM8804_RATES,
 696                 .formats = WM8804_FORMATS,
 697         },
 698         .capture = {
 699                 .stream_name = "Capture",
 700                 .channels_min = 2,
 701                 .channels_max = 2,
 702                 .rates = WM8804_RATES,
 703                 .formats = WM8804_FORMATS,
 704         },
 705         .ops = &wm8804_dai_ops,
 706         .symmetric_rates = 1
 707 };
 708
 709 static struct snd_soc_codec_driver soc_codec_dev_wm8804 = {
 710         .probe = wm8804_probe,
 711         .remove = wm8804_remove,
 712         .suspend = wm8804_suspend,
 713         .resume = wm8804_resume,
 714         .set_bias_level = wm8804_set_bias_level,
 715         .reg_cache_size = ARRAY_SIZE(wm8804_reg_defs),
 716         .reg_word_size = sizeof(u8),
 717         .reg_cache_default = wm8804_reg_defs,
 718         .volatile_register = wm8804_volatile
 719 };
 720
 721 static const struct of_device_id wm8804_of_match[] = {
 722         { .compatible = "wlf,wm8804", },
 723         { }
 724 };
 725 MODULE_DEVICE_TABLE(of, wm8804_of_match);
 726
 727 #if defined(CONFIG_SPI_MASTER)
 728 static int __devinit wm8804_spi_probe(struct spi_device *spi)
 729 {
 730         struct wm8804_priv *wm8804;
 731         int ret;
 732
 733         wm8804 = kzalloc(sizeof *wm8804, GFP_KERNEL);
 734         if (!wm8804)
 735                 return -ENOMEM;
 736
 737         wm8804->control_type = SND_SOC_SPI;
 738         spi_set_drvdata(spi, wm8804);
 739
 740         ret = snd_soc_register_codec(&spi->dev,
 741                                      &soc_codec_dev_wm8804, &wm8804_dai, 1);
 742         if (ret < 0)
 743                 kfree(wm8804);
 744         return ret;
 745 }
 746
 747 static int __devexit wm8804_spi_remove(struct spi_device *spi)
 748 {
 749         snd_soc_unregister_codec(&spi->dev);
 750         kfree(spi_get_drvdata(spi));
 751         return 0;
 752 }
 753
 754 static struct spi_driver wm8804_spi_driver = {
 755         .driver = {
 756                 .name = "wm8804",
 757                 .owner = THIS_MODULE,
 758                 .of_match_table = wm8804_of_match,
 759         },
 760         .probe = wm8804_spi_probe,
 761         .remove = __devexit_p(wm8804_spi_remove)
 762 };
 763 #endif
 764
 765 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 766 static __devinit int wm8804_i2c_probe(struct i2c_client *i2c,
 767                                       const struct i2c_device_id *id)
 768 {
 769         struct wm8804_priv *wm8804;
 770         int ret;
 771
 772         wm8804 = kzalloc(sizeof *wm8804, GFP_KERNEL);
 773         if (!wm8804)
 774                 return -ENOMEM;
 775
 776         wm8804->control_type = SND_SOC_I2C;
 777         i2c_set_clientdata(i2c, wm8804);
 778
 779         ret = snd_soc_register_codec(&i2c->dev,
 780                                      &soc_codec_dev_wm8804, &wm8804_dai, 1);
 781         if (ret < 0)
 782                 kfree(wm8804);
 783         return ret;
 784 }
 785
 786 static __devexit int wm8804_i2c_remove(struct i2c_client *client)
 787 {
 788         snd_soc_unregister_codec(&client->dev);
 789         kfree(i2c_get_clientdata(client));
 790         return 0;
 791 }
 792
 793 static const struct i2c_device_id wm8804_i2c_id[] = {
 794         { "wm8804", 0 },
 795         { }
 796 };
 797 MODULE_DEVICE_TABLE(i2c, wm8804_i2c_id);
 798
 799 static struct i2c_driver wm8804_i2c_driver = {
 800         .driver = {
 801                 .name = "wm8804",
 802                 .owner = THIS_MODULE,
 803                 .of_match_table = wm8804_of_match,
 804         },
 805         .probe = wm8804_i2c_probe,
 806         .remove = __devexit_p(wm8804_i2c_remove),
 807         .id_table = wm8804_i2c_id
 808 };
 809 #endif
 810
 811 static int __init wm8804_modinit(void)
 812 {
 813         int ret = 0;
 814
 815 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 816         ret = i2c_add_driver(&wm8804_i2c_driver);
 817         if (ret) {
 818                 printk(KERN_ERR "Failed to register wm8804 I2C driver: %d\n",
 819                        ret);
 820         }
 821 #endif
 822 #if defined(CONFIG_SPI_MASTER)
 823         ret = spi_register_driver(&wm8804_spi_driver);
 824         if (ret != 0) {
 825                 printk(KERN_ERR "Failed to register wm8804 SPI driver: %d\n",
 826                        ret);
 827         }
 828 #endif
 829         return ret;
 830 }
 831 module_init(wm8804_modinit);
 832
 833 static void __exit wm8804_exit(void)
 834 {
 835 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 836         i2c_del_driver(&wm8804_i2c_driver);
 837 #endif
 838 #if defined(CONFIG_SPI_MASTER)
 839         spi_unregister_driver(&wm8804_spi_driver);
 840 #endif
 841 }
 842 module_exit(wm8804_exit);
 843
 844 MODULE_DESCRIPTION("ASoC WM8804 driver");
 845 MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>");
 846 MODULE_LICENSE("GPL");