sound/soc/codecs/wm8350.c

   1 /*
   2  * wm8350.c -- WM8350 ALSA SoC audio driver
   3  *
   4  * Copyright (C) 2007, 2008 Wolfson Microelectronics PLC.
   5  *
   6  * Author: Liam Girdwood <lrg@slimlogic.co.uk>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/init.h>
  16 #include <linux/slab.h>
  17 #include <linux/delay.h>
  18 #include <linux/pm.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/mfd/wm8350/audio.h>
  21 #include <linux/mfd/wm8350/core.h>
  22 #include <linux/regulator/consumer.h>
  23 #include <sound/core.h>
  24 #include <sound/pcm.h>
  25 #include <sound/pcm_params.h>
  26 #include <sound/soc.h>
  27 #include <sound/soc-dapm.h>
  28 #include <sound/initval.h>
  29 #include <sound/tlv.h>
  30
  31 #include "wm8350.h"
  32
  33 #define WM8350_OUTn_0dB 0x39
  34
  35 #define WM8350_RAMP_NONE        0
  36 #define WM8350_RAMP_UP          1
  37 #define WM8350_RAMP_DOWN        2
  38
  39 /* We only include the analogue supplies here; the digital supplies
  40  * need to be available well before this driver can be probed.
  41  */
  42 static const char *supply_names[] = {
  43         "AVDD",
  44         "HPVDD",
  45 };
  46
  47 struct wm8350_output {
  48         u16 active;
  49         u16 left_vol;
  50         u16 right_vol;
  51         u16 ramp;
  52         u16 mute;
  53 };
  54
  55 struct wm8350_jack_data {
  56         struct snd_soc_jack *jack;
  57         int report;
  58         int short_report;
  59 };
  60
  61 struct wm8350_data {
  62         struct snd_soc_codec codec;
  63         struct wm8350_output out1;
  64         struct wm8350_output out2;
  65         struct wm8350_jack_data hpl;
  66         struct wm8350_jack_data hpr;
  67         struct wm8350_jack_data mic;
  68         struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
  69         int fll_freq_out;
  70         int fll_freq_in;
  71 };
  72
  73 static unsigned int wm8350_codec_cache_read(struct snd_soc_codec *codec,
  74                                             unsigned int reg)
  75 {
  76         struct wm8350 *wm8350 = codec->control_data;
  77         return wm8350->reg_cache[reg];
  78 }
  79
  80 static unsigned int wm8350_codec_read(struct snd_soc_codec *codec,
  81                                       unsigned int reg)
  82 {
  83         struct wm8350 *wm8350 = codec->control_data;
  84         return wm8350_reg_read(wm8350, reg);
  85 }
  86
  87 static int wm8350_codec_write(struct snd_soc_codec *codec, unsigned int reg,
  88                               unsigned int value)
  89 {
  90         struct wm8350 *wm8350 = codec->control_data;
  91         return wm8350_reg_write(wm8350, reg, value);
  92 }
  93
  94 /*
  95  * Ramp OUT1 PGA volume to minimise pops at stream startup and shutdown.
  96  */
  97 static inline int wm8350_out1_ramp_step(struct snd_soc_codec *codec)
  98 {
  99         struct wm8350_data *wm8350_data = snd_soc_codec_get_drvdata(codec);
 100         struct wm8350_output *out1 = &wm8350_data->out1;
 101         struct wm8350 *wm8350 = codec->control_data;
 102         int left_complete = 0, right_complete = 0;
 103         u16 reg, val;
 104
 105         /* left channel */
 106         reg = wm8350_reg_read(wm8350, WM8350_LOUT1_VOLUME);
 107         val = (reg & WM8350_OUT1L_VOL_MASK) >> WM8350_OUT1L_VOL_SHIFT;
 108
 109         if (out1->ramp == WM8350_RAMP_UP) {
 110                 /* ramp step up */
 111                 if (val < out1->left_vol) {
 112                         val++;
 113                         reg &= ~WM8350_OUT1L_VOL_MASK;
 114                         wm8350_reg_write(wm8350, WM8350_LOUT1_VOLUME,
 115                                          reg | (val << WM8350_OUT1L_VOL_SHIFT));
 116                 } else
 117                         left_complete = 1;
 118         } else if (out1->ramp == WM8350_RAMP_DOWN) {
 119                 /* ramp step down */
 120                 if (val > 0) {
 121                         val--;
 122                         reg &= ~WM8350_OUT1L_VOL_MASK;
 123                         wm8350_reg_write(wm8350, WM8350_LOUT1_VOLUME,
 124                                          reg | (val << WM8350_OUT1L_VOL_SHIFT));
 125                 } else
 126                         left_complete = 1;
 127         } else
 128                 return 1;
 129
 130         /* right channel */
 131         reg = wm8350_reg_read(wm8350, WM8350_ROUT1_VOLUME);
 132         val = (reg & WM8350_OUT1R_VOL_MASK) >> WM8350_OUT1R_VOL_SHIFT;
 133         if (out1->ramp == WM8350_RAMP_UP) {
 134                 /* ramp step up */
 135                 if (val < out1->right_vol) {
 136                         val++;
 137                         reg &= ~WM8350_OUT1R_VOL_MASK;
 138                         wm8350_reg_write(wm8350, WM8350_ROUT1_VOLUME,
 139                                          reg | (val << WM8350_OUT1R_VOL_SHIFT));
 140                 } else
 141                         right_complete = 1;
 142         } else if (out1->ramp == WM8350_RAMP_DOWN) {
 143                 /* ramp step down */
 144                 if (val > 0) {
 145                         val--;
 146                         reg &= ~WM8350_OUT1R_VOL_MASK;
 147                         wm8350_reg_write(wm8350, WM8350_ROUT1_VOLUME,
 148                                          reg | (val << WM8350_OUT1R_VOL_SHIFT));
 149                 } else
 150                         right_complete = 1;
 151         }
 152
 153         /* only hit the update bit if either volume has changed this step */
 154         if (!left_complete || !right_complete)
 155                 wm8350_set_bits(wm8350, WM8350_LOUT1_VOLUME, WM8350_OUT1_VU);
 156
 157         return left_complete & right_complete;
 158 }
 159
 160 /*
 161  * Ramp OUT2 PGA volume to minimise pops at stream startup and shutdown.
 162  */
 163 static inline int wm8350_out2_ramp_step(struct snd_soc_codec *codec)
 164 {
 165         struct wm8350_data *wm8350_data = snd_soc_codec_get_drvdata(codec);
 166         struct wm8350_output *out2 = &wm8350_data->out2;
 167         struct wm8350 *wm8350 = codec->control_data;
 168         int left_complete = 0, right_complete = 0;
 169         u16 reg, val;
 170
 171         /* left channel */
 172         reg = wm8350_reg_read(wm8350, WM8350_LOUT2_VOLUME);
 173         val = (reg & WM8350_OUT2L_VOL_MASK) >> WM8350_OUT1L_VOL_SHIFT;
 174         if (out2->ramp == WM8350_RAMP_UP) {
 175                 /* ramp step up */
 176                 if (val < out2->left_vol) {
 177                         val++;
 178                         reg &= ~WM8350_OUT2L_VOL_MASK;
 179                         wm8350_reg_write(wm8350, WM8350_LOUT2_VOLUME,
 180                                          reg | (val << WM8350_OUT1L_VOL_SHIFT));
 181                 } else
 182                         left_complete = 1;
 183         } else if (out2->ramp == WM8350_RAMP_DOWN) {
 184                 /* ramp step down */
 185                 if (val > 0) {
 186                         val--;
 187                         reg &= ~WM8350_OUT2L_VOL_MASK;
 188                         wm8350_reg_write(wm8350, WM8350_LOUT2_VOLUME,
 189                                          reg | (val << WM8350_OUT1L_VOL_SHIFT));
 190                 } else
 191                         left_complete = 1;
 192         } else
 193                 return 1;
 194
 195         /* right channel */
 196         reg = wm8350_reg_read(wm8350, WM8350_ROUT2_VOLUME);
 197         val = (reg & WM8350_OUT2R_VOL_MASK) >> WM8350_OUT1R_VOL_SHIFT;
 198         if (out2->ramp == WM8350_RAMP_UP) {
 199                 /* ramp step up */
 200                 if (val < out2->right_vol) {
 201                         val++;
 202                         reg &= ~WM8350_OUT2R_VOL_MASK;
 203                         wm8350_reg_write(wm8350, WM8350_ROUT2_VOLUME,
 204                                          reg | (val << WM8350_OUT1R_VOL_SHIFT));
 205                 } else
 206                         right_complete = 1;
 207         } else if (out2->ramp == WM8350_RAMP_DOWN) {
 208                 /* ramp step down */
 209                 if (val > 0) {
 210                         val--;
 211                         reg &= ~WM8350_OUT2R_VOL_MASK;
 212                         wm8350_reg_write(wm8350, WM8350_ROUT2_VOLUME,
 213                                          reg | (val << WM8350_OUT1R_VOL_SHIFT));
 214                 } else
 215                         right_complete = 1;
 216         }
 217
 218         /* only hit the update bit if either volume has changed this step */
 219         if (!left_complete || !right_complete)
 220                 wm8350_set_bits(wm8350, WM8350_LOUT2_VOLUME, WM8350_OUT2_VU);
 221
 222         return left_complete & right_complete;
 223 }
 224
 225 /*
 226  * This work ramps both output PGAs at stream start/stop time to
 227  * minimise pop associated with DAPM power switching.
 228  * It's best to enable Zero Cross when ramping occurs to minimise any
 229  * zipper noises.
 230  */
 231 static void wm8350_pga_work(struct work_struct *work)
 232 {
 233         struct snd_soc_codec *codec =
 234             container_of(work, struct snd_soc_codec, delayed_work.work);
 235         struct wm8350_data *wm8350_data = snd_soc_codec_get_drvdata(codec);
 236         struct wm8350_output *out1 = &wm8350_data->out1,
 237             *out2 = &wm8350_data->out2;
 238         int i, out1_complete, out2_complete;
 239
 240         /* do we need to ramp at all ? */
 241         if (out1->ramp == WM8350_RAMP_NONE && out2->ramp == WM8350_RAMP_NONE)
 242                 return;
 243
 244         /* PGA volumes have 6 bits of resolution to ramp */
 245         for (i = 0; i <= 63; i++) {
 246                 out1_complete = 1, out2_complete = 1;
 247                 if (out1->ramp != WM8350_RAMP_NONE)
 248                         out1_complete = wm8350_out1_ramp_step(codec);
 249                 if (out2->ramp != WM8350_RAMP_NONE)
 250                         out2_complete = wm8350_out2_ramp_step(codec);
 251
 252                 /* ramp finished ? */
 253                 if (out1_complete && out2_complete)
 254                         break;
 255
 256                 /* we need to delay longer on the up ramp */
 257                 if (out1->ramp == WM8350_RAMP_UP ||
 258                     out2->ramp == WM8350_RAMP_UP) {
 259                         /* delay is longer over 0dB as increases are larger */
 260                         if (i >= WM8350_OUTn_0dB)
 261                                 schedule_timeout_interruptible(msecs_to_jiffies
 262                                                                (2));
 263                         else
 264                                 schedule_timeout_interruptible(msecs_to_jiffies
 265                                                                (1));
 266                 } else
 267                         udelay(50);     /* doesn't matter if we delay longer */
 268         }
 269
 270         out1->ramp = WM8350_RAMP_NONE;
 271         out2->ramp = WM8350_RAMP_NONE;
 272 }
 273
 274 /*
 275  * WM8350 Controls
 276  */
 277
 278 static int pga_event(struct snd_soc_dapm_widget *w,
 279                      struct snd_kcontrol *kcontrol, int event)
 280 {
 281         struct snd_soc_codec *codec = w->codec;
 282         struct wm8350_data *wm8350_data = snd_soc_codec_get_drvdata(codec);
 283         struct wm8350_output *out;
 284
 285         switch (w->shift) {
 286         case 0:
 287         case 1:
 288                 out = &wm8350_data->out1;
 289                 break;
 290         case 2:
 291         case 3:
 292                 out = &wm8350_data->out2;
 293                 break;
 294
 295         default:
 296                 BUG();
 297                 return -1;
 298         }
 299
 300         switch (event) {
 301         case SND_SOC_DAPM_POST_PMU:
 302                 out->ramp = WM8350_RAMP_UP;
 303                 out->active = 1;
 304
 305                 if (!delayed_work_pending(&codec->delayed_work))
 306                         schedule_delayed_work(&codec->delayed_work,
 307                                               msecs_to_jiffies(1));
 308                 break;
 309
 310         case SND_SOC_DAPM_PRE_PMD:
 311                 out->ramp = WM8350_RAMP_DOWN;
 312                 out->active = 0;
 313
 314                 if (!delayed_work_pending(&codec->delayed_work))
 315                         schedule_delayed_work(&codec->delayed_work,
 316                                               msecs_to_jiffies(1));
 317                 break;
 318         }
 319
 320         return 0;
 321 }
 322
 323 static int wm8350_put_volsw_2r_vu(struct snd_kcontrol *kcontrol,
 324                                   struct snd_ctl_elem_value *ucontrol)
 325 {
 326         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 327         struct wm8350_data *wm8350_priv = snd_soc_codec_get_drvdata(codec);
 328         struct wm8350_output *out = NULL;
 329         struct soc_mixer_control *mc =
 330                 (struct soc_mixer_control *)kcontrol->private_value;
 331         int ret;
 332         unsigned int reg = mc->reg;
 333         u16 val;
 334
 335         /* For OUT1 and OUT2 we shadow the values and only actually write
 336          * them out when active in order to ensure the amplifier comes on
 337          * as quietly as possible. */
 338         switch (reg) {
 339         case WM8350_LOUT1_VOLUME:
 340                 out = &wm8350_priv->out1;
 341                 break;
 342         case WM8350_LOUT2_VOLUME:
 343                 out = &wm8350_priv->out2;
 344                 break;
 345         default:
 346                 break;
 347         }
 348
 349         if (out) {
 350                 out->left_vol = ucontrol->value.integer.value[0];
 351                 out->right_vol = ucontrol->value.integer.value[1];
 352                 if (!out->active)
 353                         return 1;
 354         }
 355
 356         ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
 357         if (ret < 0)
 358                 return ret;
 359
 360         /* now hit the volume update bits (always bit 8) */
 361         val = wm8350_codec_read(codec, reg);
 362         wm8350_codec_write(codec, reg, val | WM8350_OUT1_VU);
 363         return 1;
 364 }
 365
 366 static int wm8350_get_volsw_2r(struct snd_kcontrol *kcontrol,
 367                                struct snd_ctl_elem_value *ucontrol)
 368 {
 369         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 370         struct wm8350_data *wm8350_priv = snd_soc_codec_get_drvdata(codec);
 371         struct wm8350_output *out1 = &wm8350_priv->out1;
 372         struct wm8350_output *out2 = &wm8350_priv->out2;
 373         struct soc_mixer_control *mc =
 374                 (struct soc_mixer_control *)kcontrol->private_value;
 375         unsigned int reg = mc->reg;
 376
 377         /* If these are cached registers use the cache */
 378         switch (reg) {
 379         case WM8350_LOUT1_VOLUME:
 380                 ucontrol->value.integer.value[0] = out1->left_vol;
 381                 ucontrol->value.integer.value[1] = out1->right_vol;
 382                 return 0;
 383
 384         case WM8350_LOUT2_VOLUME:
 385                 ucontrol->value.integer.value[0] = out2->left_vol;
 386                 ucontrol->value.integer.value[1] = out2->right_vol;
 387                 return 0;
 388
 389         default:
 390                 break;
 391         }
 392
 393         return snd_soc_get_volsw_2r(kcontrol, ucontrol);
 394 }
 395
 396 /* double control with volume update */
 397 #define SOC_WM8350_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, \
 398                                 xinvert, tlv_array) \
 399 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
 400         .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
 401                 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
 402                 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
 403         .tlv.p = (tlv_array), \
 404         .info = snd_soc_info_volsw_2r, \
 405         .get = wm8350_get_volsw_2r, .put = wm8350_put_volsw_2r_vu, \
 406         .private_value = (unsigned long)&(struct soc_mixer_control) \
 407                 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
 408                  .rshift = xshift, .max = xmax, .invert = xinvert}, }
 409
 410 static const char *wm8350_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" };
 411 static const char *wm8350_pol[] = { "Normal", "Inv R", "Inv L", "Inv L & R" };
 412 static const char *wm8350_dacmutem[] = { "Normal", "Soft" };
 413 static const char *wm8350_dacmutes[] = { "Fast", "Slow" };
 414 static const char *wm8350_adcfilter[] = { "None", "High Pass" };
 415 static const char *wm8350_adchp[] = { "44.1kHz", "8kHz", "16kHz", "32kHz" };
 416 static const char *wm8350_lr[] = { "Left", "Right" };
 417
 418 static const struct soc_enum wm8350_enum[] = {
 419         SOC_ENUM_SINGLE(WM8350_DAC_CONTROL, 4, 4, wm8350_deemp),
 420         SOC_ENUM_SINGLE(WM8350_DAC_CONTROL, 0, 4, wm8350_pol),
 421         SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME, 14, 2, wm8350_dacmutem),
 422         SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME, 13, 2, wm8350_dacmutes),
 423         SOC_ENUM_SINGLE(WM8350_ADC_CONTROL, 15, 2, wm8350_adcfilter),
 424         SOC_ENUM_SINGLE(WM8350_ADC_CONTROL, 8, 4, wm8350_adchp),
 425         SOC_ENUM_SINGLE(WM8350_ADC_CONTROL, 0, 4, wm8350_pol),
 426         SOC_ENUM_SINGLE(WM8350_INPUT_MIXER_VOLUME, 15, 2, wm8350_lr),
 427 };
 428
 429 static DECLARE_TLV_DB_SCALE(pre_amp_tlv, -1200, 3525, 0);
 430 static DECLARE_TLV_DB_SCALE(out_pga_tlv, -5700, 600, 0);
 431 static DECLARE_TLV_DB_SCALE(dac_pcm_tlv, -7163, 36, 1);
 432 static DECLARE_TLV_DB_SCALE(adc_pcm_tlv, -12700, 50, 1);
 433 static DECLARE_TLV_DB_SCALE(out_mix_tlv, -1500, 300, 1);
 434
 435 static const unsigned int capture_sd_tlv[] = {
 436         TLV_DB_RANGE_HEAD(2),
 437         0, 12, TLV_DB_SCALE_ITEM(-3600, 300, 1),
 438         13, 15, TLV_DB_SCALE_ITEM(0, 0, 0),
 439 };
 440
 441 static const struct snd_kcontrol_new wm8350_snd_controls[] = {
 442         SOC_ENUM("Playback Deemphasis", wm8350_enum[0]),
 443         SOC_ENUM("Playback DAC Inversion", wm8350_enum[1]),
 444         SOC_WM8350_DOUBLE_R_TLV("Playback PCM Volume",
 445                                 WM8350_DAC_DIGITAL_VOLUME_L,
 446                                 WM8350_DAC_DIGITAL_VOLUME_R,
 447                                 0, 255, 0, dac_pcm_tlv),
 448         SOC_ENUM("Playback PCM Mute Function", wm8350_enum[2]),
 449         SOC_ENUM("Playback PCM Mute Speed", wm8350_enum[3]),
 450         SOC_ENUM("Capture PCM Filter", wm8350_enum[4]),
 451         SOC_ENUM("Capture PCM HP Filter", wm8350_enum[5]),
 452         SOC_ENUM("Capture ADC Inversion", wm8350_enum[6]),
 453         SOC_WM8350_DOUBLE_R_TLV("Capture PCM Volume",
 454                                 WM8350_ADC_DIGITAL_VOLUME_L,
 455                                 WM8350_ADC_DIGITAL_VOLUME_R,
 456                                 0, 255, 0, adc_pcm_tlv),
 457         SOC_DOUBLE_TLV("Capture Sidetone Volume",
 458                        WM8350_ADC_DIVIDER,
 459                        8, 4, 15, 1, capture_sd_tlv),
 460         SOC_WM8350_DOUBLE_R_TLV("Capture Volume",
 461                                 WM8350_LEFT_INPUT_VOLUME,
 462                                 WM8350_RIGHT_INPUT_VOLUME,
 463                                 2, 63, 0, pre_amp_tlv),
 464         SOC_DOUBLE_R("Capture ZC Switch",
 465                      WM8350_LEFT_INPUT_VOLUME,
 466                      WM8350_RIGHT_INPUT_VOLUME, 13, 1, 0),
 467         SOC_SINGLE_TLV("Left Input Left Sidetone Volume",
 468                        WM8350_OUTPUT_LEFT_MIXER_VOLUME, 1, 7, 0, out_mix_tlv),
 469         SOC_SINGLE_TLV("Left Input Right Sidetone Volume",
 470                        WM8350_OUTPUT_LEFT_MIXER_VOLUME,
 471                        5, 7, 0, out_mix_tlv),
 472         SOC_SINGLE_TLV("Left Input Bypass Volume",
 473                        WM8350_OUTPUT_LEFT_MIXER_VOLUME,
 474                        9, 7, 0, out_mix_tlv),
 475         SOC_SINGLE_TLV("Right Input Left Sidetone Volume",
 476                        WM8350_OUTPUT_RIGHT_MIXER_VOLUME,
 477                        1, 7, 0, out_mix_tlv),
 478         SOC_SINGLE_TLV("Right Input Right Sidetone Volume",
 479                        WM8350_OUTPUT_RIGHT_MIXER_VOLUME,
 480                        5, 7, 0, out_mix_tlv),
 481         SOC_SINGLE_TLV("Right Input Bypass Volume",
 482                        WM8350_OUTPUT_RIGHT_MIXER_VOLUME,
 483                        13, 7, 0, out_mix_tlv),
 484         SOC_SINGLE("Left Input Mixer +20dB Switch",
 485                    WM8350_INPUT_MIXER_VOLUME_L, 0, 1, 0),
 486         SOC_SINGLE("Right Input Mixer +20dB Switch",
 487                    WM8350_INPUT_MIXER_VOLUME_R, 0, 1, 0),
 488         SOC_SINGLE_TLV("Out4 Capture Volume",
 489                        WM8350_INPUT_MIXER_VOLUME,
 490                        1, 7, 0, out_mix_tlv),
 491         SOC_WM8350_DOUBLE_R_TLV("Out1 Playback Volume",
 492                                 WM8350_LOUT1_VOLUME,
 493                                 WM8350_ROUT1_VOLUME,
 494                                 2, 63, 0, out_pga_tlv),
 495         SOC_DOUBLE_R("Out1 Playback ZC Switch",
 496                      WM8350_LOUT1_VOLUME,
 497                      WM8350_ROUT1_VOLUME, 13, 1, 0),
 498         SOC_WM8350_DOUBLE_R_TLV("Out2 Playback Volume",
 499                                 WM8350_LOUT2_VOLUME,
 500                                 WM8350_ROUT2_VOLUME,
 501                                 2, 63, 0, out_pga_tlv),
 502         SOC_DOUBLE_R("Out2 Playback ZC Switch", WM8350_LOUT2_VOLUME,
 503                      WM8350_ROUT2_VOLUME, 13, 1, 0),
 504         SOC_SINGLE("Out2 Right Invert Switch", WM8350_ROUT2_VOLUME, 10, 1, 0),
 505         SOC_SINGLE_TLV("Out2 Beep Volume", WM8350_BEEP_VOLUME,
 506                        5, 7, 0, out_mix_tlv),
 507
 508         SOC_DOUBLE_R("Out1 Playback Switch",
 509                      WM8350_LOUT1_VOLUME,
 510                      WM8350_ROUT1_VOLUME,
 511                      14, 1, 1),
 512         SOC_DOUBLE_R("Out2 Playback Switch",
 513                      WM8350_LOUT2_VOLUME,
 514                      WM8350_ROUT2_VOLUME,
 515                      14, 1, 1),
 516 };
 517
 518 /*
 519  * DAPM Controls
 520  */
 521
 522 /* Left Playback Mixer */
 523 static const struct snd_kcontrol_new wm8350_left_play_mixer_controls[] = {
 524         SOC_DAPM_SINGLE("Playback Switch",
 525                         WM8350_LEFT_MIXER_CONTROL, 11, 1, 0),
 526         SOC_DAPM_SINGLE("Left Bypass Switch",
 527                         WM8350_LEFT_MIXER_CONTROL, 2, 1, 0),
 528         SOC_DAPM_SINGLE("Right Playback Switch",
 529                         WM8350_LEFT_MIXER_CONTROL, 12, 1, 0),
 530         SOC_DAPM_SINGLE("Left Sidetone Switch",
 531                         WM8350_LEFT_MIXER_CONTROL, 0, 1, 0),
 532         SOC_DAPM_SINGLE("Right Sidetone Switch",
 533                         WM8350_LEFT_MIXER_CONTROL, 1, 1, 0),
 534 };
 535
 536 /* Right Playback Mixer */
 537 static const struct snd_kcontrol_new wm8350_right_play_mixer_controls[] = {
 538         SOC_DAPM_SINGLE("Playback Switch",
 539                         WM8350_RIGHT_MIXER_CONTROL, 12, 1, 0),
 540         SOC_DAPM_SINGLE("Right Bypass Switch",
 541                         WM8350_RIGHT_MIXER_CONTROL, 3, 1, 0),
 542         SOC_DAPM_SINGLE("Left Playback Switch",
 543                         WM8350_RIGHT_MIXER_CONTROL, 11, 1, 0),
 544         SOC_DAPM_SINGLE("Left Sidetone Switch",
 545                         WM8350_RIGHT_MIXER_CONTROL, 0, 1, 0),
 546         SOC_DAPM_SINGLE("Right Sidetone Switch",
 547                         WM8350_RIGHT_MIXER_CONTROL, 1, 1, 0),
 548 };
 549
 550 /* Out4 Mixer */
 551 static const struct snd_kcontrol_new wm8350_out4_mixer_controls[] = {
 552         SOC_DAPM_SINGLE("Right Playback Switch",
 553                         WM8350_OUT4_MIXER_CONTROL, 12, 1, 0),
 554         SOC_DAPM_SINGLE("Left Playback Switch",
 555                         WM8350_OUT4_MIXER_CONTROL, 11, 1, 0),
 556         SOC_DAPM_SINGLE("Right Capture Switch",
 557                         WM8350_OUT4_MIXER_CONTROL, 9, 1, 0),
 558         SOC_DAPM_SINGLE("Out3 Playback Switch",
 559                         WM8350_OUT4_MIXER_CONTROL, 2, 1, 0),
 560         SOC_DAPM_SINGLE("Right Mixer Switch",
 561                         WM8350_OUT4_MIXER_CONTROL, 1, 1, 0),
 562         SOC_DAPM_SINGLE("Left Mixer Switch",
 563                         WM8350_OUT4_MIXER_CONTROL, 0, 1, 0),
 564 };
 565
 566 /* Out3 Mixer */
 567 static const struct snd_kcontrol_new wm8350_out3_mixer_controls[] = {
 568         SOC_DAPM_SINGLE("Left Playback Switch",
 569                         WM8350_OUT3_MIXER_CONTROL, 11, 1, 0),
 570         SOC_DAPM_SINGLE("Left Capture Switch",
 571                         WM8350_OUT3_MIXER_CONTROL, 8, 1, 0),
 572         SOC_DAPM_SINGLE("Out4 Playback Switch",
 573                         WM8350_OUT3_MIXER_CONTROL, 3, 1, 0),
 574         SOC_DAPM_SINGLE("Left Mixer Switch",
 575                         WM8350_OUT3_MIXER_CONTROL, 0, 1, 0),
 576 };
 577
 578 /* Left Input Mixer */
 579 static const struct snd_kcontrol_new wm8350_left_capt_mixer_controls[] = {
 580         SOC_DAPM_SINGLE_TLV("L2 Capture Volume",
 581                             WM8350_INPUT_MIXER_VOLUME_L, 1, 7, 0, out_mix_tlv),
 582         SOC_DAPM_SINGLE_TLV("L3 Capture Volume",
 583                             WM8350_INPUT_MIXER_VOLUME_L, 9, 7, 0, out_mix_tlv),
 584         SOC_DAPM_SINGLE("PGA Capture Switch",
 585                         WM8350_LEFT_INPUT_VOLUME, 14, 1, 1),
 586 };
 587
 588 /* Right Input Mixer */
 589 static const struct snd_kcontrol_new wm8350_right_capt_mixer_controls[] = {
 590         SOC_DAPM_SINGLE_TLV("L2 Capture Volume",
 591                             WM8350_INPUT_MIXER_VOLUME_R, 5, 7, 0, out_mix_tlv),
 592         SOC_DAPM_SINGLE_TLV("L3 Capture Volume",
 593                             WM8350_INPUT_MIXER_VOLUME_R, 13, 7, 0, out_mix_tlv),
 594         SOC_DAPM_SINGLE("PGA Capture Switch",
 595                         WM8350_RIGHT_INPUT_VOLUME, 14, 1, 1),
 596 };
 597
 598 /* Left Mic Mixer */
 599 static const struct snd_kcontrol_new wm8350_left_mic_mixer_controls[] = {
 600         SOC_DAPM_SINGLE("INN Capture Switch", WM8350_INPUT_CONTROL, 1, 1, 0),
 601         SOC_DAPM_SINGLE("INP Capture Switch", WM8350_INPUT_CONTROL, 0, 1, 0),
 602         SOC_DAPM_SINGLE("IN2 Capture Switch", WM8350_INPUT_CONTROL, 2, 1, 0),
 603 };
 604
 605 /* Right Mic Mixer */
 606 static const struct snd_kcontrol_new wm8350_right_mic_mixer_controls[] = {
 607         SOC_DAPM_SINGLE("INN Capture Switch", WM8350_INPUT_CONTROL, 9, 1, 0),
 608         SOC_DAPM_SINGLE("INP Capture Switch", WM8350_INPUT_CONTROL, 8, 1, 0),
 609         SOC_DAPM_SINGLE("IN2 Capture Switch", WM8350_INPUT_CONTROL, 10, 1, 0),
 610 };
 611
 612 /* Beep Switch */
 613 static const struct snd_kcontrol_new wm8350_beep_switch_controls =
 614 SOC_DAPM_SINGLE("Switch", WM8350_BEEP_VOLUME, 15, 1, 1);
 615
 616 /* Out4 Capture Mux */
 617 static const struct snd_kcontrol_new wm8350_out4_capture_controls =
 618 SOC_DAPM_ENUM("Route", wm8350_enum[7]);
 619
 620 static const struct snd_soc_dapm_widget wm8350_dapm_widgets[] = {
 621
 622         SND_SOC_DAPM_PGA("IN3R PGA", WM8350_POWER_MGMT_2, 11, 0, NULL, 0),
 623         SND_SOC_DAPM_PGA("IN3L PGA", WM8350_POWER_MGMT_2, 10, 0, NULL, 0),
 624         SND_SOC_DAPM_PGA_E("Right Out2 PGA", WM8350_POWER_MGMT_3, 3, 0, NULL,
 625                            0, pga_event,
 626                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
 627         SND_SOC_DAPM_PGA_E("Left Out2 PGA", WM8350_POWER_MGMT_3, 2, 0, NULL, 0,
 628                            pga_event,
 629                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
 630         SND_SOC_DAPM_PGA_E("Right Out1 PGA", WM8350_POWER_MGMT_3, 1, 0, NULL,
 631                            0, pga_event,
 632                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
 633         SND_SOC_DAPM_PGA_E("Left Out1 PGA", WM8350_POWER_MGMT_3, 0, 0, NULL, 0,
 634                            pga_event,
 635                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
 636
 637         SND_SOC_DAPM_MIXER("Right Capture Mixer", WM8350_POWER_MGMT_2,
 638                            7, 0, &wm8350_right_capt_mixer_controls[0],
 639                            ARRAY_SIZE(wm8350_right_capt_mixer_controls)),
 640
 641         SND_SOC_DAPM_MIXER("Left Capture Mixer", WM8350_POWER_MGMT_2,
 642                            6, 0, &wm8350_left_capt_mixer_controls[0],
 643                            ARRAY_SIZE(wm8350_left_capt_mixer_controls)),
 644
 645         SND_SOC_DAPM_MIXER("Out4 Mixer", WM8350_POWER_MGMT_2, 5, 0,
 646                            &wm8350_out4_mixer_controls[0],
 647                            ARRAY_SIZE(wm8350_out4_mixer_controls)),
 648
 649         SND_SOC_DAPM_MIXER("Out3 Mixer", WM8350_POWER_MGMT_2, 4, 0,
 650                            &wm8350_out3_mixer_controls[0],
 651                            ARRAY_SIZE(wm8350_out3_mixer_controls)),
 652
 653         SND_SOC_DAPM_MIXER("Right Playback Mixer", WM8350_POWER_MGMT_2, 1, 0,
 654                            &wm8350_right_play_mixer_controls[0],
 655                            ARRAY_SIZE(wm8350_right_play_mixer_controls)),
 656
 657         SND_SOC_DAPM_MIXER("Left Playback Mixer", WM8350_POWER_MGMT_2, 0, 0,
 658                            &wm8350_left_play_mixer_controls[0],
 659                            ARRAY_SIZE(wm8350_left_play_mixer_controls)),
 660
 661         SND_SOC_DAPM_MIXER("Left Mic Mixer", WM8350_POWER_MGMT_2, 8, 0,
 662                            &wm8350_left_mic_mixer_controls[0],
 663                            ARRAY_SIZE(wm8350_left_mic_mixer_controls)),
 664
 665         SND_SOC_DAPM_MIXER("Right Mic Mixer", WM8350_POWER_MGMT_2, 9, 0,
 666                            &wm8350_right_mic_mixer_controls[0],
 667                            ARRAY_SIZE(wm8350_right_mic_mixer_controls)),
 668
 669         /* virtual mixer for Beep and Out2R */
 670         SND_SOC_DAPM_MIXER("Out2 Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
 671
 672         SND_SOC_DAPM_SWITCH("Beep", WM8350_POWER_MGMT_3, 7, 0,
 673                             &wm8350_beep_switch_controls),
 674
 675         SND_SOC_DAPM_ADC("Right ADC", "Right Capture",
 676                          WM8350_POWER_MGMT_4, 3, 0),
 677         SND_SOC_DAPM_ADC("Left ADC", "Left Capture",
 678                          WM8350_POWER_MGMT_4, 2, 0),
 679         SND_SOC_DAPM_DAC("Right DAC", "Right Playback",
 680                          WM8350_POWER_MGMT_4, 5, 0),
 681         SND_SOC_DAPM_DAC("Left DAC", "Left Playback",
 682                          WM8350_POWER_MGMT_4, 4, 0),
 683
 684         SND_SOC_DAPM_MICBIAS("Mic Bias", WM8350_POWER_MGMT_1, 4, 0),
 685
 686         SND_SOC_DAPM_MUX("Out4 Capture Channel", SND_SOC_NOPM, 0, 0,
 687                          &wm8350_out4_capture_controls),
 688
 689         SND_SOC_DAPM_OUTPUT("OUT1R"),
 690         SND_SOC_DAPM_OUTPUT("OUT1L"),
 691         SND_SOC_DAPM_OUTPUT("OUT2R"),
 692         SND_SOC_DAPM_OUTPUT("OUT2L"),
 693         SND_SOC_DAPM_OUTPUT("OUT3"),
 694         SND_SOC_DAPM_OUTPUT("OUT4"),
 695
 696         SND_SOC_DAPM_INPUT("IN1RN"),
 697         SND_SOC_DAPM_INPUT("IN1RP"),
 698         SND_SOC_DAPM_INPUT("IN2R"),
 699         SND_SOC_DAPM_INPUT("IN1LP"),
 700         SND_SOC_DAPM_INPUT("IN1LN"),
 701         SND_SOC_DAPM_INPUT("IN2L"),
 702         SND_SOC_DAPM_INPUT("IN3R"),
 703         SND_SOC_DAPM_INPUT("IN3L"),
 704 };
 705
 706 static const struct snd_soc_dapm_route audio_map[] = {
 707
 708         /* left playback mixer */
 709         {"Left Playback Mixer", "Playback Switch", "Left DAC"},
 710         {"Left Playback Mixer", "Left Bypass Switch", "IN3L PGA"},
 711         {"Left Playback Mixer", "Right Playback Switch", "Right DAC"},
 712         {"Left Playback Mixer", "Left Sidetone Switch", "Left Mic Mixer"},
 713         {"Left Playback Mixer", "Right Sidetone Switch", "Right Mic Mixer"},
 714
 715         /* right playback mixer */
 716         {"Right Playback Mixer", "Playback Switch", "Right DAC"},
 717         {"Right Playback Mixer", "Right Bypass Switch", "IN3R PGA"},
 718         {"Right Playback Mixer", "Left Playback Switch", "Left DAC"},
 719         {"Right Playback Mixer", "Left Sidetone Switch", "Left Mic Mixer"},
 720         {"Right Playback Mixer", "Right Sidetone Switch", "Right Mic Mixer"},
 721
 722         /* out4 playback mixer */
 723         {"Out4 Mixer", "Right Playback Switch", "Right DAC"},
 724         {"Out4 Mixer", "Left Playback Switch", "Left DAC"},
 725         {"Out4 Mixer", "Right Capture Switch", "Right Capture Mixer"},
 726         {"Out4 Mixer", "Out3 Playback Switch", "Out3 Mixer"},
 727         {"Out4 Mixer", "Right Mixer Switch", "Right Playback Mixer"},
 728         {"Out4 Mixer", "Left Mixer Switch", "Left Playback Mixer"},
 729         {"OUT4", NULL, "Out4 Mixer"},
 730
 731         /* out3 playback mixer */
 732         {"Out3 Mixer", "Left Playback Switch", "Left DAC"},
 733         {"Out3 Mixer", "Left Capture Switch", "Left Capture Mixer"},
 734         {"Out3 Mixer", "Left Mixer Switch", "Left Playback Mixer"},
 735         {"Out3 Mixer", "Out4 Playback Switch", "Out4 Mixer"},
 736         {"OUT3", NULL, "Out3 Mixer"},
 737
 738         /* out2 */
 739         {"Right Out2 PGA", NULL, "Right Playback Mixer"},
 740         {"Left Out2 PGA", NULL, "Left Playback Mixer"},
 741         {"OUT2L", NULL, "Left Out2 PGA"},
 742         {"OUT2R", NULL, "Right Out2 PGA"},
 743
 744         /* out1 */
 745         {"Right Out1 PGA", NULL, "Right Playback Mixer"},
 746         {"Left Out1 PGA", NULL, "Left Playback Mixer"},
 747         {"OUT1L", NULL, "Left Out1 PGA"},
 748         {"OUT1R", NULL, "Right Out1 PGA"},
 749
 750         /* ADCs */
 751         {"Left ADC", NULL, "Left Capture Mixer"},
 752         {"Right ADC", NULL, "Right Capture Mixer"},
 753
 754         /* Left capture mixer */
 755         {"Left Capture Mixer", "L2 Capture Volume", "IN2L"},
 756         {"Left Capture Mixer", "L3 Capture Volume", "IN3L PGA"},
 757         {"Left Capture Mixer", "PGA Capture Switch", "Left Mic Mixer"},
 758         {"Left Capture Mixer", NULL, "Out4 Capture Channel"},
 759
 760         /* Right capture mixer */
 761         {"Right Capture Mixer", "L2 Capture Volume", "IN2R"},
 762         {"Right Capture Mixer", "L3 Capture Volume", "IN3R PGA"},
 763         {"Right Capture Mixer", "PGA Capture Switch", "Right Mic Mixer"},
 764         {"Right Capture Mixer", NULL, "Out4 Capture Channel"},
 765
 766         /* L3 Inputs */
 767         {"IN3L PGA", NULL, "IN3L"},
 768         {"IN3R PGA", NULL, "IN3R"},
 769
 770         /* Left Mic mixer */
 771         {"Left Mic Mixer", "INN Capture Switch", "IN1LN"},
 772         {"Left Mic Mixer", "INP Capture Switch", "IN1LP"},
 773         {"Left Mic Mixer", "IN2 Capture Switch", "IN2L"},
 774
 775         /* Right Mic mixer */
 776         {"Right Mic Mixer", "INN Capture Switch", "IN1RN"},
 777         {"Right Mic Mixer", "INP Capture Switch", "IN1RP"},
 778         {"Right Mic Mixer", "IN2 Capture Switch", "IN2R"},
 779
 780         /* out 4 capture */
 781         {"Out4 Capture Channel", NULL, "Out4 Mixer"},
 782
 783         /* Beep */
 784         {"Beep", NULL, "IN3R PGA"},
 785 };
 786
 787 static int wm8350_add_widgets(struct snd_soc_codec *codec)
 788 {
 789         int ret;
 790
 791         ret = snd_soc_dapm_new_controls(codec,
 792                                         wm8350_dapm_widgets,
 793                                         ARRAY_SIZE(wm8350_dapm_widgets));
 794         if (ret != 0) {
 795                 dev_err(codec->dev, "dapm control register failed\n");
 796                 return ret;
 797         }
 798
 799         /* set up audio paths */
 800         ret = snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
 801         if (ret != 0) {
 802                 dev_err(codec->dev, "DAPM route register failed\n");
 803                 return ret;
 804         }
 805
 806         return 0;
 807 }
 808
 809 static int wm8350_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 810                                  int clk_id, unsigned int freq, int dir)
 811 {
 812         struct snd_soc_codec *codec = codec_dai->codec;
 813         struct wm8350 *wm8350 = codec->control_data;
 814         u16 fll_4;
 815
 816         switch (clk_id) {
 817         case WM8350_MCLK_SEL_MCLK:
 818                 wm8350_clear_bits(wm8350, WM8350_CLOCK_CONTROL_1,
 819                                   WM8350_MCLK_SEL);
 820                 break;
 821         case WM8350_MCLK_SEL_PLL_MCLK:
 822         case WM8350_MCLK_SEL_PLL_DAC:
 823         case WM8350_MCLK_SEL_PLL_ADC:
 824         case WM8350_MCLK_SEL_PLL_32K:
 825                 wm8350_set_bits(wm8350, WM8350_CLOCK_CONTROL_1,
 826                                 WM8350_MCLK_SEL);
 827                 fll_4 = wm8350_codec_read(codec, WM8350_FLL_CONTROL_4) &
 828                     ~WM8350_FLL_CLK_SRC_MASK;
 829                 wm8350_codec_write(codec, WM8350_FLL_CONTROL_4, fll_4 | clk_id);
 830                 break;
 831         }
 832
 833         /* MCLK direction */
 834         if (dir == WM8350_MCLK_DIR_OUT)
 835                 wm8350_set_bits(wm8350, WM8350_CLOCK_CONTROL_2,
 836                                 WM8350_MCLK_DIR);
 837         else
 838                 wm8350_clear_bits(wm8350, WM8350_CLOCK_CONTROL_2,
 839                                   WM8350_MCLK_DIR);
 840
 841         return 0;
 842 }
 843
 844 static int wm8350_set_clkdiv(struct snd_soc_dai *codec_dai, int div_id, int div)
 845 {
 846         struct snd_soc_codec *codec = codec_dai->codec;
 847         u16 val;
 848
 849         switch (div_id) {
 850         case WM8350_ADC_CLKDIV:
 851                 val = wm8350_codec_read(codec, WM8350_ADC_DIVIDER) &
 852                     ~WM8350_ADC_CLKDIV_MASK;
 853                 wm8350_codec_write(codec, WM8350_ADC_DIVIDER, val | div);
 854                 break;
 855         case WM8350_DAC_CLKDIV:
 856                 val = wm8350_codec_read(codec, WM8350_DAC_CLOCK_CONTROL) &
 857                     ~WM8350_DAC_CLKDIV_MASK;
 858                 wm8350_codec_write(codec, WM8350_DAC_CLOCK_CONTROL, val | div);
 859                 break;
 860         case WM8350_BCLK_CLKDIV:
 861                 val = wm8350_codec_read(codec, WM8350_CLOCK_CONTROL_1) &
 862                     ~WM8350_BCLK_DIV_MASK;
 863                 wm8350_codec_write(codec, WM8350_CLOCK_CONTROL_1, val | div);
 864                 break;
 865         case WM8350_OPCLK_CLKDIV:
 866                 val = wm8350_codec_read(codec, WM8350_CLOCK_CONTROL_1) &
 867                     ~WM8350_OPCLK_DIV_MASK;
 868                 wm8350_codec_write(codec, WM8350_CLOCK_CONTROL_1, val | div);
 869                 break;
 870         case WM8350_SYS_CLKDIV:
 871                 val = wm8350_codec_read(codec, WM8350_CLOCK_CONTROL_1) &
 872                     ~WM8350_MCLK_DIV_MASK;
 873                 wm8350_codec_write(codec, WM8350_CLOCK_CONTROL_1, val | div);
 874                 break;
 875         case WM8350_DACLR_CLKDIV:
 876                 val = wm8350_codec_read(codec, WM8350_DAC_LR_RATE) &
 877                     ~WM8350_DACLRC_RATE_MASK;
 878                 wm8350_codec_write(codec, WM8350_DAC_LR_RATE, val | div);
 879                 break;
 880         case WM8350_ADCLR_CLKDIV:
 881                 val = wm8350_codec_read(codec, WM8350_ADC_LR_RATE) &
 882                     ~WM8350_ADCLRC_RATE_MASK;
 883                 wm8350_codec_write(codec, WM8350_ADC_LR_RATE, val | div);
 884                 break;
 885         default:
 886                 return -EINVAL;
 887         }
 888
 889         return 0;
 890 }
 891
 892 static int wm8350_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
 893 {
 894         struct snd_soc_codec *codec = codec_dai->codec;
 895         u16 iface = wm8350_codec_read(codec, WM8350_AI_FORMATING) &
 896             ~(WM8350_AIF_BCLK_INV | WM8350_AIF_LRCLK_INV | WM8350_AIF_FMT_MASK);
 897         u16 master = wm8350_codec_read(codec, WM8350_AI_DAC_CONTROL) &
 898             ~WM8350_BCLK_MSTR;
 899         u16 dac_lrc = wm8350_codec_read(codec, WM8350_DAC_LR_RATE) &
 900             ~WM8350_DACLRC_ENA;
 901         u16 adc_lrc = wm8350_codec_read(codec, WM8350_ADC_LR_RATE) &
 902             ~WM8350_ADCLRC_ENA;
 903
 904         /* set master/slave audio interface */
 905         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 906         case SND_SOC_DAIFMT_CBM_CFM:
 907                 master |= WM8350_BCLK_MSTR;
 908                 dac_lrc |= WM8350_DACLRC_ENA;
 909                 adc_lrc |= WM8350_ADCLRC_ENA;
 910                 break;
 911         case SND_SOC_DAIFMT_CBS_CFS:
 912                 break;
 913         default:
 914                 return -EINVAL;
 915         }
 916
 917         /* interface format */
 918         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 919         case SND_SOC_DAIFMT_I2S:
 920                 iface |= 0x2 << 8;
 921                 break;
 922         case SND_SOC_DAIFMT_RIGHT_J:
 923                 break;
 924         case SND_SOC_DAIFMT_LEFT_J:
 925                 iface |= 0x1 << 8;
 926                 break;
 927         case SND_SOC_DAIFMT_DSP_A:
 928                 iface |= 0x3 << 8;
 929                 break;
 930         case SND_SOC_DAIFMT_DSP_B:
 931                 iface |= 0x3 << 8 | WM8350_AIF_LRCLK_INV;
 932                 break;
 933         default:
 934                 return -EINVAL;
 935         }
 936
 937         /* clock inversion */
 938         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 939         case SND_SOC_DAIFMT_NB_NF:
 940                 break;
 941         case SND_SOC_DAIFMT_IB_IF:
 942                 iface |= WM8350_AIF_LRCLK_INV | WM8350_AIF_BCLK_INV;
 943                 break;
 944         case SND_SOC_DAIFMT_IB_NF:
 945                 iface |= WM8350_AIF_BCLK_INV;
 946                 break;
 947         case SND_SOC_DAIFMT_NB_IF:
 948                 iface |= WM8350_AIF_LRCLK_INV;
 949                 break;
 950         default:
 951                 return -EINVAL;
 952         }
 953
 954         wm8350_codec_write(codec, WM8350_AI_FORMATING, iface);
 955         wm8350_codec_write(codec, WM8350_AI_DAC_CONTROL, master);
 956         wm8350_codec_write(codec, WM8350_DAC_LR_RATE, dac_lrc);
 957         wm8350_codec_write(codec, WM8350_ADC_LR_RATE, adc_lrc);
 958         return 0;
 959 }
 960
 961 static int wm8350_pcm_trigger(struct snd_pcm_substream *substream,
 962                               int cmd, struct snd_soc_dai *codec_dai)
 963 {
 964         struct snd_soc_codec *codec = codec_dai->codec;
 965         int master = wm8350_codec_cache_read(codec, WM8350_AI_DAC_CONTROL) &
 966             WM8350_BCLK_MSTR;
 967         int enabled = 0;
 968
 969         /* Check that the DACs or ADCs are enabled since they are
 970          * required for LRC in master mode. The DACs or ADCs need a
 971          * valid audio path i.e. pin -> ADC or DAC -> pin before
 972          * the LRC will be enabled in master mode. */
 973         if (!master || cmd != SNDRV_PCM_TRIGGER_START)
 974                 return 0;
 975
 976         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
 977                 enabled = wm8350_codec_cache_read(codec, WM8350_POWER_MGMT_4) &
 978                     (WM8350_ADCR_ENA | WM8350_ADCL_ENA);
 979         } else {
 980                 enabled = wm8350_codec_cache_read(codec, WM8350_POWER_MGMT_4) &
 981                     (WM8350_DACR_ENA | WM8350_DACL_ENA);
 982         }
 983
 984         if (!enabled) {
 985                 dev_err(codec->dev,
 986                        "%s: invalid audio path - no clocks available\n",
 987                        __func__);
 988                 return -EINVAL;
 989         }
 990         return 0;
 991 }
 992
 993 static int wm8350_pcm_hw_params(struct snd_pcm_substream *substream,
 994                                 struct snd_pcm_hw_params *params,
 995                                 struct snd_soc_dai *codec_dai)
 996 {
 997         struct snd_soc_codec *codec = codec_dai->codec;
 998         struct wm8350 *wm8350 = codec->control_data;
 999         u16 iface = wm8350_codec_read(codec, WM8350_AI_FORMATING) &
1000             ~WM8350_AIF_WL_MASK;
1001
1002         /* bit size */
1003         switch (params_format(params)) {
1004         case SNDRV_PCM_FORMAT_S16_LE:
1005                 break;
1006         case SNDRV_PCM_FORMAT_S20_3LE:
1007                 iface |= 0x1 << 10;
1008                 break;
1009         case SNDRV_PCM_FORMAT_S24_LE:
1010                 iface |= 0x2 << 10;
1011                 break;
1012         case SNDRV_PCM_FORMAT_S32_LE:
1013                 iface |= 0x3 << 10;
1014                 break;
1015         }
1016
1017         wm8350_codec_write(codec, WM8350_AI_FORMATING, iface);
1018
1019         /* The sloping stopband filter is recommended for use with
1020          * lower sample rates to improve performance.
1021          */
1022         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1023                 if (params_rate(params) < 24000)
1024                         wm8350_set_bits(wm8350, WM8350_DAC_MUTE_VOLUME,
1025                                         WM8350_DAC_SB_FILT);
1026                 else
1027                         wm8350_clear_bits(wm8350, WM8350_DAC_MUTE_VOLUME,
1028                                           WM8350_DAC_SB_FILT);
1029         }
1030
1031         return 0;
1032 }
1033
1034 static int wm8350_mute(struct snd_soc_dai *dai, int mute)
1035 {
1036         struct snd_soc_codec *codec = dai->codec;
1037         struct wm8350 *wm8350 = codec->control_data;
1038
1039         if (mute)
1040                 wm8350_set_bits(wm8350, WM8350_DAC_MUTE, WM8350_DAC_MUTE_ENA);
1041         else
1042                 wm8350_clear_bits(wm8350, WM8350_DAC_MUTE, WM8350_DAC_MUTE_ENA);
1043         return 0;
1044 }
1045
1046 /* FLL divisors */
1047 struct _fll_div {
1048         int div;                /* FLL_OUTDIV */
1049         int n;
1050         int k;
1051         int ratio;              /* FLL_FRATIO */
1052 };
1053
1054 /* The size in bits of the fll divide multiplied by 10
1055  * to allow rounding later */
1056 #define FIXED_FLL_SIZE ((1 << 16) * 10)
1057
1058 static inline int fll_factors(struct _fll_div *fll_div, unsigned int input,
1059                               unsigned int output)
1060 {
1061         u64 Kpart;
1062         unsigned int t1, t2, K, Nmod;
1063
1064         if (output >= 2815250 && output <= 3125000)
1065                 fll_div->div = 0x4;
1066         else if (output >= 5625000 && output <= 6250000)
1067                 fll_div->div = 0x3;
1068         else if (output >= 11250000 && output <= 12500000)
1069                 fll_div->div = 0x2;
1070         else if (output >= 22500000 && output <= 25000000)
1071                 fll_div->div = 0x1;
1072         else {
1073                 printk(KERN_ERR "wm8350: fll freq %d out of range\n", output);
1074                 return -EINVAL;
1075         }
1076
1077         if (input > 48000)
1078                 fll_div->ratio = 1;
1079         else
1080                 fll_div->ratio = 8;
1081
1082         t1 = output * (1 << (fll_div->div + 1));
1083         t2 = input * fll_div->ratio;
1084
1085         fll_div->n = t1 / t2;
1086         Nmod = t1 % t2;
1087
1088         if (Nmod) {
1089                 Kpart = FIXED_FLL_SIZE * (long long)Nmod;
1090                 do_div(Kpart, t2);
1091                 K = Kpart & 0xFFFFFFFF;
1092
1093                 /* Check if we need to round */
1094                 if ((K % 10) >= 5)
1095                         K += 5;
1096
1097                 /* Move down to proper range now rounding is done */
1098                 K /= 10;
1099                 fll_div->k = K;
1100         } else
1101                 fll_div->k = 0;
1102
1103         return 0;
1104 }
1105
1106 static int wm8350_set_fll(struct snd_soc_dai *codec_dai,
1107                           int pll_id, int source, unsigned int freq_in,
1108                           unsigned int freq_out)
1109 {
1110         struct snd_soc_codec *codec = codec_dai->codec;
1111         struct wm8350 *wm8350 = codec->control_data;
1112         struct wm8350_data *priv = snd_soc_codec_get_drvdata(codec);
1113         struct _fll_div fll_div;
1114         int ret = 0;
1115         u16 fll_1, fll_4;
1116
1117         if (freq_in == priv->fll_freq_in && freq_out == priv->fll_freq_out)
1118                 return 0;
1119
1120         /* power down FLL - we need to do this for reconfiguration */
1121         wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_4,
1122                           WM8350_FLL_ENA | WM8350_FLL_OSC_ENA);
1123
1124         if (freq_out == 0 || freq_in == 0)
1125                 return ret;
1126
1127         ret = fll_factors(&fll_div, freq_in, freq_out);
1128         if (ret < 0)
1129                 return ret;
1130         dev_dbg(wm8350->dev,
1131                 "FLL in %u FLL out %u N 0x%x K 0x%x div %d ratio %d",
1132                 freq_in, freq_out, fll_div.n, fll_div.k, fll_div.div,
1133                 fll_div.ratio);
1134
1135         /* set up N.K & dividers */
1136         fll_1 = wm8350_codec_read(codec, WM8350_FLL_CONTROL_1) &
1137             ~(WM8350_FLL_OUTDIV_MASK | WM8350_FLL_RSP_RATE_MASK | 0xc000);
1138         wm8350_codec_write(codec, WM8350_FLL_CONTROL_1,
1139                            fll_1 | (fll_div.div << 8) | 0x50);
1140         wm8350_codec_write(codec, WM8350_FLL_CONTROL_2,
1141                            (fll_div.ratio << 11) | (fll_div.
1142                                                     n & WM8350_FLL_N_MASK));
1143         wm8350_codec_write(codec, WM8350_FLL_CONTROL_3, fll_div.k);
1144         fll_4 = wm8350_codec_read(codec, WM8350_FLL_CONTROL_4) &
1145             ~(WM8350_FLL_FRAC | WM8350_FLL_SLOW_LOCK_REF);
1146         wm8350_codec_write(codec, WM8350_FLL_CONTROL_4,
1147                            fll_4 | (fll_div.k ? WM8350_FLL_FRAC : 0) |
1148                            (fll_div.ratio == 8 ? WM8350_FLL_SLOW_LOCK_REF : 0));
1149
1150         /* power FLL on */
1151         wm8350_set_bits(wm8350, WM8350_POWER_MGMT_4, WM8350_FLL_OSC_ENA);
1152         wm8350_set_bits(wm8350, WM8350_POWER_MGMT_4, WM8350_FLL_ENA);
1153
1154         priv->fll_freq_out = freq_out;
1155         priv->fll_freq_in = freq_in;
1156
1157         return 0;
1158 }
1159
1160 static int wm8350_set_bias_level(struct snd_soc_codec *codec,
1161                                  enum snd_soc_bias_level level)
1162 {
1163         struct wm8350 *wm8350 = codec->control_data;
1164         struct wm8350_data *priv = snd_soc_codec_get_drvdata(codec);
1165         struct wm8350_audio_platform_data *platform =
1166                 wm8350->codec.platform_data;
1167         u16 pm1;
1168         int ret;
1169
1170         switch (level) {
1171         case SND_SOC_BIAS_ON:
1172                 pm1 = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_1) &
1173                     ~(WM8350_VMID_MASK | WM8350_CODEC_ISEL_MASK);
1174                 wm8350_reg_write(wm8350, WM8350_POWER_MGMT_1,
1175                                  pm1 | WM8350_VMID_50K |
1176                                  platform->codec_current_on << 14);
1177                 break;
1178
1179         case SND_SOC_BIAS_PREPARE:
1180                 pm1 = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_1);
1181                 pm1 &= ~WM8350_VMID_MASK;
1182                 wm8350_reg_write(wm8350, WM8350_POWER_MGMT_1,
1183                                  pm1 | WM8350_VMID_50K);
1184                 break;
1185
1186         case SND_SOC_BIAS_STANDBY:
1187                 if (codec->bias_level == SND_SOC_BIAS_OFF) {
1188                         ret = regulator_bulk_enable(ARRAY_SIZE(priv->supplies),
1189                                                     priv->supplies);
1190                         if (ret != 0)
1191                                 return ret;
1192
1193                         /* Enable the system clock */
1194                         wm8350_set_bits(wm8350, WM8350_POWER_MGMT_4,
1195                                         WM8350_SYSCLK_ENA);
1196
1197                         /* mute DAC & outputs */
1198                         wm8350_set_bits(wm8350, WM8350_DAC_MUTE,
1199                                         WM8350_DAC_MUTE_ENA);
1200
1201                         /* discharge cap memory */
1202                         wm8350_reg_write(wm8350, WM8350_ANTI_POP_CONTROL,
1203                                          platform->dis_out1 |
1204                                          (platform->dis_out2 << 2) |
1205                                          (platform->dis_out3 << 4) |
1206                                          (platform->dis_out4 << 6));
1207
1208                         /* wait for discharge */
1209                         schedule_timeout_interruptible(msecs_to_jiffies
1210                                                        (platform->
1211                                                         cap_discharge_msecs));
1212
1213                         /* enable antipop */
1214                         wm8350_reg_write(wm8350, WM8350_ANTI_POP_CONTROL,
1215                                          (platform->vmid_s_curve << 8));
1216
1217                         /* ramp up vmid */
1218                         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_1,
1219                                          (platform->
1220                                           codec_current_charge << 14) |
1221                                          WM8350_VMID_5K | WM8350_VMIDEN |
1222                                          WM8350_VBUFEN);
1223
1224                         /* wait for vmid */
1225                         schedule_timeout_interruptible(msecs_to_jiffies
1226                                                        (platform->
1227                                                         vmid_charge_msecs));
1228
1229                         /* turn on vmid 300k  */
1230                         pm1 = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_1) &
1231                             ~(WM8350_VMID_MASK | WM8350_CODEC_ISEL_MASK);
1232                         pm1 |= WM8350_VMID_300K |
1233                                 (platform->codec_current_standby << 14);
1234                         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_1,
1235                                          pm1);
1236
1237
1238                         /* enable analogue bias */
1239                         pm1 |= WM8350_BIASEN;
1240                         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_1, pm1);
1241
1242                         /* disable antipop */
1243                         wm8350_reg_write(wm8350, WM8350_ANTI_POP_CONTROL, 0);
1244
1245                 } else {
1246                         /* turn on vmid 300k and reduce current */
1247                         pm1 = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_1) &
1248                             ~(WM8350_VMID_MASK | WM8350_CODEC_ISEL_MASK);
1249                         wm8350_reg_write(wm8350, WM8350_POWER_MGMT_1,
1250                                          pm1 | WM8350_VMID_300K |
1251                                          (platform->
1252                                           codec_current_standby << 14));
1253
1254                 }
1255                 break;
1256
1257         case SND_SOC_BIAS_OFF:
1258
1259                 /* mute DAC & enable outputs */
1260                 wm8350_set_bits(wm8350, WM8350_DAC_MUTE, WM8350_DAC_MUTE_ENA);
1261
1262                 wm8350_set_bits(wm8350, WM8350_POWER_MGMT_3,
1263                                 WM8350_OUT1L_ENA | WM8350_OUT1R_ENA |
1264                                 WM8350_OUT2L_ENA | WM8350_OUT2R_ENA);
1265
1266                 /* enable anti pop S curve */
1267                 wm8350_reg_write(wm8350, WM8350_ANTI_POP_CONTROL,
1268                                  (platform->vmid_s_curve << 8));
1269
1270                 /* turn off vmid  */
1271                 pm1 = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_1) &
1272                     ~WM8350_VMIDEN;
1273                 wm8350_reg_write(wm8350, WM8350_POWER_MGMT_1, pm1);
1274
1275                 /* wait */
1276                 schedule_timeout_interruptible(msecs_to_jiffies
1277                                                (platform->
1278                                                 vmid_discharge_msecs));
1279
1280                 wm8350_reg_write(wm8350, WM8350_ANTI_POP_CONTROL,
1281                                  (platform->vmid_s_curve << 8) |
1282                                  platform->dis_out1 |
1283                                  (platform->dis_out2 << 2) |
1284                                  (platform->dis_out3 << 4) |
1285                                  (platform->dis_out4 << 6));
1286
1287                 /* turn off VBuf and drain */
1288                 pm1 = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_1) &
1289                     ~(WM8350_VBUFEN | WM8350_VMID_MASK);
1290                 wm8350_reg_write(wm8350, WM8350_POWER_MGMT_1,
1291                                  pm1 | WM8350_OUTPUT_DRAIN_EN);
1292
1293                 /* wait */
1294                 schedule_timeout_interruptible(msecs_to_jiffies
1295                                                (platform->drain_msecs));
1296
1297                 pm1 &= ~WM8350_BIASEN;
1298                 wm8350_reg_write(wm8350, WM8350_POWER_MGMT_1, pm1);
1299
1300                 /* disable anti-pop */
1301                 wm8350_reg_write(wm8350, WM8350_ANTI_POP_CONTROL, 0);
1302
1303                 wm8350_clear_bits(wm8350, WM8350_LOUT1_VOLUME,
1304                                   WM8350_OUT1L_ENA);
1305                 wm8350_clear_bits(wm8350, WM8350_ROUT1_VOLUME,
1306                                   WM8350_OUT1R_ENA);
1307                 wm8350_clear_bits(wm8350, WM8350_LOUT2_VOLUME,
1308                                   WM8350_OUT2L_ENA);
1309                 wm8350_clear_bits(wm8350, WM8350_ROUT2_VOLUME,
1310                                   WM8350_OUT2R_ENA);
1311
1312                 /* disable clock gen */
1313                 wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_4,
1314                                   WM8350_SYSCLK_ENA);
1315
1316                 regulator_bulk_disable(ARRAY_SIZE(priv->supplies),
1317                                        priv->supplies);
1318                 break;
1319         }
1320         codec->bias_level = level;
1321         return 0;
1322 }
1323
1324 static int wm8350_suspend(struct platform_device *pdev, pm_message_t state)
1325 {
1326         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1327         struct snd_soc_codec *codec = socdev->card->codec;
1328
1329         wm8350_set_bias_level(codec, SND_SOC_BIAS_OFF);
1330         return 0;
1331 }
1332
1333 static int wm8350_resume(struct platform_device *pdev)
1334 {
1335         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1336         struct snd_soc_codec *codec = socdev->card->codec;
1337
1338         wm8350_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1339
1340         return 0;
1341 }
1342
1343 static irqreturn_t wm8350_hp_jack_handler(int irq, void *data)
1344 {
1345         struct wm8350_data *priv = data;
1346         struct wm8350 *wm8350 = priv->codec.control_data;
1347         u16 reg;
1348         int report;
1349         int mask;
1350         struct wm8350_jack_data *jack = NULL;
1351
1352         switch (irq - wm8350->irq_base) {
1353         case WM8350_IRQ_CODEC_JCK_DET_L:
1354                 jack = &priv->hpl;
1355                 mask = WM8350_JACK_L_LVL;
1356                 break;
1357
1358         case WM8350_IRQ_CODEC_JCK_DET_R:
1359                 jack = &priv->hpr;
1360                 mask = WM8350_JACK_R_LVL;
1361                 break;
1362
1363         default:
1364                 BUG();
1365         }
1366
1367         if (!jack->jack) {
1368                 dev_warn(wm8350->dev, "Jack interrupt called with no jack\n");
1369                 return IRQ_NONE;
1370         }
1371
1372         /* Debounce */
1373         msleep(200);
1374
1375         reg = wm8350_reg_read(wm8350, WM8350_JACK_PIN_STATUS);
1376         if (reg & mask)
1377                 report = jack->report;
1378         else
1379                 report = 0;
1380
1381         snd_soc_jack_report(jack->jack, report, jack->report);
1382
1383         return IRQ_HANDLED;
1384 }
1385
1386 /**
1387  * wm8350_hp_jack_detect - Enable headphone jack detection.
1388  *
1389  * @codec:  WM8350 codec
1390  * @which:  left or right jack detect signal
1391  * @jack:   jack to report detection events on
1392  * @report: value to report
1393  *
1394  * Enables the headphone jack detection of the WM8350.  If no report
1395  * is specified then detection is disabled.
1396  */
1397 int wm8350_hp_jack_detect(struct snd_soc_codec *codec, enum wm8350_jack which,
1398                           struct snd_soc_jack *jack, int report)
1399 {
1400         struct wm8350_data *priv = snd_soc_codec_get_drvdata(codec);
1401         struct wm8350 *wm8350 = codec->control_data;
1402         int irq;
1403         int ena;
1404
1405         switch (which) {
1406         case WM8350_JDL:
1407                 priv->hpl.jack = jack;
1408                 priv->hpl.report = report;
1409                 irq = WM8350_IRQ_CODEC_JCK_DET_L;
1410                 ena = WM8350_JDL_ENA;
1411                 break;
1412
1413         case WM8350_JDR:
1414                 priv->hpr.jack = jack;
1415                 priv->hpr.report = report;
1416                 irq = WM8350_IRQ_CODEC_JCK_DET_R;
1417                 ena = WM8350_JDR_ENA;
1418                 break;
1419
1420         default:
1421                 return -EINVAL;
1422         }
1423
1424         if (report) {
1425                 wm8350_set_bits(wm8350, WM8350_POWER_MGMT_4, WM8350_TOCLK_ENA);
1426                 wm8350_set_bits(wm8350, WM8350_JACK_DETECT, ena);
1427         } else {
1428                 wm8350_clear_bits(wm8350, WM8350_JACK_DETECT, ena);
1429         }
1430
1431         /* Sync status */
1432         wm8350_hp_jack_handler(irq + wm8350->irq_base, priv);
1433
1434         return 0;
1435 }
1436 EXPORT_SYMBOL_GPL(wm8350_hp_jack_detect);
1437
1438 static irqreturn_t wm8350_mic_handler(int irq, void *data)
1439 {
1440         struct wm8350_data *priv = data;
1441         struct wm8350 *wm8350 = priv->codec.control_data;
1442         u16 reg;
1443         int report = 0;
1444
1445         reg = wm8350_reg_read(wm8350, WM8350_JACK_PIN_STATUS);
1446         if (reg & WM8350_JACK_MICSCD_LVL)
1447                 report |= priv->mic.short_report;
1448         if (reg & WM8350_JACK_MICSD_LVL)
1449                 report |= priv->mic.report;
1450
1451         snd_soc_jack_report(priv->mic.jack, report,
1452                             priv->mic.report | priv->mic.short_report);
1453
1454         return IRQ_HANDLED;
1455 }
1456
1457 /**
1458  * wm8350_mic_jack_detect - Enable microphone jack detection.
1459  *
1460  * @codec:         WM8350 codec
1461  * @jack:          jack to report detection events on
1462  * @detect_report: value to report when presence detected
1463  * @short_report:  value to report when microphone short detected
1464  *
1465  * Enables the microphone jack detection of the WM8350.  If both reports
1466  * are specified as zero then detection is disabled.
1467  */
1468 int wm8350_mic_jack_detect(struct snd_soc_codec *codec,
1469                            struct snd_soc_jack *jack,
1470                            int detect_report, int short_report)
1471 {
1472         struct wm8350_data *priv = snd_soc_codec_get_drvdata(codec);
1473         struct wm8350 *wm8350 = codec->control_data;
1474
1475         priv->mic.jack = jack;
1476         priv->mic.report = detect_report;
1477         priv->mic.short_report = short_report;
1478
1479         if (detect_report || short_report) {
1480                 wm8350_set_bits(wm8350, WM8350_POWER_MGMT_4, WM8350_TOCLK_ENA);
1481                 wm8350_set_bits(wm8350, WM8350_POWER_MGMT_1,
1482                                 WM8350_MIC_DET_ENA);
1483         } else {
1484                 wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_1,
1485                                   WM8350_MIC_DET_ENA);
1486         }
1487
1488         return 0;
1489 }
1490 EXPORT_SYMBOL_GPL(wm8350_mic_jack_detect);
1491
1492 static struct snd_soc_codec *wm8350_codec;
1493
1494 static int wm8350_probe(struct platform_device *pdev)
1495 {
1496         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1497         struct snd_soc_codec *codec;
1498         struct wm8350 *wm8350;
1499         struct wm8350_data *priv;
1500         int ret;
1501         struct wm8350_output *out1;
1502         struct wm8350_output *out2;
1503
1504         BUG_ON(!wm8350_codec);
1505
1506         socdev->card->codec = wm8350_codec;
1507         codec = socdev->card->codec;
1508         wm8350 = codec->control_data;
1509         priv = snd_soc_codec_get_drvdata(codec);
1510
1511         /* Enable the codec */
1512         wm8350_set_bits(wm8350, WM8350_POWER_MGMT_5, WM8350_CODEC_ENA);
1513
1514         /* Enable robust clocking mode in ADC */
1515         wm8350_codec_write(codec, WM8350_SECURITY, 0xa7);
1516         wm8350_codec_write(codec, 0xde, 0x13);
1517         wm8350_codec_write(codec, WM8350_SECURITY, 0);
1518
1519         /* read OUT1 & OUT2 volumes */
1520         out1 = &priv->out1;
1521         out2 = &priv->out2;
1522         out1->left_vol = (wm8350_reg_read(wm8350, WM8350_LOUT1_VOLUME) &
1523                           WM8350_OUT1L_VOL_MASK) >> WM8350_OUT1L_VOL_SHIFT;
1524         out1->right_vol = (wm8350_reg_read(wm8350, WM8350_ROUT1_VOLUME) &
1525                            WM8350_OUT1R_VOL_MASK) >> WM8350_OUT1R_VOL_SHIFT;
1526         out2->left_vol = (wm8350_reg_read(wm8350, WM8350_LOUT2_VOLUME) &
1527                           WM8350_OUT2L_VOL_MASK) >> WM8350_OUT1L_VOL_SHIFT;
1528         out2->right_vol = (wm8350_reg_read(wm8350, WM8350_ROUT2_VOLUME) &
1529                            WM8350_OUT2R_VOL_MASK) >> WM8350_OUT1R_VOL_SHIFT;
1530         wm8350_reg_write(wm8350, WM8350_LOUT1_VOLUME, 0);
1531         wm8350_reg_write(wm8350, WM8350_ROUT1_VOLUME, 0);
1532         wm8350_reg_write(wm8350, WM8350_LOUT2_VOLUME, 0);
1533         wm8350_reg_write(wm8350, WM8350_ROUT2_VOLUME, 0);
1534
1535         /* Latch VU bits & mute */
1536         wm8350_set_bits(wm8350, WM8350_LOUT1_VOLUME,
1537                         WM8350_OUT1_VU | WM8350_OUT1L_MUTE);
1538         wm8350_set_bits(wm8350, WM8350_LOUT2_VOLUME,
1539                         WM8350_OUT2_VU | WM8350_OUT2L_MUTE);
1540         wm8350_set_bits(wm8350, WM8350_ROUT1_VOLUME,
1541                         WM8350_OUT1_VU | WM8350_OUT1R_MUTE);
1542         wm8350_set_bits(wm8350, WM8350_ROUT2_VOLUME,
1543                         WM8350_OUT2_VU | WM8350_OUT2R_MUTE);
1544
1545         /* Make sure jack detect is disabled to start off with */
1546         wm8350_clear_bits(wm8350, WM8350_JACK_DETECT,
1547                           WM8350_JDL_ENA | WM8350_JDR_ENA);
1548
1549         wm8350_register_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_L,
1550                             wm8350_hp_jack_handler, 0, "Left jack detect",
1551                             priv);
1552         wm8350_register_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R,
1553                             wm8350_hp_jack_handler, 0, "Right jack detect",
1554                             priv);
1555         wm8350_register_irq(wm8350, WM8350_IRQ_CODEC_MICSCD,
1556                             wm8350_mic_handler, 0, "Microphone short", priv);
1557         wm8350_register_irq(wm8350, WM8350_IRQ_CODEC_MICD,
1558                             wm8350_mic_handler, 0, "Microphone detect", priv);
1559
1560         ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1561         if (ret < 0) {
1562                 dev_err(&pdev->dev, "failed to create pcms\n");
1563                 return ret;
1564         }
1565
1566         snd_soc_add_controls(codec, wm8350_snd_controls,
1567                                 ARRAY_SIZE(wm8350_snd_controls));
1568         wm8350_add_widgets(codec);
1569
1570         wm8350_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1571
1572         return 0;
1573 }
1574
1575 static int wm8350_remove(struct platform_device *pdev)
1576 {
1577         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1578         struct snd_soc_codec *codec = socdev->card->codec;
1579         struct wm8350 *wm8350 = codec->control_data;
1580         struct wm8350_data *priv = snd_soc_codec_get_drvdata(codec);
1581         int ret;
1582
1583         wm8350_clear_bits(wm8350, WM8350_JACK_DETECT,
1584                           WM8350_JDL_ENA | WM8350_JDR_ENA);
1585         wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_4, WM8350_TOCLK_ENA);
1586
1587         wm8350_free_irq(wm8350, WM8350_IRQ_CODEC_MICD, priv);
1588         wm8350_free_irq(wm8350, WM8350_IRQ_CODEC_MICSCD, priv);
1589         wm8350_free_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_L, priv);
1590         wm8350_free_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R, priv);
1591
1592         priv->hpl.jack = NULL;
1593         priv->hpr.jack = NULL;
1594         priv->mic.jack = NULL;
1595
1596         /* cancel any work waiting to be queued. */
1597         ret = cancel_delayed_work(&codec->delayed_work);
1598
1599         /* if there was any work waiting then we run it now and
1600          * wait for its completion */
1601         if (ret) {
1602                 schedule_delayed_work(&codec->delayed_work, 0);
1603                 flush_scheduled_work();
1604         }
1605
1606         wm8350_set_bias_level(codec, SND_SOC_BIAS_OFF);
1607
1608         wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_5, WM8350_CODEC_ENA);
1609
1610         return 0;
1611 }
1612
1613 #define WM8350_RATES (SNDRV_PCM_RATE_8000_96000)
1614
1615 #define WM8350_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1616                         SNDRV_PCM_FMTBIT_S20_3LE |\
1617                         SNDRV_PCM_FMTBIT_S24_LE)
1618
1619 static struct snd_soc_dai_ops wm8350_dai_ops = {
1620          .hw_params     = wm8350_pcm_hw_params,
1621          .digital_mute  = wm8350_mute,
1622          .trigger       = wm8350_pcm_trigger,
1623          .set_fmt       = wm8350_set_dai_fmt,
1624          .set_sysclk    = wm8350_set_dai_sysclk,
1625          .set_pll       = wm8350_set_fll,
1626          .set_clkdiv    = wm8350_set_clkdiv,
1627 };
1628
1629 struct snd_soc_dai wm8350_dai = {
1630         .name = "WM8350",
1631         .playback = {
1632                 .stream_name = "Playback",
1633                 .channels_min = 1,
1634                 .channels_max = 2,
1635                 .rates = WM8350_RATES,
1636                 .formats = WM8350_FORMATS,
1637         },
1638         .capture = {
1639                  .stream_name = "Capture",
1640                  .channels_min = 1,
1641                  .channels_max = 2,
1642                  .rates = WM8350_RATES,
1643                  .formats = WM8350_FORMATS,
1644          },
1645         .ops = &wm8350_dai_ops,
1646 };
1647 EXPORT_SYMBOL_GPL(wm8350_dai);
1648
1649 struct snd_soc_codec_device soc_codec_dev_wm8350 = {
1650         .probe =        wm8350_probe,
1651         .remove =       wm8350_remove,
1652         .suspend =      wm8350_suspend,
1653         .resume =       wm8350_resume,
1654 };
1655 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8350);
1656
1657 static __devinit int wm8350_codec_probe(struct platform_device *pdev)
1658 {
1659         struct wm8350 *wm8350 = platform_get_drvdata(pdev);
1660         struct wm8350_data *priv;
1661         struct snd_soc_codec *codec;
1662         int ret, i;
1663
1664         if (wm8350->codec.platform_data == NULL) {
1665                 dev_err(&pdev->dev, "No audio platform data supplied\n");
1666                 return -EINVAL;
1667         }
1668
1669         priv = kzalloc(sizeof(struct wm8350_data), GFP_KERNEL);
1670         if (priv == NULL)
1671                 return -ENOMEM;
1672
1673         for (i = 0; i < ARRAY_SIZE(supply_names); i++)
1674                 priv->supplies[i].supply = supply_names[i];
1675
1676         ret = regulator_bulk_get(wm8350->dev, ARRAY_SIZE(priv->supplies),
1677                                  priv->supplies);
1678         if (ret != 0)
1679                 goto err_priv;
1680
1681         codec = &priv->codec;
1682         wm8350->codec.codec = codec;
1683
1684         wm8350_dai.dev = &pdev->dev;
1685
1686         mutex_init(&codec->mutex);
1687         INIT_LIST_HEAD(&codec->dapm_widgets);
1688         INIT_LIST_HEAD(&codec->dapm_paths);
1689         codec->dev = &pdev->dev;
1690         codec->name = "WM8350";
1691         codec->owner = THIS_MODULE;
1692         codec->read = wm8350_codec_read;
1693         codec->write = wm8350_codec_write;
1694         codec->bias_level = SND_SOC_BIAS_OFF;
1695         codec->set_bias_level = wm8350_set_bias_level;
1696         codec->dai = &wm8350_dai;
1697         codec->num_dai = 1;
1698         codec->reg_cache_size = WM8350_MAX_REGISTER;
1699         snd_soc_codec_set_drvdata(codec, priv);
1700         codec->control_data = wm8350;
1701
1702         /* Put the codec into reset if it wasn't already */
1703         wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_5, WM8350_CODEC_ENA);
1704
1705         INIT_DELAYED_WORK(&codec->delayed_work, wm8350_pga_work);
1706         ret = snd_soc_register_codec(codec);
1707         if (ret != 0)
1708                 goto err_supply;
1709
1710         wm8350_codec = codec;
1711
1712         ret = snd_soc_register_dai(&wm8350_dai);
1713         if (ret != 0)
1714                 goto err_codec;
1715         return 0;
1716
1717 err_codec:
1718         snd_soc_unregister_codec(codec);
1719 err_supply:
1720         regulator_bulk_free(ARRAY_SIZE(priv->supplies), priv->supplies);
1721 err_priv:
1722         kfree(priv);
1723         wm8350_codec = NULL;
1724         return ret;
1725 }
1726
1727 static int __devexit wm8350_codec_remove(struct platform_device *pdev)
1728 {
1729         struct wm8350 *wm8350 = platform_get_drvdata(pdev);
1730         struct snd_soc_codec *codec = wm8350->codec.codec;
1731         struct wm8350_data *priv = snd_soc_codec_get_drvdata(codec);
1732
1733         snd_soc_unregister_dai(&wm8350_dai);
1734         snd_soc_unregister_codec(codec);
1735         regulator_bulk_free(ARRAY_SIZE(priv->supplies), priv->supplies);
1736         kfree(priv);
1737         wm8350_codec = NULL;
1738         return 0;
1739 }
1740
1741 static struct platform_driver wm8350_codec_driver = {
1742         .driver = {
1743                    .name = "wm8350-codec",
1744                    .owner = THIS_MODULE,
1745                    },
1746         .probe = wm8350_codec_probe,
1747         .remove = __devexit_p(wm8350_codec_remove),
1748 };
1749
1750 static __init int wm8350_init(void)
1751 {
1752         return platform_driver_register(&wm8350_codec_driver);
1753 }
1754 module_init(wm8350_init);
1755
1756 static __exit void wm8350_exit(void)
1757 {
1758         platform_driver_unregister(&wm8350_codec_driver);
1759 }
1760 module_exit(wm8350_exit);
1761
1762 MODULE_DESCRIPTION("ASoC WM8350 driver");
1763 MODULE_AUTHOR("Liam Girdwood");
1764 MODULE_LICENSE("GPL");
1765 MODULE_ALIAS("platform:wm8350-codec");