2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl.h>
30 #include <linux/slab.h>
31 #include <sound/core.h>
32 #include <sound/pcm.h>
33 #include <sound/pcm_params.h>
34 #include <sound/soc.h>
35 #include <sound/initval.h>
36 #include <sound/tlv.h>
38 /* Register descriptions are here */
39 #include <linux/mfd/twl4030-audio.h>
41 /* Shadow register used by the audio driver */
42 #define TWL4030_REG_SW_SHADOW 0x4A
43 #define TWL4030_CACHEREGNUM (TWL4030_REG_SW_SHADOW + 1)
45 /* TWL4030_REG_SW_SHADOW (0x4A) Fields */
46 #define TWL4030_HFL_EN 0x01
47 #define TWL4030_HFR_EN 0x02
50 * twl4030 register cache & default register settings
52 static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
53 0x00, /* this register not used */
54 0x00, /* REG_CODEC_MODE (0x1) */
55 0x00, /* REG_OPTION (0x2) */
56 0x00, /* REG_UNKNOWN (0x3) */
57 0x00, /* REG_MICBIAS_CTL (0x4) */
58 0x01, /* REG_ANAMICL (0x5) */
59 0x00, /* REG_ANAMICR (0x6) */
60 0x00, /* REG_AVADC_CTL (0x7) */
61 0x00, /* REG_ADCMICSEL (0x8) */
62 0x00, /* REG_DIGMIXING (0x9) */
63 0x0f, /* REG_ATXL1PGA (0xA) */
64 0x0f, /* REG_ATXR1PGA (0xB) */
65 0x0f, /* REG_AVTXL2PGA (0xC) */
66 0x0f, /* REG_AVTXR2PGA (0xD) */
67 0x00, /* REG_AUDIO_IF (0xE) */
68 0x00, /* REG_VOICE_IF (0xF) */
69 0x3f, /* REG_ARXR1PGA (0x10) */
70 0x3f, /* REG_ARXL1PGA (0x11) */
71 0x3f, /* REG_ARXR2PGA (0x12) */
72 0x3f, /* REG_ARXL2PGA (0x13) */
73 0x25, /* REG_VRXPGA (0x14) */
74 0x00, /* REG_VSTPGA (0x15) */
75 0x00, /* REG_VRX2ARXPGA (0x16) */
76 0x00, /* REG_AVDAC_CTL (0x17) */
77 0x00, /* REG_ARX2VTXPGA (0x18) */
78 0x32, /* REG_ARXL1_APGA_CTL (0x19) */
79 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */
80 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */
81 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */
82 0x00, /* REG_ATX2ARXPGA (0x1D) */
83 0x00, /* REG_BT_IF (0x1E) */
84 0x55, /* REG_BTPGA (0x1F) */
85 0x00, /* REG_BTSTPGA (0x20) */
86 0x00, /* REG_EAR_CTL (0x21) */
87 0x00, /* REG_HS_SEL (0x22) */
88 0x00, /* REG_HS_GAIN_SET (0x23) */
89 0x00, /* REG_HS_POPN_SET (0x24) */
90 0x00, /* REG_PREDL_CTL (0x25) */
91 0x00, /* REG_PREDR_CTL (0x26) */
92 0x00, /* REG_PRECKL_CTL (0x27) */
93 0x00, /* REG_PRECKR_CTL (0x28) */
94 0x00, /* REG_HFL_CTL (0x29) */
95 0x00, /* REG_HFR_CTL (0x2A) */
96 0x05, /* REG_ALC_CTL (0x2B) */
97 0x00, /* REG_ALC_SET1 (0x2C) */
98 0x00, /* REG_ALC_SET2 (0x2D) */
99 0x00, /* REG_BOOST_CTL (0x2E) */
100 0x00, /* REG_SOFTVOL_CTL (0x2F) */
101 0x13, /* REG_DTMF_FREQSEL (0x30) */
102 0x00, /* REG_DTMF_TONEXT1H (0x31) */
103 0x00, /* REG_DTMF_TONEXT1L (0x32) */
104 0x00, /* REG_DTMF_TONEXT2H (0x33) */
105 0x00, /* REG_DTMF_TONEXT2L (0x34) */
106 0x79, /* REG_DTMF_TONOFF (0x35) */
107 0x11, /* REG_DTMF_WANONOFF (0x36) */
108 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
109 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
110 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
111 0x06, /* REG_APLL_CTL (0x3A) */
112 0x00, /* REG_DTMF_CTL (0x3B) */
113 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */
114 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */
115 0x00, /* REG_MISC_SET_1 (0x3E) */
116 0x00, /* REG_PCMBTMUX (0x3F) */
117 0x00, /* not used (0x40) */
118 0x00, /* not used (0x41) */
119 0x00, /* not used (0x42) */
120 0x00, /* REG_RX_PATH_SEL (0x43) */
121 0x32, /* REG_VDL_APGA_CTL (0x44) */
122 0x00, /* REG_VIBRA_CTL (0x45) */
123 0x00, /* REG_VIBRA_SET (0x46) */
124 0x00, /* REG_VIBRA_PWM_SET (0x47) */
125 0x00, /* REG_ANAMIC_GAIN (0x48) */
126 0x00, /* REG_MISC_SET_2 (0x49) */
127 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
130 /* codec private data */
131 struct twl4030_priv {
132 unsigned int codec_powered;
134 /* reference counts of AIF/APLL users */
135 unsigned int apll_enabled;
137 struct snd_pcm_substream *master_substream;
138 struct snd_pcm_substream *slave_substream;
140 unsigned int configured;
142 unsigned int sample_bits;
143 unsigned int channels;
147 /* Output (with associated amp) states */
148 u8 hsl_enabled, hsr_enabled;
150 u8 predrivel_enabled, predriver_enabled;
151 u8 carkitl_enabled, carkitr_enabled;
153 /* Delay needed after enabling the digimic interface */
154 unsigned int digimic_delay;
158 * read twl4030 register cache
160 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
163 u8 *cache = codec->reg_cache;
165 if (reg >= TWL4030_CACHEREGNUM)
172 * write twl4030 register cache
174 static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
177 u8 *cache = codec->reg_cache;
179 if (reg >= TWL4030_CACHEREGNUM)
185 * write to the twl4030 register space
187 static int twl4030_write(struct snd_soc_codec *codec,
188 unsigned int reg, unsigned int value)
190 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
191 int write_to_reg = 0;
193 twl4030_write_reg_cache(codec, reg, value);
194 if (likely(reg < TWL4030_REG_SW_SHADOW)) {
195 /* Decide if the given register can be written */
197 case TWL4030_REG_EAR_CTL:
198 if (twl4030->earpiece_enabled)
201 case TWL4030_REG_PREDL_CTL:
202 if (twl4030->predrivel_enabled)
205 case TWL4030_REG_PREDR_CTL:
206 if (twl4030->predriver_enabled)
209 case TWL4030_REG_PRECKL_CTL:
210 if (twl4030->carkitl_enabled)
213 case TWL4030_REG_PRECKR_CTL:
214 if (twl4030->carkitr_enabled)
217 case TWL4030_REG_HS_GAIN_SET:
218 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
222 /* All other register can be written */
227 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
233 static inline void twl4030_wait_ms(int time)
237 usleep_range(time, time + 500);
243 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
245 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
248 if (enable == twl4030->codec_powered)
252 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
254 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
257 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
258 twl4030->codec_powered = enable;
261 /* REVISIT: this delay is present in TI sample drivers */
262 /* but there seems to be no TRM requirement for it */
266 static inline void twl4030_check_defaults(struct snd_soc_codec *codec)
268 int i, difference = 0;
271 dev_dbg(codec->dev, "Checking TWL audio default configuration\n");
272 for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) {
273 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i);
274 if (val != twl4030_reg[i]) {
277 "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n",
278 i, val, twl4030_reg[i]);
281 dev_dbg(codec->dev, "Found %d non-matching registers. %s\n",
282 difference, difference ? "Not OK" : "OK");
285 static inline void twl4030_reset_registers(struct snd_soc_codec *codec)
289 /* set all audio section registers to reasonable defaults */
290 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
291 if (i != TWL4030_REG_APLL_CTL)
292 twl4030_write(codec, i, twl4030_reg[i]);
296 static void twl4030_init_chip(struct snd_soc_codec *codec)
298 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
299 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
303 /* Check defaults, if instructed before anything else */
304 if (pdata && pdata->check_defaults)
305 twl4030_check_defaults(codec);
307 /* Reset registers, if no setup data or if instructed to do so */
308 if (!pdata || (pdata && pdata->reset_registers))
309 twl4030_reset_registers(codec);
311 /* Refresh APLL_CTL register from HW */
312 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
313 TWL4030_REG_APLL_CTL);
314 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte);
316 /* anti-pop when changing analog gain */
317 reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
318 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
319 reg | TWL4030_SMOOTH_ANAVOL_EN);
321 twl4030_write(codec, TWL4030_REG_OPTION,
322 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
323 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
325 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
326 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
328 /* Machine dependent setup */
332 twl4030->digimic_delay = pdata->digimic_delay;
334 reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
335 reg &= ~TWL4030_RAMP_DELAY;
336 reg |= (pdata->ramp_delay_value << 2);
337 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg);
339 /* initiate offset cancellation */
340 twl4030_codec_enable(codec, 1);
342 reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
343 reg &= ~TWL4030_OFFSET_CNCL_SEL;
344 reg |= pdata->offset_cncl_path;
345 twl4030_write(codec, TWL4030_REG_ANAMICL,
346 reg | TWL4030_CNCL_OFFSET_START);
349 * Wait for offset cancellation to complete.
350 * Since this takes a while, do not slam the i2c.
351 * Start polling the status after ~20ms.
355 usleep_range(1000, 2000);
356 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
357 TWL4030_REG_ANAMICL);
358 } while ((i++ < 100) &&
359 ((byte & TWL4030_CNCL_OFFSET_START) ==
360 TWL4030_CNCL_OFFSET_START));
362 /* Make sure that the reg_cache has the same value as the HW */
363 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
365 twl4030_codec_enable(codec, 0);
368 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
370 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
374 twl4030->apll_enabled++;
375 if (twl4030->apll_enabled == 1)
376 status = twl4030_audio_enable_resource(
377 TWL4030_AUDIO_RES_APLL);
379 twl4030->apll_enabled--;
380 if (!twl4030->apll_enabled)
381 status = twl4030_audio_disable_resource(
382 TWL4030_AUDIO_RES_APLL);
386 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
390 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
391 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
392 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
393 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
394 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
398 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
399 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
400 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
401 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
402 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
406 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
407 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
408 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
409 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
410 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
414 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
415 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
416 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
417 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
421 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
422 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
423 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
424 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
428 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
429 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
430 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
431 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
435 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
436 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
437 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
438 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
442 static const char *twl4030_handsfreel_texts[] =
443 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
445 static const struct soc_enum twl4030_handsfreel_enum =
446 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
447 ARRAY_SIZE(twl4030_handsfreel_texts),
448 twl4030_handsfreel_texts);
450 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
451 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
453 /* Handsfree Left virtual mute */
454 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
455 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
457 /* Handsfree Right */
458 static const char *twl4030_handsfreer_texts[] =
459 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
461 static const struct soc_enum twl4030_handsfreer_enum =
462 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
463 ARRAY_SIZE(twl4030_handsfreer_texts),
464 twl4030_handsfreer_texts);
466 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
467 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
469 /* Handsfree Right virtual mute */
470 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
471 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
474 /* Vibra audio path selection */
475 static const char *twl4030_vibra_texts[] =
476 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
478 static const struct soc_enum twl4030_vibra_enum =
479 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
480 ARRAY_SIZE(twl4030_vibra_texts),
481 twl4030_vibra_texts);
483 static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
484 SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
486 /* Vibra path selection: local vibrator (PWM) or audio driven */
487 static const char *twl4030_vibrapath_texts[] =
488 {"Local vibrator", "Audio"};
490 static const struct soc_enum twl4030_vibrapath_enum =
491 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
492 ARRAY_SIZE(twl4030_vibrapath_texts),
493 twl4030_vibrapath_texts);
495 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
496 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
498 /* Left analog microphone selection */
499 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
500 SOC_DAPM_SINGLE("Main Mic Capture Switch",
501 TWL4030_REG_ANAMICL, 0, 1, 0),
503 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
504 TWL4030_REG_ANAMICL, 1, 1, 0),
506 SOC_DAPM_SINGLE("AUXL Capture Switch",
507 TWL4030_REG_ANAMICL, 2, 1, 0),
509 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
510 TWL4030_REG_ANAMICL, 3, 1, 0),
514 /* Right analog microphone selection */
515 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
516 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
517 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
520 /* TX1 L/R Analog/Digital microphone selection */
521 static const char *twl4030_micpathtx1_texts[] =
522 {"Analog", "Digimic0"};
524 static const struct soc_enum twl4030_micpathtx1_enum =
525 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
526 ARRAY_SIZE(twl4030_micpathtx1_texts),
527 twl4030_micpathtx1_texts);
529 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
530 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
532 /* TX2 L/R Analog/Digital microphone selection */
533 static const char *twl4030_micpathtx2_texts[] =
534 {"Analog", "Digimic1"};
536 static const struct soc_enum twl4030_micpathtx2_enum =
537 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
538 ARRAY_SIZE(twl4030_micpathtx2_texts),
539 twl4030_micpathtx2_texts);
541 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
542 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
544 /* Analog bypass for AudioR1 */
545 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
546 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
548 /* Analog bypass for AudioL1 */
549 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
550 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
552 /* Analog bypass for AudioR2 */
553 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
554 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
556 /* Analog bypass for AudioL2 */
557 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
558 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
560 /* Analog bypass for Voice */
561 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
562 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
564 /* Digital bypass gain, mute instead of -30dB */
565 static const unsigned int twl4030_dapm_dbypass_tlv[] = {
566 TLV_DB_RANGE_HEAD(3),
567 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
568 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
569 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
572 /* Digital bypass left (TX1L -> RX2L) */
573 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
574 SOC_DAPM_SINGLE_TLV("Volume",
575 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
576 twl4030_dapm_dbypass_tlv);
578 /* Digital bypass right (TX1R -> RX2R) */
579 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
580 SOC_DAPM_SINGLE_TLV("Volume",
581 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
582 twl4030_dapm_dbypass_tlv);
585 * Voice Sidetone GAIN volume control:
586 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
588 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
590 /* Digital bypass voice: sidetone (VUL -> VDL)*/
591 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
592 SOC_DAPM_SINGLE_TLV("Volume",
593 TWL4030_REG_VSTPGA, 0, 0x29, 0,
594 twl4030_dapm_dbypassv_tlv);
597 * Output PGA builder:
598 * Handle the muting and unmuting of the given output (turning off the
599 * amplifier associated with the output pin)
600 * On mute bypass the reg_cache and write 0 to the register
601 * On unmute: restore the register content from the reg_cache
602 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
604 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
605 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
606 struct snd_kcontrol *kcontrol, int event) \
608 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
611 case SND_SOC_DAPM_POST_PMU: \
612 twl4030->pin_name##_enabled = 1; \
613 twl4030_write(w->codec, reg, \
614 twl4030_read_reg_cache(w->codec, reg)); \
616 case SND_SOC_DAPM_POST_PMD: \
617 twl4030->pin_name##_enabled = 0; \
618 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
625 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
626 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
627 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
628 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
629 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
631 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
633 unsigned char hs_ctl;
635 hs_ctl = twl4030_read_reg_cache(codec, reg);
639 hs_ctl |= TWL4030_HF_CTL_REF_EN;
640 twl4030_write(codec, reg, hs_ctl);
642 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
643 twl4030_write(codec, reg, hs_ctl);
645 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
646 hs_ctl |= TWL4030_HF_CTL_HB_EN;
647 twl4030_write(codec, reg, hs_ctl);
650 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
651 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
652 twl4030_write(codec, reg, hs_ctl);
653 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
654 twl4030_write(codec, reg, hs_ctl);
656 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
657 twl4030_write(codec, reg, hs_ctl);
661 static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
662 struct snd_kcontrol *kcontrol, int event)
665 case SND_SOC_DAPM_POST_PMU:
666 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
668 case SND_SOC_DAPM_POST_PMD:
669 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
675 static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
676 struct snd_kcontrol *kcontrol, int event)
679 case SND_SOC_DAPM_POST_PMU:
680 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
682 case SND_SOC_DAPM_POST_PMD:
683 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
689 static int vibramux_event(struct snd_soc_dapm_widget *w,
690 struct snd_kcontrol *kcontrol, int event)
692 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
696 static int apll_event(struct snd_soc_dapm_widget *w,
697 struct snd_kcontrol *kcontrol, int event)
700 case SND_SOC_DAPM_PRE_PMU:
701 twl4030_apll_enable(w->codec, 1);
703 case SND_SOC_DAPM_POST_PMD:
704 twl4030_apll_enable(w->codec, 0);
710 static int aif_event(struct snd_soc_dapm_widget *w,
711 struct snd_kcontrol *kcontrol, int event)
715 audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
717 case SND_SOC_DAPM_PRE_PMU:
719 /* enable the PLL before we use it to clock the DAI */
720 twl4030_apll_enable(w->codec, 1);
722 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
723 audio_if | TWL4030_AIF_EN);
725 case SND_SOC_DAPM_POST_PMD:
726 /* disable the DAI before we stop it's source PLL */
727 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
728 audio_if & ~TWL4030_AIF_EN);
729 twl4030_apll_enable(w->codec, 0);
735 static void headset_ramp(struct snd_soc_codec *codec, int ramp)
737 struct twl4030_codec_data *pdata = codec->dev->platform_data;
738 unsigned char hs_gain, hs_pop;
739 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
740 /* Base values for ramp delay calculation: 2^19 - 2^26 */
741 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
742 8388608, 16777216, 33554432, 67108864};
745 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
746 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
747 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
748 twl4030->sysclk) + 1;
750 /* Enable external mute control, this dramatically reduces
752 if (pdata && pdata->hs_extmute) {
753 if (pdata->set_hs_extmute) {
754 pdata->set_hs_extmute(1);
756 hs_pop |= TWL4030_EXTMUTE;
757 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
762 /* Headset ramp-up according to the TRM */
763 hs_pop |= TWL4030_VMID_EN;
764 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
765 /* Actually write to the register */
766 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
768 TWL4030_REG_HS_GAIN_SET);
769 hs_pop |= TWL4030_RAMP_EN;
770 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
771 /* Wait ramp delay time + 1, so the VMID can settle */
772 twl4030_wait_ms(delay);
774 /* Headset ramp-down _not_ according to
775 * the TRM, but in a way that it is working */
776 hs_pop &= ~TWL4030_RAMP_EN;
777 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
778 /* Wait ramp delay time + 1, so the VMID can settle */
779 twl4030_wait_ms(delay);
780 /* Bypass the reg_cache to mute the headset */
781 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
783 TWL4030_REG_HS_GAIN_SET);
785 hs_pop &= ~TWL4030_VMID_EN;
786 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
789 /* Disable external mute */
790 if (pdata && pdata->hs_extmute) {
791 if (pdata->set_hs_extmute) {
792 pdata->set_hs_extmute(0);
794 hs_pop &= ~TWL4030_EXTMUTE;
795 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
800 static int headsetlpga_event(struct snd_soc_dapm_widget *w,
801 struct snd_kcontrol *kcontrol, int event)
803 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
806 case SND_SOC_DAPM_POST_PMU:
807 /* Do the ramp-up only once */
808 if (!twl4030->hsr_enabled)
809 headset_ramp(w->codec, 1);
811 twl4030->hsl_enabled = 1;
813 case SND_SOC_DAPM_POST_PMD:
814 /* Do the ramp-down only if both headsetL/R is disabled */
815 if (!twl4030->hsr_enabled)
816 headset_ramp(w->codec, 0);
818 twl4030->hsl_enabled = 0;
824 static int headsetrpga_event(struct snd_soc_dapm_widget *w,
825 struct snd_kcontrol *kcontrol, int event)
827 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
830 case SND_SOC_DAPM_POST_PMU:
831 /* Do the ramp-up only once */
832 if (!twl4030->hsl_enabled)
833 headset_ramp(w->codec, 1);
835 twl4030->hsr_enabled = 1;
837 case SND_SOC_DAPM_POST_PMD:
838 /* Do the ramp-down only if both headsetL/R is disabled */
839 if (!twl4030->hsl_enabled)
840 headset_ramp(w->codec, 0);
842 twl4030->hsr_enabled = 0;
848 static int digimic_event(struct snd_soc_dapm_widget *w,
849 struct snd_kcontrol *kcontrol, int event)
851 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
853 if (twl4030->digimic_delay)
854 twl4030_wait_ms(twl4030->digimic_delay);
859 * Some of the gain controls in TWL (mostly those which are associated with
860 * the outputs) are implemented in an interesting way:
861 * 0x0 : Power down (mute)
865 * Inverting not going to help with these.
866 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
868 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
869 struct snd_ctl_elem_value *ucontrol)
871 struct soc_mixer_control *mc =
872 (struct soc_mixer_control *)kcontrol->private_value;
873 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
874 unsigned int reg = mc->reg;
875 unsigned int shift = mc->shift;
876 unsigned int rshift = mc->rshift;
878 int mask = (1 << fls(max)) - 1;
880 ucontrol->value.integer.value[0] =
881 (snd_soc_read(codec, reg) >> shift) & mask;
882 if (ucontrol->value.integer.value[0])
883 ucontrol->value.integer.value[0] =
884 max + 1 - ucontrol->value.integer.value[0];
886 if (shift != rshift) {
887 ucontrol->value.integer.value[1] =
888 (snd_soc_read(codec, reg) >> rshift) & mask;
889 if (ucontrol->value.integer.value[1])
890 ucontrol->value.integer.value[1] =
891 max + 1 - ucontrol->value.integer.value[1];
897 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
898 struct snd_ctl_elem_value *ucontrol)
900 struct soc_mixer_control *mc =
901 (struct soc_mixer_control *)kcontrol->private_value;
902 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
903 unsigned int reg = mc->reg;
904 unsigned int shift = mc->shift;
905 unsigned int rshift = mc->rshift;
907 int mask = (1 << fls(max)) - 1;
908 unsigned short val, val2, val_mask;
910 val = (ucontrol->value.integer.value[0] & mask);
912 val_mask = mask << shift;
916 if (shift != rshift) {
917 val2 = (ucontrol->value.integer.value[1] & mask);
918 val_mask |= mask << rshift;
920 val2 = max + 1 - val2;
921 val |= val2 << rshift;
923 return snd_soc_update_bits(codec, reg, val_mask, val);
926 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
927 struct snd_ctl_elem_value *ucontrol)
929 struct soc_mixer_control *mc =
930 (struct soc_mixer_control *)kcontrol->private_value;
931 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
932 unsigned int reg = mc->reg;
933 unsigned int reg2 = mc->rreg;
934 unsigned int shift = mc->shift;
936 int mask = (1<<fls(max))-1;
938 ucontrol->value.integer.value[0] =
939 (snd_soc_read(codec, reg) >> shift) & mask;
940 ucontrol->value.integer.value[1] =
941 (snd_soc_read(codec, reg2) >> shift) & mask;
943 if (ucontrol->value.integer.value[0])
944 ucontrol->value.integer.value[0] =
945 max + 1 - ucontrol->value.integer.value[0];
946 if (ucontrol->value.integer.value[1])
947 ucontrol->value.integer.value[1] =
948 max + 1 - ucontrol->value.integer.value[1];
953 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
954 struct snd_ctl_elem_value *ucontrol)
956 struct soc_mixer_control *mc =
957 (struct soc_mixer_control *)kcontrol->private_value;
958 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
959 unsigned int reg = mc->reg;
960 unsigned int reg2 = mc->rreg;
961 unsigned int shift = mc->shift;
963 int mask = (1 << fls(max)) - 1;
965 unsigned short val, val2, val_mask;
967 val_mask = mask << shift;
968 val = (ucontrol->value.integer.value[0] & mask);
969 val2 = (ucontrol->value.integer.value[1] & mask);
974 val2 = max + 1 - val2;
977 val2 = val2 << shift;
979 err = snd_soc_update_bits(codec, reg, val_mask, val);
983 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
987 /* Codec operation modes */
988 static const char *twl4030_op_modes_texts[] = {
989 "Option 2 (voice/audio)", "Option 1 (audio)"
992 static const struct soc_enum twl4030_op_modes_enum =
993 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
994 ARRAY_SIZE(twl4030_op_modes_texts),
995 twl4030_op_modes_texts);
997 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
998 struct snd_ctl_elem_value *ucontrol)
1000 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1001 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1002 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1004 unsigned short mask, bitmask;
1006 if (twl4030->configured) {
1007 printk(KERN_ERR "twl4030 operation mode cannot be "
1008 "changed on-the-fly\n");
1012 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
1014 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1017 val = ucontrol->value.enumerated.item[0] << e->shift_l;
1018 mask = (bitmask - 1) << e->shift_l;
1019 if (e->shift_l != e->shift_r) {
1020 if (ucontrol->value.enumerated.item[1] > e->max - 1)
1022 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
1023 mask |= (bitmask - 1) << e->shift_r;
1026 return snd_soc_update_bits(codec, e->reg, mask, val);
1030 * FGAIN volume control:
1031 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1033 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
1036 * CGAIN volume control:
1037 * 0 dB to 12 dB in 6 dB steps
1038 * value 2 and 3 means 12 dB
1040 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1043 * Voice Downlink GAIN volume control:
1044 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1046 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1049 * Analog playback gain
1050 * -24 dB to 12 dB in 2 dB steps
1052 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
1055 * Gain controls tied to outputs
1056 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1058 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1061 * Gain control for earpiece amplifier
1062 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1064 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1067 * Capture gain after the ADCs
1068 * from 0 dB to 31 dB in 1 dB steps
1070 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1073 * Gain control for input amplifiers
1074 * 0 dB to 30 dB in 6 dB steps
1076 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1078 /* AVADC clock priority */
1079 static const char *twl4030_avadc_clk_priority_texts[] = {
1080 "Voice high priority", "HiFi high priority"
1083 static const struct soc_enum twl4030_avadc_clk_priority_enum =
1084 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1085 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1086 twl4030_avadc_clk_priority_texts);
1088 static const char *twl4030_rampdelay_texts[] = {
1089 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1090 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1094 static const struct soc_enum twl4030_rampdelay_enum =
1095 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1096 ARRAY_SIZE(twl4030_rampdelay_texts),
1097 twl4030_rampdelay_texts);
1099 /* Vibra H-bridge direction mode */
1100 static const char *twl4030_vibradirmode_texts[] = {
1101 "Vibra H-bridge direction", "Audio data MSB",
1104 static const struct soc_enum twl4030_vibradirmode_enum =
1105 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1106 ARRAY_SIZE(twl4030_vibradirmode_texts),
1107 twl4030_vibradirmode_texts);
1109 /* Vibra H-bridge direction */
1110 static const char *twl4030_vibradir_texts[] = {
1111 "Positive polarity", "Negative polarity",
1114 static const struct soc_enum twl4030_vibradir_enum =
1115 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1116 ARRAY_SIZE(twl4030_vibradir_texts),
1117 twl4030_vibradir_texts);
1119 /* Digimic Left and right swapping */
1120 static const char *twl4030_digimicswap_texts[] = {
1121 "Not swapped", "Swapped",
1124 static const struct soc_enum twl4030_digimicswap_enum =
1125 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1126 ARRAY_SIZE(twl4030_digimicswap_texts),
1127 twl4030_digimicswap_texts);
1129 static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1131 /* Codec operation mode control */
1132 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1133 snd_soc_get_enum_double,
1134 snd_soc_put_twl4030_opmode_enum_double),
1136 /* Common playback gain controls */
1137 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1138 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1139 0, 0x3f, 0, digital_fine_tlv),
1140 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1141 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1142 0, 0x3f, 0, digital_fine_tlv),
1144 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1145 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1146 6, 0x2, 0, digital_coarse_tlv),
1147 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1148 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1149 6, 0x2, 0, digital_coarse_tlv),
1151 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1152 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1153 3, 0x12, 1, analog_tlv),
1154 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1155 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1156 3, 0x12, 1, analog_tlv),
1157 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1158 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1160 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1161 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1164 /* Common voice downlink gain controls */
1165 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1166 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1168 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1169 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1171 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1172 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1174 /* Separate output gain controls */
1175 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
1176 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1177 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1178 snd_soc_put_volsw_r2_twl4030, output_tvl),
1180 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1181 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1182 snd_soc_put_volsw_twl4030, output_tvl),
1184 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
1185 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1186 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1187 snd_soc_put_volsw_r2_twl4030, output_tvl),
1189 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1190 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1191 snd_soc_put_volsw_twl4030, output_ear_tvl),
1193 /* Common capture gain controls */
1194 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1195 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1196 0, 0x1f, 0, digital_capture_tlv),
1197 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1198 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1199 0, 0x1f, 0, digital_capture_tlv),
1201 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1202 0, 3, 5, 0, input_gain_tlv),
1204 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1206 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1208 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1209 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1211 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1215 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1216 /* Left channel inputs */
1217 SND_SOC_DAPM_INPUT("MAINMIC"),
1218 SND_SOC_DAPM_INPUT("HSMIC"),
1219 SND_SOC_DAPM_INPUT("AUXL"),
1220 SND_SOC_DAPM_INPUT("CARKITMIC"),
1221 /* Right channel inputs */
1222 SND_SOC_DAPM_INPUT("SUBMIC"),
1223 SND_SOC_DAPM_INPUT("AUXR"),
1224 /* Digital microphones (Stereo) */
1225 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1226 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1229 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1230 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1231 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1232 SND_SOC_DAPM_OUTPUT("HSOL"),
1233 SND_SOC_DAPM_OUTPUT("HSOR"),
1234 SND_SOC_DAPM_OUTPUT("CARKITL"),
1235 SND_SOC_DAPM_OUTPUT("CARKITR"),
1236 SND_SOC_DAPM_OUTPUT("HFL"),
1237 SND_SOC_DAPM_OUTPUT("HFR"),
1238 SND_SOC_DAPM_OUTPUT("VIBRA"),
1240 /* AIF and APLL clocks for running DAIs (including loopback) */
1241 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1243 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1244 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1247 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1248 SND_SOC_NOPM, 0, 0),
1249 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1250 SND_SOC_NOPM, 0, 0),
1251 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1252 SND_SOC_NOPM, 0, 0),
1253 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1254 SND_SOC_NOPM, 0, 0),
1255 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1256 SND_SOC_NOPM, 0, 0),
1258 /* Analog bypasses */
1259 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1260 &twl4030_dapm_abypassr1_control),
1261 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1262 &twl4030_dapm_abypassl1_control),
1263 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1264 &twl4030_dapm_abypassr2_control),
1265 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1266 &twl4030_dapm_abypassl2_control),
1267 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1268 &twl4030_dapm_abypassv_control),
1270 /* Master analog loopback switch */
1271 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1274 /* Digital bypasses */
1275 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1276 &twl4030_dapm_dbypassl_control),
1277 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1278 &twl4030_dapm_dbypassr_control),
1279 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1280 &twl4030_dapm_dbypassv_control),
1282 /* Digital mixers, power control for the physical DACs */
1283 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1284 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1285 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1286 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1287 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1288 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1289 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1290 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1291 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1292 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1294 /* Analog mixers, power control for the physical PGAs */
1295 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1296 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1297 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1298 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1299 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1300 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1301 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1302 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1303 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1304 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1306 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1307 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1309 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1310 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1312 /* Output MIXER controls */
1314 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1315 &twl4030_dapm_earpiece_controls[0],
1316 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1317 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1318 0, 0, NULL, 0, earpiecepga_event,
1319 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1321 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1322 &twl4030_dapm_predrivel_controls[0],
1323 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1324 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1325 0, 0, NULL, 0, predrivelpga_event,
1326 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1327 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1328 &twl4030_dapm_predriver_controls[0],
1329 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1330 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1331 0, 0, NULL, 0, predriverpga_event,
1332 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1334 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1335 &twl4030_dapm_hsol_controls[0],
1336 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1337 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1338 0, 0, NULL, 0, headsetlpga_event,
1339 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1340 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1341 &twl4030_dapm_hsor_controls[0],
1342 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1343 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1344 0, 0, NULL, 0, headsetrpga_event,
1345 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1347 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1348 &twl4030_dapm_carkitl_controls[0],
1349 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1350 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1351 0, 0, NULL, 0, carkitlpga_event,
1352 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1353 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1354 &twl4030_dapm_carkitr_controls[0],
1355 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1356 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1357 0, 0, NULL, 0, carkitrpga_event,
1358 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1360 /* Output MUX controls */
1362 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1363 &twl4030_dapm_handsfreel_control),
1364 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1365 &twl4030_dapm_handsfreelmute_control),
1366 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1367 0, 0, NULL, 0, handsfreelpga_event,
1368 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1369 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1370 &twl4030_dapm_handsfreer_control),
1371 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1372 &twl4030_dapm_handsfreermute_control),
1373 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1374 0, 0, NULL, 0, handsfreerpga_event,
1375 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1377 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1378 &twl4030_dapm_vibra_control, vibramux_event,
1379 SND_SOC_DAPM_PRE_PMU),
1380 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1381 &twl4030_dapm_vibrapath_control),
1383 /* Introducing four virtual ADC, since TWL4030 have four channel for
1385 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1386 SND_SOC_NOPM, 0, 0),
1387 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1388 SND_SOC_NOPM, 0, 0),
1390 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1391 SND_SOC_NOPM, 0, 0),
1392 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1393 SND_SOC_NOPM, 0, 0),
1395 /* Analog/Digital mic path selection.
1396 TX1 Left/Right: either analog Left/Right or Digimic0
1397 TX2 Left/Right: either analog Left/Right or Digimic1 */
1398 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1399 &twl4030_dapm_micpathtx1_control),
1400 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1401 &twl4030_dapm_micpathtx2_control),
1403 /* Analog input mixers for the capture amplifiers */
1404 SND_SOC_DAPM_MIXER("Analog Left",
1405 TWL4030_REG_ANAMICL, 4, 0,
1406 &twl4030_dapm_analoglmic_controls[0],
1407 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1408 SND_SOC_DAPM_MIXER("Analog Right",
1409 TWL4030_REG_ANAMICR, 4, 0,
1410 &twl4030_dapm_analogrmic_controls[0],
1411 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1413 SND_SOC_DAPM_PGA("ADC Physical Left",
1414 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1415 SND_SOC_DAPM_PGA("ADC Physical Right",
1416 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1418 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1419 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1420 digimic_event, SND_SOC_DAPM_POST_PMU),
1421 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1422 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1423 digimic_event, SND_SOC_DAPM_POST_PMU),
1425 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1427 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1430 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1431 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1433 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
1437 static const struct snd_soc_dapm_route intercon[] = {
1439 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1440 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1441 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1442 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1443 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1445 /* Supply for the digital part (APLL) */
1446 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1448 {"DAC Left1", NULL, "AIF Enable"},
1449 {"DAC Right1", NULL, "AIF Enable"},
1450 {"DAC Left2", NULL, "AIF Enable"},
1451 {"DAC Right1", NULL, "AIF Enable"},
1453 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1454 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1456 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1457 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1458 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1459 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1460 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1462 /* Internal playback routings */
1464 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1465 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1466 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1467 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1468 {"Earpiece PGA", NULL, "Earpiece Mixer"},
1470 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1471 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1472 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1473 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1474 {"PredriveL PGA", NULL, "PredriveL Mixer"},
1476 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1477 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1478 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1479 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1480 {"PredriveR PGA", NULL, "PredriveR Mixer"},
1482 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1483 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1484 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1485 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1487 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1488 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1489 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1490 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1492 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1493 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1494 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1495 {"CarkitL PGA", NULL, "CarkitL Mixer"},
1497 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1498 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1499 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1500 {"CarkitR PGA", NULL, "CarkitR Mixer"},
1502 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1503 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1504 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1505 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1506 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1507 {"HandsfreeL PGA", NULL, "HandsfreeL"},
1509 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1510 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1511 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1512 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1513 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1514 {"HandsfreeR PGA", NULL, "HandsfreeR"},
1516 {"Vibra Mux", "AudioL1", "DAC Left1"},
1517 {"Vibra Mux", "AudioR1", "DAC Right1"},
1518 {"Vibra Mux", "AudioL2", "DAC Left2"},
1519 {"Vibra Mux", "AudioR2", "DAC Right2"},
1522 /* Must be always connected (for AIF and APLL) */
1523 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1524 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1525 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1526 {"Virtual HiFi OUT", NULL, "DAC Right2"},
1527 /* Must be always connected (for APLL) */
1528 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1529 /* Physical outputs */
1530 {"EARPIECE", NULL, "Earpiece PGA"},
1531 {"PREDRIVEL", NULL, "PredriveL PGA"},
1532 {"PREDRIVER", NULL, "PredriveR PGA"},
1533 {"HSOL", NULL, "HeadsetL PGA"},
1534 {"HSOR", NULL, "HeadsetR PGA"},
1535 {"CARKITL", NULL, "CarkitL PGA"},
1536 {"CARKITR", NULL, "CarkitR PGA"},
1537 {"HFL", NULL, "HandsfreeL PGA"},
1538 {"HFR", NULL, "HandsfreeR PGA"},
1539 {"Vibra Route", "Audio", "Vibra Mux"},
1540 {"VIBRA", NULL, "Vibra Route"},
1543 /* Must be always connected (for AIF and APLL) */
1544 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1545 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1546 // {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1547 // {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1548 /* Physical inputs */
1549 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1550 // {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1551 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1552 // {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1554 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1555 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1557 {"ADC Physical Left", NULL, "Analog Left"},
1558 {"ADC Physical Right", NULL, "Analog Right"},
1560 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1561 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1563 {"DIGIMIC0", NULL, "micbias1 select"},
1564 {"DIGIMIC1", NULL, "micbias2 select"},
1566 /* TX1 Left capture path */
1567 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1568 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1569 /* TX1 Right capture path */
1570 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1571 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1572 /* TX2 Left capture path */
1573 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1574 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1575 /* TX2 Right capture path */
1576 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1577 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1579 {"ADC Virtual Left1", NULL, "ADC Physical Left"},
1580 {"ADC Virtual Right1", NULL, "ADC Physical Right"},
1581 // {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1582 // {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1584 {"ADC Virtual Left1", NULL, "AIF Enable"},
1585 {"ADC Virtual Right1", NULL, "AIF Enable"},
1587 {"ADC Virtual Left2", NULL, "AIF Enable"},
1588 {"ADC Virtual Right2", NULL, "AIF Enable"},
1590 /* Analog bypass routes */
1591 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1592 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1593 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1594 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1595 {"Voice Analog Loopback", "Switch", "Analog Left"},
1597 /* Supply for the Analog loopbacks */
1598 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1599 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1600 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1601 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1602 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1604 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1605 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1606 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1607 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1608 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1610 /* Digital bypass routes */
1611 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1612 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1613 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1615 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1616 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1617 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1621 static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1622 enum snd_soc_bias_level level)
1625 case SND_SOC_BIAS_ON:
1627 case SND_SOC_BIAS_PREPARE:
1629 case SND_SOC_BIAS_STANDBY:
1630 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
1631 twl4030_codec_enable(codec, 1);
1633 case SND_SOC_BIAS_OFF:
1634 twl4030_codec_enable(codec, 0);
1637 codec->dapm.bias_level = level;
1642 static void twl4030_constraints(struct twl4030_priv *twl4030,
1643 struct snd_pcm_substream *mst_substream)
1645 struct snd_pcm_substream *slv_substream;
1647 /* Pick the stream, which need to be constrained */
1648 if (mst_substream == twl4030->master_substream)
1649 slv_substream = twl4030->slave_substream;
1650 else if (mst_substream == twl4030->slave_substream)
1651 slv_substream = twl4030->master_substream;
1652 else /* This should not happen.. */
1655 /* Set the constraints according to the already configured stream */
1656 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1657 SNDRV_PCM_HW_PARAM_RATE,
1661 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1662 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1663 twl4030->sample_bits,
1664 twl4030->sample_bits);
1666 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1667 SNDRV_PCM_HW_PARAM_CHANNELS,
1672 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1673 * capture has to be enabled/disabled. */
1674 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1679 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1681 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1682 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1684 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1691 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1694 static int twl4030_startup(struct snd_pcm_substream *substream,
1695 struct snd_soc_dai *dai)
1697 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1698 struct snd_soc_codec *codec = rtd->codec;
1699 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1701 snd_pcm_hw_constraint_msbits(substream->runtime, 0, 32, 24);
1702 if (twl4030->master_substream) {
1703 twl4030->slave_substream = substream;
1704 /* The DAI has one configuration for playback and capture, so
1705 * if the DAI has been already configured then constrain this
1706 * substream to match it. */
1707 if (twl4030->configured)
1708 twl4030_constraints(twl4030, twl4030->master_substream);
1710 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1711 TWL4030_OPTION_1)) {
1712 /* In option2 4 channel is not supported, set the
1713 * constraint for the first stream for channels, the
1714 * second stream will 'inherit' this cosntraint */
1715 snd_pcm_hw_constraint_minmax(substream->runtime,
1716 SNDRV_PCM_HW_PARAM_CHANNELS,
1719 twl4030->master_substream = substream;
1725 static void twl4030_shutdown(struct snd_pcm_substream *substream,
1726 struct snd_soc_dai *dai)
1728 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1729 struct snd_soc_codec *codec = rtd->codec;
1730 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1732 if (twl4030->master_substream == substream)
1733 twl4030->master_substream = twl4030->slave_substream;
1735 twl4030->slave_substream = NULL;
1737 /* If all streams are closed, or the remaining stream has not yet
1738 * been configured than set the DAI as not configured. */
1739 if (!twl4030->master_substream)
1740 twl4030->configured = 0;
1741 else if (!twl4030->master_substream->runtime->channels)
1742 twl4030->configured = 0;
1744 /* If the closing substream had 4 channel, do the necessary cleanup */
1745 if (substream->runtime->channels == 4)
1746 twl4030_tdm_enable(codec, substream->stream, 0);
1749 static int twl4030_hw_params(struct snd_pcm_substream *substream,
1750 struct snd_pcm_hw_params *params,
1751 struct snd_soc_dai *dai)
1753 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1754 struct snd_soc_codec *codec = rtd->codec;
1755 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1756 u8 mode, old_mode, format, old_format;
1758 /* If the substream has 4 channel, do the necessary setup */
1759 if (params_channels(params) == 4) {
1760 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1761 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1763 /* Safety check: are we in the correct operating mode and
1764 * the interface is in TDM mode? */
1765 if ((mode & TWL4030_OPTION_1) &&
1766 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1767 twl4030_tdm_enable(codec, substream->stream, 1);
1773 if (twl4030->configured)
1774 /* Ignoring hw_params for already configured DAI */
1779 old_mode = twl4030_read_reg_cache(codec,
1780 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1781 mode = old_mode & ~TWL4030_APLL_RATE;
1783 switch (params_rate(params)) {
1785 mode |= TWL4030_APLL_RATE_8000;
1788 mode |= TWL4030_APLL_RATE_11025;
1791 mode |= TWL4030_APLL_RATE_12000;
1794 mode |= TWL4030_APLL_RATE_16000;
1797 mode |= TWL4030_APLL_RATE_22050;
1800 mode |= TWL4030_APLL_RATE_24000;
1803 mode |= TWL4030_APLL_RATE_32000;
1806 mode |= TWL4030_APLL_RATE_44100;
1809 mode |= TWL4030_APLL_RATE_48000;
1812 mode |= TWL4030_APLL_RATE_96000;
1815 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1816 params_rate(params));
1821 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1822 format = old_format;
1823 format &= ~TWL4030_DATA_WIDTH;
1824 switch (params_format(params)) {
1825 case SNDRV_PCM_FORMAT_S16_LE:
1826 format |= TWL4030_DATA_WIDTH_16S_16W;
1828 case SNDRV_PCM_FORMAT_S32_LE:
1829 format |= TWL4030_DATA_WIDTH_32S_24W;
1832 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1833 params_format(params));
1837 if (format != old_format || mode != old_mode) {
1838 if (twl4030->codec_powered) {
1840 * If the codec is powered, than we need to toggle the
1843 twl4030_codec_enable(codec, 0);
1844 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1845 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1846 twl4030_codec_enable(codec, 1);
1848 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1849 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1853 /* Store the important parameters for the DAI configuration and set
1854 * the DAI as configured */
1855 twl4030->configured = 1;
1856 twl4030->rate = params_rate(params);
1857 twl4030->sample_bits = hw_param_interval(params,
1858 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1859 twl4030->channels = params_channels(params);
1861 /* If both playback and capture streams are open, and one of them
1862 * is setting the hw parameters right now (since we are here), set
1863 * constraints to the other stream to match the current one. */
1864 if (twl4030->slave_substream)
1865 twl4030_constraints(twl4030, substream);
1870 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1871 int clk_id, unsigned int freq, int dir)
1873 struct snd_soc_codec *codec = codec_dai->codec;
1874 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1882 dev_err(codec->dev, "Unsupported APLL mclk: %u\n", freq);
1886 if ((freq / 1000) != twl4030->sysclk) {
1888 "Mismatch in APLL mclk: %u (configured: %u)\n",
1889 freq, twl4030->sysclk * 1000);
1896 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1899 struct snd_soc_codec *codec = codec_dai->codec;
1900 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1901 u8 old_format, format;
1904 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1905 format = old_format;
1907 /* set master/slave audio interface */
1908 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1909 case SND_SOC_DAIFMT_CBM_CFM:
1910 format &= ~(TWL4030_AIF_SLAVE_EN);
1911 format &= ~(TWL4030_CLK256FS_EN);
1913 case SND_SOC_DAIFMT_CBS_CFS:
1914 format |= TWL4030_AIF_SLAVE_EN;
1915 format |= TWL4030_CLK256FS_EN;
1921 /* interface format */
1922 format &= ~TWL4030_AIF_FORMAT;
1923 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1924 case SND_SOC_DAIFMT_I2S:
1925 format |= TWL4030_AIF_FORMAT_CODEC;
1927 case SND_SOC_DAIFMT_DSP_A:
1928 format |= TWL4030_AIF_FORMAT_TDM;
1934 if (format != old_format) {
1935 if (twl4030->codec_powered) {
1937 * If the codec is powered, than we need to toggle the
1940 twl4030_codec_enable(codec, 0);
1941 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1942 twl4030_codec_enable(codec, 1);
1944 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1951 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1953 struct snd_soc_codec *codec = dai->codec;
1954 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1957 reg |= TWL4030_AIF_TRI_EN;
1959 reg &= ~TWL4030_AIF_TRI_EN;
1961 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1964 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1965 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1966 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1971 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1973 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1974 mask = TWL4030_ARXL1_VRX_EN;
1976 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1983 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1986 static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1987 struct snd_soc_dai *dai)
1989 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1990 struct snd_soc_codec *codec = rtd->codec;
1991 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1994 /* If the system master clock is not 26MHz, the voice PCM interface is
1997 if (twl4030->sysclk != 26000) {
1998 dev_err(codec->dev, "The board is configured for %u Hz, while"
1999 "the Voice interface needs 26MHz APLL mclk\n",
2000 twl4030->sysclk * 1000);
2004 /* If the codec mode is not option2, the voice PCM interface is not
2007 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2010 if (mode != TWL4030_OPTION_2) {
2011 printk(KERN_ERR "TWL4030 voice startup: "
2012 "the codec mode is not option2\n");
2019 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
2020 struct snd_soc_dai *dai)
2022 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2023 struct snd_soc_codec *codec = rtd->codec;
2025 /* Enable voice digital filters */
2026 twl4030_voice_enable(codec, substream->stream, 0);
2029 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2030 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2032 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2033 struct snd_soc_codec *codec = rtd->codec;
2034 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2037 /* Enable voice digital filters */
2038 twl4030_voice_enable(codec, substream->stream, 1);
2041 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2042 & ~(TWL4030_CODECPDZ);
2045 switch (params_rate(params)) {
2047 mode &= ~(TWL4030_SEL_16K);
2050 mode |= TWL4030_SEL_16K;
2053 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
2054 params_rate(params));
2058 if (mode != old_mode) {
2059 if (twl4030->codec_powered) {
2061 * If the codec is powered, than we need to toggle the
2064 twl4030_codec_enable(codec, 0);
2065 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2066 twl4030_codec_enable(codec, 1);
2068 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2075 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2076 int clk_id, unsigned int freq, int dir)
2078 struct snd_soc_codec *codec = codec_dai->codec;
2079 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2081 if (freq != 26000000) {
2082 dev_err(codec->dev, "Unsupported APLL mclk: %u, the Voice"
2083 "interface needs 26MHz APLL mclk\n", freq);
2086 if ((freq / 1000) != twl4030->sysclk) {
2088 "Mismatch in APLL mclk: %u (configured: %u)\n",
2089 freq, twl4030->sysclk * 1000);
2095 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2098 struct snd_soc_codec *codec = codec_dai->codec;
2099 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2100 u8 old_format, format;
2103 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2104 format = old_format;
2106 /* set master/slave audio interface */
2107 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2108 case SND_SOC_DAIFMT_CBM_CFM:
2109 format &= ~(TWL4030_VIF_SLAVE_EN);
2111 case SND_SOC_DAIFMT_CBS_CFS:
2112 format |= TWL4030_VIF_SLAVE_EN;
2118 /* clock inversion */
2119 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2120 case SND_SOC_DAIFMT_IB_NF:
2121 format &= ~(TWL4030_VIF_FORMAT);
2123 case SND_SOC_DAIFMT_NB_IF:
2124 format |= TWL4030_VIF_FORMAT;
2130 if (format != old_format) {
2131 if (twl4030->codec_powered) {
2133 * If the codec is powered, than we need to toggle the
2136 twl4030_codec_enable(codec, 0);
2137 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2138 twl4030_codec_enable(codec, 1);
2140 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2147 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2149 struct snd_soc_codec *codec = dai->codec;
2150 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2153 reg |= TWL4030_VIF_TRI_EN;
2155 reg &= ~TWL4030_VIF_TRI_EN;
2157 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2160 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2161 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2163 static struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
2164 .startup = twl4030_startup,
2165 .shutdown = twl4030_shutdown,
2166 .hw_params = twl4030_hw_params,
2167 .set_sysclk = twl4030_set_dai_sysclk,
2168 .set_fmt = twl4030_set_dai_fmt,
2169 .set_tristate = twl4030_set_tristate,
2172 static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2173 .startup = twl4030_voice_startup,
2174 .shutdown = twl4030_voice_shutdown,
2175 .hw_params = twl4030_voice_hw_params,
2176 .set_sysclk = twl4030_voice_set_dai_sysclk,
2177 .set_fmt = twl4030_voice_set_dai_fmt,
2178 .set_tristate = twl4030_voice_set_tristate,
2181 static struct snd_soc_dai_driver twl4030_dai[] = {
2183 .name = "twl4030-hifi",
2185 .stream_name = "HiFi Playback",
2188 .rates = TWL4030_RATES, // | SNDRV_PCM_RATE_96000,
2189 .formats = TWL4030_FORMATS,},
2191 .stream_name = "Capture",
2194 .rates = TWL4030_RATES,
2195 .formats = TWL4030_FORMATS,},
2196 .ops = &twl4030_dai_hifi_ops,
2199 .name = "twl4030-voice",
2201 .stream_name = "Voice Playback",
2204 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2205 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2207 .stream_name = "Capture",
2210 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2211 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2212 .ops = &twl4030_dai_voice_ops,
2216 static int twl4030_soc_suspend(struct snd_soc_codec *codec, pm_message_t state)
2218 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2222 static int twl4030_soc_resume(struct snd_soc_codec *codec)
2224 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2228 static int twl4030_soc_probe(struct snd_soc_codec *codec)
2230 struct twl4030_priv *twl4030;
2232 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2233 if (twl4030 == NULL) {
2234 printk("Can not allocate memroy\n");
2237 snd_soc_codec_set_drvdata(codec, twl4030);
2238 /* Set the defaults, and power up the codec */
2239 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
2240 codec->dapm.idle_bias_off = 1;
2242 twl4030_init_chip(codec);
2247 static int twl4030_soc_remove(struct snd_soc_codec *codec)
2249 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2251 /* Reset registers to their chip default before leaving */
2252 twl4030_reset_registers(codec);
2253 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2258 static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2259 .probe = twl4030_soc_probe,
2260 .remove = twl4030_soc_remove,
2261 .suspend = twl4030_soc_suspend,
2262 .resume = twl4030_soc_resume,
2263 .read = twl4030_read_reg_cache,
2264 .write = twl4030_write,
2265 .set_bias_level = twl4030_set_bias_level,
2266 .reg_cache_size = sizeof(twl4030_reg),
2267 .reg_word_size = sizeof(u8),
2268 .reg_cache_default = twl4030_reg,
2270 .controls = twl4030_snd_controls,
2271 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2272 .dapm_widgets = twl4030_dapm_widgets,
2273 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2274 .dapm_routes = intercon,
2275 .num_dapm_routes = ARRAY_SIZE(intercon),
2278 static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2280 struct twl4030_codec_data *pdata = pdev->dev.platform_data;
2283 dev_err(&pdev->dev, "platform_data is missing\n");
2287 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
2288 twl4030_dai, ARRAY_SIZE(twl4030_dai));
2291 static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2293 snd_soc_unregister_codec(&pdev->dev);
2297 MODULE_ALIAS("platform:twl4030-codec");
2299 static struct platform_driver twl4030_codec_driver = {
2300 .probe = twl4030_codec_probe,
2301 .remove = __devexit_p(twl4030_codec_remove),
2303 .name = "twl4030-codec",
2304 .owner = THIS_MODULE,
2308 static int __init twl4030_modinit(void)
2310 return platform_driver_register(&twl4030_codec_driver);
2312 module_init(twl4030_modinit);
2314 static void __exit twl4030_exit(void)
2316 platform_driver_unregister(&twl4030_codec_driver);
2318 module_exit(twl4030_exit);
2320 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2321 MODULE_AUTHOR("Steve Sakoman");
2322 MODULE_LICENSE("GPL");