sound/pci/rme9652/hdsp.c

   1 /*
   2  *   ALSA driver for RME Hammerfall DSP audio interface(s)
   3  *
   4  *      Copyright (c) 2002  Paul Davis
   5  *                          Marcus Andersson
   6  *                          Thomas Charbonnel
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/firmware.h>
  29 #include <linux/module.h>
  30 #include <linux/math64.h>
  31
  32 #include <sound/core.h>
  33 #include <sound/control.h>
  34 #include <sound/pcm.h>
  35 #include <sound/info.h>
  36 #include <sound/asoundef.h>
  37 #include <sound/rawmidi.h>
  38 #include <sound/hwdep.h>
  39 #include <sound/initval.h>
  40 #include <sound/hdsp.h>
  41
  42 #include <asm/byteorder.h>
  43 #include <asm/current.h>
  44 #include <asm/io.h>
  45
  46 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  47 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  48 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  49
  50 module_param_array(index, int, NULL, 0444);
  51 MODULE_PARM_DESC(index, "Index value for RME Hammerfall DSP interface.");
  52 module_param_array(id, charp, NULL, 0444);
  53 MODULE_PARM_DESC(id, "ID string for RME Hammerfall DSP interface.");
  54 module_param_array(enable, bool, NULL, 0444);
  55 MODULE_PARM_DESC(enable, "Enable/disable specific Hammerfall DSP soundcards.");
  56 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
  57 MODULE_DESCRIPTION("RME Hammerfall DSP");
  58 MODULE_LICENSE("GPL");
  59 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
  60                 "{RME HDSP-9652},"
  61                 "{RME HDSP-9632}}");
  62 #ifdef HDSP_FW_LOADER
  63 MODULE_FIRMWARE("rpm_firmware.bin");
  64 MODULE_FIRMWARE("multiface_firmware.bin");
  65 MODULE_FIRMWARE("multiface_firmware_rev11.bin");
  66 MODULE_FIRMWARE("digiface_firmware.bin");
  67 MODULE_FIRMWARE("digiface_firmware_rev11.bin");
  68 #endif
  69
  70 #define HDSP_MAX_CHANNELS        26
  71 #define HDSP_MAX_DS_CHANNELS     14
  72 #define HDSP_MAX_QS_CHANNELS     8
  73 #define DIGIFACE_SS_CHANNELS     26
  74 #define DIGIFACE_DS_CHANNELS     14
  75 #define MULTIFACE_SS_CHANNELS    18
  76 #define MULTIFACE_DS_CHANNELS    14
  77 #define H9652_SS_CHANNELS        26
  78 #define H9652_DS_CHANNELS        14
  79 /* This does not include possible Analog Extension Boards
  80    AEBs are detected at card initialization
  81 */
  82 #define H9632_SS_CHANNELS        12
  83 #define H9632_DS_CHANNELS        8
  84 #define H9632_QS_CHANNELS        4
  85 #define RPM_CHANNELS             6
  86
  87 /* Write registers. These are defined as byte-offsets from the iobase value.
  88  */
  89 #define HDSP_resetPointer               0
  90 #define HDSP_freqReg                    0
  91 #define HDSP_outputBufferAddress        32
  92 #define HDSP_inputBufferAddress         36
  93 #define HDSP_controlRegister            64
  94 #define HDSP_interruptConfirmation      96
  95 #define HDSP_outputEnable               128
  96 #define HDSP_control2Reg                256
  97 #define HDSP_midiDataOut0               352
  98 #define HDSP_midiDataOut1               356
  99 #define HDSP_fifoData                   368
 100 #define HDSP_inputEnable                384
 101
 102 /* Read registers. These are defined as byte-offsets from the iobase value
 103  */
 104
 105 #define HDSP_statusRegister    0
 106 #define HDSP_timecode        128
 107 #define HDSP_status2Register 192
 108 #define HDSP_midiDataIn0     360
 109 #define HDSP_midiDataIn1     364
 110 #define HDSP_midiStatusOut0  384
 111 #define HDSP_midiStatusOut1  388
 112 #define HDSP_midiStatusIn0   392
 113 #define HDSP_midiStatusIn1   396
 114 #define HDSP_fifoStatus      400
 115
 116 /* the meters are regular i/o-mapped registers, but offset
 117    considerably from the rest. the peak registers are reset
 118    when read; the least-significant 4 bits are full-scale counters;
 119    the actual peak value is in the most-significant 24 bits.
 120 */
 121
 122 #define HDSP_playbackPeakLevel  4096  /* 26 * 32 bit values */
 123 #define HDSP_inputPeakLevel     4224  /* 26 * 32 bit values */
 124 #define HDSP_outputPeakLevel    4352  /* (26+2) * 32 bit values */
 125 #define HDSP_playbackRmsLevel   4612  /* 26 * 64 bit values */
 126 #define HDSP_inputRmsLevel      4868  /* 26 * 64 bit values */
 127
 128
 129 /* This is for H9652 cards
 130    Peak values are read downward from the base
 131    Rms values are read upward
 132    There are rms values for the outputs too
 133    26*3 values are read in ss mode
 134    14*3 in ds mode, with no gap between values
 135 */
 136 #define HDSP_9652_peakBase      7164
 137 #define HDSP_9652_rmsBase       4096
 138
 139 /* c.f. the hdsp_9632_meters_t struct */
 140 #define HDSP_9632_metersBase    4096
 141
 142 #define HDSP_IO_EXTENT     7168
 143
 144 /* control2 register bits */
 145
 146 #define HDSP_TMS                0x01
 147 #define HDSP_TCK                0x02
 148 #define HDSP_TDI                0x04
 149 #define HDSP_JTAG               0x08
 150 #define HDSP_PWDN               0x10
 151 #define HDSP_PROGRAM            0x020
 152 #define HDSP_CONFIG_MODE_0      0x040
 153 #define HDSP_CONFIG_MODE_1      0x080
 154 #define HDSP_VERSION_BIT        (0x100 | HDSP_S_LOAD)
 155 #define HDSP_BIGENDIAN_MODE     0x200
 156 #define HDSP_RD_MULTIPLE        0x400
 157 #define HDSP_9652_ENABLE_MIXER  0x800
 158 #define HDSP_TDO                0x10000000
 159
 160 #define HDSP_S_PROGRAM          (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
 161 #define HDSP_S_LOAD             (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
 162
 163 /* Control Register bits */
 164
 165 #define HDSP_Start                (1<<0)  /* start engine */
 166 #define HDSP_Latency0             (1<<1)  /* buffer size = 2^n where n is defined by Latency{2,1,0} */
 167 #define HDSP_Latency1             (1<<2)  /* [ see above ] */
 168 #define HDSP_Latency2             (1<<3)  /* [ see above ] */
 169 #define HDSP_ClockModeMaster      (1<<4)  /* 1=Master, 0=Slave/Autosync */
 170 #define HDSP_AudioInterruptEnable (1<<5)  /* what do you think ? */
 171 #define HDSP_Frequency0           (1<<6)  /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
 172 #define HDSP_Frequency1           (1<<7)  /* 0=32kHz/64kHz/128kHz */
 173 #define HDSP_DoubleSpeed          (1<<8)  /* 0=normal speed, 1=double speed */
 174 #define HDSP_SPDIFProfessional    (1<<9)  /* 0=consumer, 1=professional */
 175 #define HDSP_SPDIFEmphasis        (1<<10) /* 0=none, 1=on */
 176 #define HDSP_SPDIFNonAudio        (1<<11) /* 0=off, 1=on */
 177 #define HDSP_SPDIFOpticalOut      (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
 178 #define HDSP_SyncRef2             (1<<13)
 179 #define HDSP_SPDIFInputSelect0    (1<<14)
 180 #define HDSP_SPDIFInputSelect1    (1<<15)
 181 #define HDSP_SyncRef0             (1<<16)
 182 #define HDSP_SyncRef1             (1<<17)
 183 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
 184 #define HDSP_XLRBreakoutCable     (1<<20) /* For H9632 cards */
 185 #define HDSP_Midi0InterruptEnable (1<<22)
 186 #define HDSP_Midi1InterruptEnable (1<<23)
 187 #define HDSP_LineOut              (1<<24)
 188 #define HDSP_ADGain0              (1<<25) /* From here : H9632 specific */
 189 #define HDSP_ADGain1              (1<<26)
 190 #define HDSP_DAGain0              (1<<27)
 191 #define HDSP_DAGain1              (1<<28)
 192 #define HDSP_PhoneGain0           (1<<29)
 193 #define HDSP_PhoneGain1           (1<<30)
 194 #define HDSP_QuadSpeed            (1<<31)
 195
 196 /* RPM uses some of the registers for special purposes */
 197 #define HDSP_RPM_Inp12            0x04A00
 198 #define HDSP_RPM_Inp12_Phon_6dB   0x00800  /* Dolby */
 199 #define HDSP_RPM_Inp12_Phon_0dB   0x00000  /* .. */
 200 #define HDSP_RPM_Inp12_Phon_n6dB  0x04000  /* inp_0 */
 201 #define HDSP_RPM_Inp12_Line_0dB   0x04200  /* Dolby+PRO */
 202 #define HDSP_RPM_Inp12_Line_n6dB  0x00200  /* PRO */
 203
 204 #define HDSP_RPM_Inp34            0x32000
 205 #define HDSP_RPM_Inp34_Phon_6dB   0x20000  /* SyncRef1 */
 206 #define HDSP_RPM_Inp34_Phon_0dB   0x00000  /* .. */
 207 #define HDSP_RPM_Inp34_Phon_n6dB  0x02000  /* SyncRef2 */
 208 #define HDSP_RPM_Inp34_Line_0dB   0x30000  /* SyncRef1+SyncRef0 */
 209 #define HDSP_RPM_Inp34_Line_n6dB  0x10000  /* SyncRef0 */
 210
 211 #define HDSP_RPM_Bypass           0x01000
 212
 213 #define HDSP_RPM_Disconnect       0x00001
 214
 215 #define HDSP_ADGainMask       (HDSP_ADGain0|HDSP_ADGain1)
 216 #define HDSP_ADGainMinus10dBV  HDSP_ADGainMask
 217 #define HDSP_ADGainPlus4dBu   (HDSP_ADGain0)
 218 #define HDSP_ADGainLowGain     0
 219
 220 #define HDSP_DAGainMask         (HDSP_DAGain0|HDSP_DAGain1)
 221 #define HDSP_DAGainHighGain      HDSP_DAGainMask
 222 #define HDSP_DAGainPlus4dBu     (HDSP_DAGain0)
 223 #define HDSP_DAGainMinus10dBV    0
 224
 225 #define HDSP_PhoneGainMask      (HDSP_PhoneGain0|HDSP_PhoneGain1)
 226 #define HDSP_PhoneGain0dB        HDSP_PhoneGainMask
 227 #define HDSP_PhoneGainMinus6dB  (HDSP_PhoneGain0)
 228 #define HDSP_PhoneGainMinus12dB  0
 229
 230 #define HDSP_LatencyMask    (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
 231 #define HDSP_FrequencyMask  (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
 232
 233 #define HDSP_SPDIFInputMask    (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 234 #define HDSP_SPDIFInputADAT1    0
 235 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
 236 #define HDSP_SPDIFInputCdrom   (HDSP_SPDIFInputSelect1)
 237 #define HDSP_SPDIFInputAES     (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 238
 239 #define HDSP_SyncRefMask        (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
 240 #define HDSP_SyncRef_ADAT1       0
 241 #define HDSP_SyncRef_ADAT2      (HDSP_SyncRef0)
 242 #define HDSP_SyncRef_ADAT3      (HDSP_SyncRef1)
 243 #define HDSP_SyncRef_SPDIF      (HDSP_SyncRef0|HDSP_SyncRef1)
 244 #define HDSP_SyncRef_WORD       (HDSP_SyncRef2)
 245 #define HDSP_SyncRef_ADAT_SYNC  (HDSP_SyncRef0|HDSP_SyncRef2)
 246
 247 /* Sample Clock Sources */
 248
 249 #define HDSP_CLOCK_SOURCE_AUTOSYNC           0
 250 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ     1
 251 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ   2
 252 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ     3
 253 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ     4
 254 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ   5
 255 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ     6
 256 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ    7
 257 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ  8
 258 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ    9
 259
 260 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
 261
 262 #define HDSP_SYNC_FROM_WORD      0
 263 #define HDSP_SYNC_FROM_SPDIF     1
 264 #define HDSP_SYNC_FROM_ADAT1     2
 265 #define HDSP_SYNC_FROM_ADAT_SYNC 3
 266 #define HDSP_SYNC_FROM_ADAT2     4
 267 #define HDSP_SYNC_FROM_ADAT3     5
 268
 269 /* SyncCheck status */
 270
 271 #define HDSP_SYNC_CHECK_NO_LOCK 0
 272 #define HDSP_SYNC_CHECK_LOCK    1
 273 #define HDSP_SYNC_CHECK_SYNC    2
 274
 275 /* AutoSync references - used by "autosync_ref" control switch */
 276
 277 #define HDSP_AUTOSYNC_FROM_WORD      0
 278 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
 279 #define HDSP_AUTOSYNC_FROM_SPDIF     2
 280 #define HDSP_AUTOSYNC_FROM_NONE      3
 281 #define HDSP_AUTOSYNC_FROM_ADAT1     4
 282 #define HDSP_AUTOSYNC_FROM_ADAT2     5
 283 #define HDSP_AUTOSYNC_FROM_ADAT3     6
 284
 285 /* Possible sources of S/PDIF input */
 286
 287 #define HDSP_SPDIFIN_OPTICAL  0 /* optical  (ADAT1) */
 288 #define HDSP_SPDIFIN_COAXIAL  1 /* coaxial (RCA) */
 289 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
 290 #define HDSP_SPDIFIN_AES      3 /* xlr for H9632 (AES)*/
 291
 292 #define HDSP_Frequency32KHz    HDSP_Frequency0
 293 #define HDSP_Frequency44_1KHz  HDSP_Frequency1
 294 #define HDSP_Frequency48KHz    (HDSP_Frequency1|HDSP_Frequency0)
 295 #define HDSP_Frequency64KHz    (HDSP_DoubleSpeed|HDSP_Frequency0)
 296 #define HDSP_Frequency88_2KHz  (HDSP_DoubleSpeed|HDSP_Frequency1)
 297 #define HDSP_Frequency96KHz    (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 298 /* For H9632 cards */
 299 #define HDSP_Frequency128KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
 300 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
 301 #define HDSP_Frequency192KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 302 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
 303         return 104857600000000 / rate; // 100 MHz
 304         return 110100480000000 / rate; // 105 MHz
 305 */
 306 #define DDS_NUMERATOR 104857600000000ULL;  /*  =  2^20 * 10^8 */
 307
 308 #define hdsp_encode_latency(x)       (((x)<<1) & HDSP_LatencyMask)
 309 #define hdsp_decode_latency(x)       (((x) & HDSP_LatencyMask)>>1)
 310
 311 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
 312 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
 313
 314 /* Status Register bits */
 315
 316 #define HDSP_audioIRQPending    (1<<0)
 317 #define HDSP_Lock2              (1<<1)     /* this is for Digiface and H9652 */
 318 #define HDSP_spdifFrequency3    HDSP_Lock2 /* this is for H9632 only */
 319 #define HDSP_Lock1              (1<<2)
 320 #define HDSP_Lock0              (1<<3)
 321 #define HDSP_SPDIFSync          (1<<4)
 322 #define HDSP_TimecodeLock       (1<<5)
 323 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
 324 #define HDSP_Sync2              (1<<16)
 325 #define HDSP_Sync1              (1<<17)
 326 #define HDSP_Sync0              (1<<18)
 327 #define HDSP_DoubleSpeedStatus  (1<<19)
 328 #define HDSP_ConfigError        (1<<20)
 329 #define HDSP_DllError           (1<<21)
 330 #define HDSP_spdifFrequency0    (1<<22)
 331 #define HDSP_spdifFrequency1    (1<<23)
 332 #define HDSP_spdifFrequency2    (1<<24)
 333 #define HDSP_SPDIFErrorFlag     (1<<25)
 334 #define HDSP_BufferID           (1<<26)
 335 #define HDSP_TimecodeSync       (1<<27)
 336 #define HDSP_AEBO               (1<<28) /* H9632 specific Analog Extension Boards */
 337 #define HDSP_AEBI               (1<<29) /* 0 = present, 1 = absent */
 338 #define HDSP_midi0IRQPending    (1<<30)
 339 #define HDSP_midi1IRQPending    (1<<31)
 340
 341 #define HDSP_spdifFrequencyMask    (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
 342 #define HDSP_spdifFrequencyMask_9632 (HDSP_spdifFrequency0|\
 343                                       HDSP_spdifFrequency1|\
 344                                       HDSP_spdifFrequency2|\
 345                                       HDSP_spdifFrequency3)
 346
 347 #define HDSP_spdifFrequency32KHz   (HDSP_spdifFrequency0)
 348 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
 349 #define HDSP_spdifFrequency48KHz   (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
 350
 351 #define HDSP_spdifFrequency64KHz   (HDSP_spdifFrequency2)
 352 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
 353 #define HDSP_spdifFrequency96KHz   (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
 354
 355 /* This is for H9632 cards */
 356 #define HDSP_spdifFrequency128KHz   (HDSP_spdifFrequency0|\
 357                                      HDSP_spdifFrequency1|\
 358                                      HDSP_spdifFrequency2)
 359 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
 360 #define HDSP_spdifFrequency192KHz   (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
 361
 362 /* Status2 Register bits */
 363
 364 #define HDSP_version0     (1<<0)
 365 #define HDSP_version1     (1<<1)
 366 #define HDSP_version2     (1<<2)
 367 #define HDSP_wc_lock      (1<<3)
 368 #define HDSP_wc_sync      (1<<4)
 369 #define HDSP_inp_freq0    (1<<5)
 370 #define HDSP_inp_freq1    (1<<6)
 371 #define HDSP_inp_freq2    (1<<7)
 372 #define HDSP_SelSyncRef0  (1<<8)
 373 #define HDSP_SelSyncRef1  (1<<9)
 374 #define HDSP_SelSyncRef2  (1<<10)
 375
 376 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
 377
 378 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
 379 #define HDSP_systemFrequency32   (HDSP_inp_freq0)
 380 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
 381 #define HDSP_systemFrequency48   (HDSP_inp_freq0|HDSP_inp_freq1)
 382 #define HDSP_systemFrequency64   (HDSP_inp_freq2)
 383 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
 384 #define HDSP_systemFrequency96   (HDSP_inp_freq1|HDSP_inp_freq2)
 385 /* FIXME : more values for 9632 cards ? */
 386
 387 #define HDSP_SelSyncRefMask        (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
 388 #define HDSP_SelSyncRef_ADAT1      0
 389 #define HDSP_SelSyncRef_ADAT2      (HDSP_SelSyncRef0)
 390 #define HDSP_SelSyncRef_ADAT3      (HDSP_SelSyncRef1)
 391 #define HDSP_SelSyncRef_SPDIF      (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
 392 #define HDSP_SelSyncRef_WORD       (HDSP_SelSyncRef2)
 393 #define HDSP_SelSyncRef_ADAT_SYNC  (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
 394
 395 /* Card state flags */
 396
 397 #define HDSP_InitializationComplete  (1<<0)
 398 #define HDSP_FirmwareLoaded          (1<<1)
 399 #define HDSP_FirmwareCached          (1<<2)
 400
 401 /* FIFO wait times, defined in terms of 1/10ths of msecs */
 402
 403 #define HDSP_LONG_WAIT   5000
 404 #define HDSP_SHORT_WAIT  30
 405
 406 #define UNITY_GAIN                       32768
 407 #define MINUS_INFINITY_GAIN              0
 408
 409 /* the size of a substream (1 mono data stream) */
 410
 411 #define HDSP_CHANNEL_BUFFER_SAMPLES  (16*1024)
 412 #define HDSP_CHANNEL_BUFFER_BYTES    (4*HDSP_CHANNEL_BUFFER_SAMPLES)
 413
 414 /* the size of the area we need to allocate for DMA transfers. the
 415    size is the same regardless of the number of channels - the
 416    Multiface still uses the same memory area.
 417
 418    Note that we allocate 1 more channel than is apparently needed
 419    because the h/w seems to write 1 byte beyond the end of the last
 420    page. Sigh.
 421 */
 422
 423 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
 424 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
 425
 426 /* use hotplug firmware loader? */
 427 #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
 428 #if !defined(HDSP_USE_HWDEP_LOADER)
 429 #define HDSP_FW_LOADER
 430 #endif
 431 #endif
 432
 433 struct hdsp_9632_meters {
 434     u32 input_peak[16];
 435     u32 playback_peak[16];
 436     u32 output_peak[16];
 437     u32 xxx_peak[16];
 438     u32 padding[64];
 439     u32 input_rms_low[16];
 440     u32 playback_rms_low[16];
 441     u32 output_rms_low[16];
 442     u32 xxx_rms_low[16];
 443     u32 input_rms_high[16];
 444     u32 playback_rms_high[16];
 445     u32 output_rms_high[16];
 446     u32 xxx_rms_high[16];
 447 };
 448
 449 struct hdsp_midi {
 450     struct hdsp             *hdsp;
 451     int                      id;
 452     struct snd_rawmidi           *rmidi;
 453     struct snd_rawmidi_substream *input;
 454     struct snd_rawmidi_substream *output;
 455     char                     istimer; /* timer in use */
 456     struct timer_list        timer;
 457     spinlock_t               lock;
 458     int                      pending;
 459 };
 460
 461 struct hdsp {
 462         spinlock_t            lock;
 463         struct snd_pcm_substream *capture_substream;
 464         struct snd_pcm_substream *playback_substream;
 465         struct hdsp_midi      midi[2];
 466         struct tasklet_struct midi_tasklet;
 467         int                   use_midi_tasklet;
 468         int                   precise_ptr;
 469         u32                   control_register;      /* cached value */
 470         u32                   control2_register;     /* cached value */
 471         u32                   creg_spdif;
 472         u32                   creg_spdif_stream;
 473         int                   clock_source_locked;
 474         char                 *card_name;         /* digiface/multiface/rpm */
 475         enum HDSP_IO_Type     io_type;               /* ditto, but for code use */
 476         unsigned short        firmware_rev;
 477         unsigned short        state;                 /* stores state bits */
 478         u32                   firmware_cache[24413]; /* this helps recover from accidental iobox power failure */
 479         size_t                period_bytes;          /* guess what this is */
 480         unsigned char         max_channels;
 481         unsigned char         qs_in_channels;        /* quad speed mode for H9632 */
 482         unsigned char         ds_in_channels;
 483         unsigned char         ss_in_channels;       /* different for multiface/digiface */
 484         unsigned char         qs_out_channels;
 485         unsigned char         ds_out_channels;
 486         unsigned char         ss_out_channels;
 487
 488         struct snd_dma_buffer capture_dma_buf;
 489         struct snd_dma_buffer playback_dma_buf;
 490         unsigned char        *capture_buffer;       /* suitably aligned address */
 491         unsigned char        *playback_buffer;      /* suitably aligned address */
 492
 493         pid_t                 capture_pid;
 494         pid_t                 playback_pid;
 495         int                   running;
 496         int                   system_sample_rate;
 497         char                 *channel_map;
 498         int                   dev;
 499         int                   irq;
 500         unsigned long         port;
 501         void __iomem         *iobase;
 502         struct snd_card *card;
 503         struct snd_pcm *pcm;
 504         struct snd_hwdep          *hwdep;
 505         struct pci_dev       *pci;
 506         struct snd_kcontrol *spdif_ctl;
 507         unsigned short        mixer_matrix[HDSP_MATRIX_MIXER_SIZE];
 508         unsigned int          dds_value; /* last value written to freq register */
 509 };
 510
 511 /* These tables map the ALSA channels 1..N to the channels that we
 512    need to use in order to find the relevant channel buffer. RME
 513    refer to this kind of mapping as between "the ADAT channel and
 514    the DMA channel." We index it using the logical audio channel,
 515    and the value is the DMA channel (i.e. channel buffer number)
 516    where the data for that channel can be read/written from/to.
 517 */
 518
 519 static char channel_map_df_ss[HDSP_MAX_CHANNELS] = {
 520         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 521         18, 19, 20, 21, 22, 23, 24, 25
 522 };
 523
 524 static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
 525         /* Analog */
 526         0, 1, 2, 3, 4, 5, 6, 7,
 527         /* ADAT 2 */
 528         16, 17, 18, 19, 20, 21, 22, 23,
 529         /* SPDIF */
 530         24, 25,
 531         -1, -1, -1, -1, -1, -1, -1, -1
 532 };
 533
 534 static char channel_map_ds[HDSP_MAX_CHANNELS] = {
 535         /* ADAT channels are remapped */
 536         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 537         /* channels 12 and 13 are S/PDIF */
 538         24, 25,
 539         /* others don't exist */
 540         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 541 };
 542
 543 static char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = {
 544         /* ADAT channels */
 545         0, 1, 2, 3, 4, 5, 6, 7,
 546         /* SPDIF */
 547         8, 9,
 548         /* Analog */
 549         10, 11,
 550         /* AO4S-192 and AI4S-192 extension boards */
 551         12, 13, 14, 15,
 552         /* others don't exist */
 553         -1, -1, -1, -1, -1, -1, -1, -1,
 554         -1, -1
 555 };
 556
 557 static char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = {
 558         /* ADAT */
 559         1, 3, 5, 7,
 560         /* SPDIF */
 561         8, 9,
 562         /* Analog */
 563         10, 11,
 564         /* AO4S-192 and AI4S-192 extension boards */
 565         12, 13, 14, 15,
 566         /* others don't exist */
 567         -1, -1, -1, -1, -1, -1, -1, -1,
 568         -1, -1, -1, -1, -1, -1
 569 };
 570
 571 static char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = {
 572         /* ADAT is disabled in this mode */
 573         /* SPDIF */
 574         8, 9,
 575         /* Analog */
 576         10, 11,
 577         /* AO4S-192 and AI4S-192 extension boards */
 578         12, 13, 14, 15,
 579         /* others don't exist */
 580         -1, -1, -1, -1, -1, -1, -1, -1,
 581         -1, -1, -1, -1, -1, -1, -1, -1,
 582         -1, -1
 583 };
 584
 585 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 586 {
 587         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 588         dmab->dev.dev = snd_dma_pci_data(pci);
 589         if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
 590                 if (dmab->bytes >= size)
 591                         return 0;
 592         }
 593         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 594                                 size, dmab) < 0)
 595                 return -ENOMEM;
 596         return 0;
 597 }
 598
 599 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 600 {
 601         if (dmab->area) {
 602                 dmab->dev.dev = NULL; /* make it anonymous */
 603                 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
 604         }
 605 }
 606
 607
 608 static DEFINE_PCI_DEVICE_TABLE(snd_hdsp_ids) = {
 609         {
 610                 .vendor = PCI_VENDOR_ID_XILINX,
 611                 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
 612                 .subvendor = PCI_ANY_ID,
 613                 .subdevice = PCI_ANY_ID,
 614         }, /* RME Hammerfall-DSP */
 615         { 0, },
 616 };
 617
 618 MODULE_DEVICE_TABLE(pci, snd_hdsp_ids);
 619
 620 /* prototypes */
 621 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp);
 622 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp);
 623 static int snd_hdsp_enable_io (struct hdsp *hdsp);
 624 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp);
 625 static void snd_hdsp_initialize_channels (struct hdsp *hdsp);
 626 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout);
 627 static int hdsp_autosync_ref(struct hdsp *hdsp);
 628 static int snd_hdsp_set_defaults(struct hdsp *hdsp);
 629 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp);
 630
 631 static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out)
 632 {
 633         switch (hdsp->io_type) {
 634         case Multiface:
 635         case Digiface:
 636         case RPM:
 637         default:
 638                 if (hdsp->firmware_rev == 0xa)
 639                         return (64 * out) + (32 + (in));
 640                 else
 641                         return (52 * out) + (26 + (in));
 642         case H9632:
 643                 return (32 * out) + (16 + (in));
 644         case H9652:
 645                 return (52 * out) + (26 + (in));
 646         }
 647 }
 648
 649 static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out)
 650 {
 651         switch (hdsp->io_type) {
 652         case Multiface:
 653         case Digiface:
 654         case RPM:
 655         default:
 656                 if (hdsp->firmware_rev == 0xa)
 657                         return (64 * out) + in;
 658                 else
 659                         return (52 * out) + in;
 660         case H9632:
 661                 return (32 * out) + in;
 662         case H9652:
 663                 return (52 * out) + in;
 664         }
 665 }
 666
 667 static void hdsp_write(struct hdsp *hdsp, int reg, int val)
 668 {
 669         writel(val, hdsp->iobase + reg);
 670 }
 671
 672 static unsigned int hdsp_read(struct hdsp *hdsp, int reg)
 673 {
 674         return readl (hdsp->iobase + reg);
 675 }
 676
 677 static int hdsp_check_for_iobox (struct hdsp *hdsp)
 678 {
 679         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
 680         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
 681                 snd_printk("Hammerfall-DSP: no IO box connected!\n");
 682                 hdsp->state &= ~HDSP_FirmwareLoaded;
 683                 return -EIO;
 684         }
 685         return 0;
 686 }
 687
 688 static int hdsp_wait_for_iobox(struct hdsp *hdsp, unsigned int loops,
 689                                unsigned int delay)
 690 {
 691         unsigned int i;
 692
 693         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 694                 return 0;
 695
 696         for (i = 0; i != loops; ++i) {
 697                 if (hdsp_read(hdsp, HDSP_statusRegister) & HDSP_ConfigError)
 698                         msleep(delay);
 699                 else {
 700                         snd_printd("Hammerfall-DSP: iobox found after %ums!\n",
 701                                    i * delay);
 702                         return 0;
 703                 }
 704         }
 705
 706         snd_printk("Hammerfall-DSP: no IO box connected!\n");
 707         hdsp->state &= ~HDSP_FirmwareLoaded;
 708         return -EIO;
 709 }
 710
 711 static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
 712
 713         int i;
 714         unsigned long flags;
 715
 716         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 717
 718                 snd_printk ("Hammerfall-DSP: loading firmware\n");
 719
 720                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
 721                 hdsp_write (hdsp, HDSP_fifoData, 0);
 722
 723                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 724                         snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
 725                         return -EIO;
 726                 }
 727
 728                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 729
 730                 for (i = 0; i < 24413; ++i) {
 731                         hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]);
 732                         if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
 733                                 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
 734                                 return -EIO;
 735                         }
 736                 }
 737
 738                 ssleep(3);
 739
 740                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 741                         snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
 742                         return -EIO;
 743                 }
 744
 745 #ifdef SNDRV_BIG_ENDIAN
 746                 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
 747 #else
 748                 hdsp->control2_register = 0;
 749 #endif
 750                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
 751                 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
 752
 753         }
 754         if (hdsp->state & HDSP_InitializationComplete) {
 755                 snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
 756                 spin_lock_irqsave(&hdsp->lock, flags);
 757                 snd_hdsp_set_defaults(hdsp);
 758                 spin_unlock_irqrestore(&hdsp->lock, flags);
 759         }
 760
 761         hdsp->state |= HDSP_FirmwareLoaded;
 762
 763         return 0;
 764 }
 765
 766 static int hdsp_get_iobox_version (struct hdsp *hdsp)
 767 {
 768         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 769
 770                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
 771                 hdsp_write (hdsp, HDSP_fifoData, 0);
 772                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0)
 773                         return -EIO;
 774
 775                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 776                 hdsp_write (hdsp, HDSP_fifoData, 0);
 777
 778                 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT)) {
 779                         hdsp_write(hdsp, HDSP_control2Reg, HDSP_VERSION_BIT);
 780                         hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 781                         if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT))
 782                                 hdsp->io_type = RPM;
 783                         else
 784                                 hdsp->io_type = Multiface;
 785                 } else {
 786                         hdsp->io_type = Digiface;
 787                 }
 788         } else {
 789                 /* firmware was already loaded, get iobox type */
 790                 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version2)
 791                         hdsp->io_type = RPM;
 792                 else if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
 793                         hdsp->io_type = Multiface;
 794                 else
 795                         hdsp->io_type = Digiface;
 796         }
 797         return 0;
 798 }
 799
 800
 801 #ifdef HDSP_FW_LOADER
 802 static int hdsp_request_fw_loader(struct hdsp *hdsp);
 803 #endif
 804
 805 static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand)
 806 {
 807         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 808                 return 0;
 809         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 810                 hdsp->state &= ~HDSP_FirmwareLoaded;
 811                 if (! load_on_demand)
 812                         return -EIO;
 813                 snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n");
 814                 /* try to load firmware */
 815                 if (! (hdsp->state & HDSP_FirmwareCached)) {
 816 #ifdef HDSP_FW_LOADER
 817                         if (! hdsp_request_fw_loader(hdsp))
 818                                 return 0;
 819 #endif
 820                         snd_printk(KERN_ERR
 821                                    "Hammerfall-DSP: No firmware loaded nor "
 822                                    "cached, please upload firmware.\n");
 823                         return -EIO;
 824                 }
 825                 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
 826                         snd_printk(KERN_ERR
 827                                    "Hammerfall-DSP: Firmware loading from "
 828                                    "cache failed, please upload manually.\n");
 829                         return -EIO;
 830                 }
 831         }
 832         return 0;
 833 }
 834
 835
 836 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
 837 {
 838         int i;
 839
 840         /* the fifoStatus registers reports on how many words
 841            are available in the command FIFO.
 842         */
 843
 844         for (i = 0; i < timeout; i++) {
 845
 846                 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
 847                         return 0;
 848
 849                 /* not very friendly, but we only do this during a firmware
 850                    load and changing the mixer, so we just put up with it.
 851                 */
 852
 853                 udelay (100);
 854         }
 855
 856         snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
 857                     count, timeout);
 858         return -1;
 859 }
 860
 861 static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr)
 862 {
 863         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 864                 return 0;
 865
 866         return hdsp->mixer_matrix[addr];
 867 }
 868
 869 static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data)
 870 {
 871         unsigned int ad;
 872
 873         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 874                 return -1;
 875
 876         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
 877
 878                 /* from martin bjornsen:
 879
 880                    "You can only write dwords to the
 881                    mixer memory which contain two
 882                    mixer values in the low and high
 883                    word. So if you want to change
 884                    value 0 you have to read value 1
 885                    from the cache and write both to
 886                    the first dword in the mixer
 887                    memory."
 888                 */
 889
 890                 if (hdsp->io_type == H9632 && addr >= 512)
 891                         return 0;
 892
 893                 if (hdsp->io_type == H9652 && addr >= 1352)
 894                         return 0;
 895
 896                 hdsp->mixer_matrix[addr] = data;
 897
 898
 899                 /* `addr' addresses a 16-bit wide address, but
 900                    the address space accessed via hdsp_write
 901                    uses byte offsets. put another way, addr
 902                    varies from 0 to 1351, but to access the
 903                    corresponding memory location, we need
 904                    to access 0 to 2703 ...
 905                 */
 906                 ad = addr/2;
 907
 908                 hdsp_write (hdsp, 4096 + (ad*4),
 909                             (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
 910                             hdsp->mixer_matrix[addr&0x7fe]);
 911
 912                 return 0;
 913
 914         } else {
 915
 916                 ad = (addr << 16) + data;
 917
 918                 if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
 919                         return -1;
 920
 921                 hdsp_write (hdsp, HDSP_fifoData, ad);
 922                 hdsp->mixer_matrix[addr] = data;
 923
 924         }
 925
 926         return 0;
 927 }
 928
 929 static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp)
 930 {
 931         unsigned long flags;
 932         int ret = 1;
 933
 934         spin_lock_irqsave(&hdsp->lock, flags);
 935         if ((hdsp->playback_pid != hdsp->capture_pid) &&
 936             (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
 937                 ret = 0;
 938         spin_unlock_irqrestore(&hdsp->lock, flags);
 939         return ret;
 940 }
 941
 942 static int hdsp_spdif_sample_rate(struct hdsp *hdsp)
 943 {
 944         unsigned int status = hdsp_read(hdsp, HDSP_statusRegister);
 945         unsigned int rate_bits = (status & HDSP_spdifFrequencyMask);
 946
 947         /* For the 9632, the mask is different */
 948         if (hdsp->io_type == H9632)
 949                  rate_bits = (status & HDSP_spdifFrequencyMask_9632);
 950
 951         if (status & HDSP_SPDIFErrorFlag)
 952                 return 0;
 953
 954         switch (rate_bits) {
 955         case HDSP_spdifFrequency32KHz: return 32000;
 956         case HDSP_spdifFrequency44_1KHz: return 44100;
 957         case HDSP_spdifFrequency48KHz: return 48000;
 958         case HDSP_spdifFrequency64KHz: return 64000;
 959         case HDSP_spdifFrequency88_2KHz: return 88200;
 960         case HDSP_spdifFrequency96KHz: return 96000;
 961         case HDSP_spdifFrequency128KHz:
 962                 if (hdsp->io_type == H9632) return 128000;
 963                 break;
 964         case HDSP_spdifFrequency176_4KHz:
 965                 if (hdsp->io_type == H9632) return 176400;
 966                 break;
 967         case HDSP_spdifFrequency192KHz:
 968                 if (hdsp->io_type == H9632) return 192000;
 969                 break;
 970         default:
 971                 break;
 972         }
 973         snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status);
 974         return 0;
 975 }
 976
 977 static int hdsp_external_sample_rate(struct hdsp *hdsp)
 978 {
 979         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
 980         unsigned int rate_bits = status2 & HDSP_systemFrequencyMask;
 981
 982         /* For the 9632 card, there seems to be no bit for indicating external
 983          * sample rate greater than 96kHz. The card reports the corresponding
 984          * single speed. So the best means seems to get spdif rate when
 985          * autosync reference is spdif */
 986         if (hdsp->io_type == H9632 &&
 987             hdsp_autosync_ref(hdsp) == HDSP_AUTOSYNC_FROM_SPDIF)
 988                  return hdsp_spdif_sample_rate(hdsp);
 989
 990         switch (rate_bits) {
 991         case HDSP_systemFrequency32:   return 32000;
 992         case HDSP_systemFrequency44_1: return 44100;
 993         case HDSP_systemFrequency48:   return 48000;
 994         case HDSP_systemFrequency64:   return 64000;
 995         case HDSP_systemFrequency88_2: return 88200;
 996         case HDSP_systemFrequency96:   return 96000;
 997         default:
 998                 return 0;
 999         }
1000 }
1001
1002 static void hdsp_compute_period_size(struct hdsp *hdsp)
1003 {
1004         hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8));
1005 }
1006
1007 static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp)
1008 {
1009         int position;
1010
1011         position = hdsp_read(hdsp, HDSP_statusRegister);
1012
1013         if (!hdsp->precise_ptr)
1014                 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
1015
1016         position &= HDSP_BufferPositionMask;
1017         position /= 4;
1018         position &= (hdsp->period_bytes/2) - 1;
1019         return position;
1020 }
1021
1022 static void hdsp_reset_hw_pointer(struct hdsp *hdsp)
1023 {
1024         hdsp_write (hdsp, HDSP_resetPointer, 0);
1025         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1026                 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
1027                  * requires (?) to write again DDS value after a reset pointer
1028                  * (at least, it works like this) */
1029                 hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value);
1030 }
1031
1032 static void hdsp_start_audio(struct hdsp *s)
1033 {
1034         s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start);
1035         hdsp_write(s, HDSP_controlRegister, s->control_register);
1036 }
1037
1038 static void hdsp_stop_audio(struct hdsp *s)
1039 {
1040         s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable);
1041         hdsp_write(s, HDSP_controlRegister, s->control_register);
1042 }
1043
1044 static void hdsp_silence_playback(struct hdsp *hdsp)
1045 {
1046         memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
1047 }
1048
1049 static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
1050 {
1051         int n;
1052
1053         spin_lock_irq(&s->lock);
1054
1055         frames >>= 7;
1056         n = 0;
1057         while (frames) {
1058                 n++;
1059                 frames >>= 1;
1060         }
1061
1062         s->control_register &= ~HDSP_LatencyMask;
1063         s->control_register |= hdsp_encode_latency(n);
1064
1065         hdsp_write(s, HDSP_controlRegister, s->control_register);
1066
1067         hdsp_compute_period_size(s);
1068
1069         spin_unlock_irq(&s->lock);
1070
1071         return 0;
1072 }
1073
1074 static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
1075 {
1076         u64 n;
1077
1078         if (rate >= 112000)
1079                 rate /= 4;
1080         else if (rate >= 56000)
1081                 rate /= 2;
1082
1083         n = DDS_NUMERATOR;
1084         n = div_u64(n, rate);
1085         /* n should be less than 2^32 for being written to FREQ register */
1086         snd_BUG_ON(n >> 32);
1087         /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1088            value to write it after a reset */
1089         hdsp->dds_value = n;
1090         hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value);
1091 }
1092
1093 static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally)
1094 {
1095         int reject_if_open = 0;
1096         int current_rate;
1097         int rate_bits;
1098
1099         /* ASSUMPTION: hdsp->lock is either held, or
1100            there is no need for it (e.g. during module
1101            initialization).
1102         */
1103
1104         if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
1105                 if (called_internally) {
1106                         /* request from ctl or card initialization */
1107                         snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1108                         return -1;
1109                 } else {
1110                         /* hw_param request while in AutoSync mode */
1111                         int external_freq = hdsp_external_sample_rate(hdsp);
1112                         int spdif_freq = hdsp_spdif_sample_rate(hdsp);
1113
1114                         if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1115                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
1116                         else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1117                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1118                         else if (rate != external_freq) {
1119                                 snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
1120                                 return -1;
1121                         }
1122                 }
1123         }
1124
1125         current_rate = hdsp->system_sample_rate;
1126
1127         /* Changing from a "single speed" to a "double speed" rate is
1128            not allowed if any substreams are open. This is because
1129            such a change causes a shift in the location of
1130            the DMA buffers and a reduction in the number of available
1131            buffers.
1132
1133            Note that a similar but essentially insoluble problem
1134            exists for externally-driven rate changes. All we can do
1135            is to flag rate changes in the read/write routines.  */
1136
1137         if (rate > 96000 && hdsp->io_type != H9632)
1138                 return -EINVAL;
1139
1140         switch (rate) {
1141         case 32000:
1142                 if (current_rate > 48000)
1143                         reject_if_open = 1;
1144                 rate_bits = HDSP_Frequency32KHz;
1145                 break;
1146         case 44100:
1147                 if (current_rate > 48000)
1148                         reject_if_open = 1;
1149                 rate_bits = HDSP_Frequency44_1KHz;
1150                 break;
1151         case 48000:
1152                 if (current_rate > 48000)
1153                         reject_if_open = 1;
1154                 rate_bits = HDSP_Frequency48KHz;
1155                 break;
1156         case 64000:
1157                 if (current_rate <= 48000 || current_rate > 96000)
1158                         reject_if_open = 1;
1159                 rate_bits = HDSP_Frequency64KHz;
1160                 break;
1161         case 88200:
1162                 if (current_rate <= 48000 || current_rate > 96000)
1163                         reject_if_open = 1;
1164                 rate_bits = HDSP_Frequency88_2KHz;
1165                 break;
1166         case 96000:
1167                 if (current_rate <= 48000 || current_rate > 96000)
1168                         reject_if_open = 1;
1169                 rate_bits = HDSP_Frequency96KHz;
1170                 break;
1171         case 128000:
1172                 if (current_rate < 128000)
1173                         reject_if_open = 1;
1174                 rate_bits = HDSP_Frequency128KHz;
1175                 break;
1176         case 176400:
1177                 if (current_rate < 128000)
1178                         reject_if_open = 1;
1179                 rate_bits = HDSP_Frequency176_4KHz;
1180                 break;
1181         case 192000:
1182                 if (current_rate < 128000)
1183                         reject_if_open = 1;
1184                 rate_bits = HDSP_Frequency192KHz;
1185                 break;
1186         default:
1187                 return -EINVAL;
1188         }
1189
1190         if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1191                 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1192                             hdsp->capture_pid,
1193                             hdsp->playback_pid);
1194                 return -EBUSY;
1195         }
1196
1197         hdsp->control_register &= ~HDSP_FrequencyMask;
1198         hdsp->control_register |= rate_bits;
1199         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1200
1201         /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1202         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1203                 hdsp_set_dds_value(hdsp, rate);
1204
1205         if (rate >= 128000) {
1206                 hdsp->channel_map = channel_map_H9632_qs;
1207         } else if (rate > 48000) {
1208                 if (hdsp->io_type == H9632)
1209                         hdsp->channel_map = channel_map_H9632_ds;
1210                 else
1211                         hdsp->channel_map = channel_map_ds;
1212         } else {
1213                 switch (hdsp->io_type) {
1214                 case RPM:
1215                 case Multiface:
1216                         hdsp->channel_map = channel_map_mf_ss;
1217                         break;
1218                 case Digiface:
1219                 case H9652:
1220                         hdsp->channel_map = channel_map_df_ss;
1221                         break;
1222                 case H9632:
1223                         hdsp->channel_map = channel_map_H9632_ss;
1224                         break;
1225                 default:
1226                         /* should never happen */
1227                         break;
1228                 }
1229         }
1230
1231         hdsp->system_sample_rate = rate;
1232
1233         return 0;
1234 }
1235
1236 /*----------------------------------------------------------------------------
1237    MIDI
1238   ----------------------------------------------------------------------------*/
1239
1240 static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id)
1241 {
1242         /* the hardware already does the relevant bit-mask with 0xff */
1243         if (id)
1244                 return hdsp_read(hdsp, HDSP_midiDataIn1);
1245         else
1246                 return hdsp_read(hdsp, HDSP_midiDataIn0);
1247 }
1248
1249 static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val)
1250 {
1251         /* the hardware already does the relevant bit-mask with 0xff */
1252         if (id)
1253                 hdsp_write(hdsp, HDSP_midiDataOut1, val);
1254         else
1255                 hdsp_write(hdsp, HDSP_midiDataOut0, val);
1256 }
1257
1258 static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id)
1259 {
1260         if (id)
1261                 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1262         else
1263                 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1264 }
1265
1266 static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id)
1267 {
1268         int fifo_bytes_used;
1269
1270         if (id)
1271                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1272         else
1273                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1274
1275         if (fifo_bytes_used < 128)
1276                 return  128 - fifo_bytes_used;
1277         else
1278                 return 0;
1279 }
1280
1281 static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id)
1282 {
1283         while (snd_hdsp_midi_input_available (hdsp, id))
1284                 snd_hdsp_midi_read_byte (hdsp, id);
1285 }
1286
1287 static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi)
1288 {
1289         unsigned long flags;
1290         int n_pending;
1291         int to_write;
1292         int i;
1293         unsigned char buf[128];
1294
1295         /* Output is not interrupt driven */
1296
1297         spin_lock_irqsave (&hmidi->lock, flags);
1298         if (hmidi->output) {
1299                 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
1300                         if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
1301                                 if (n_pending > (int)sizeof (buf))
1302                                         n_pending = sizeof (buf);
1303
1304                                 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
1305                                         for (i = 0; i < to_write; ++i)
1306                                                 snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
1307                                 }
1308                         }
1309                 }
1310         }
1311         spin_unlock_irqrestore (&hmidi->lock, flags);
1312         return 0;
1313 }
1314
1315 static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi)
1316 {
1317         unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
1318         unsigned long flags;
1319         int n_pending;
1320         int i;
1321
1322         spin_lock_irqsave (&hmidi->lock, flags);
1323         if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) {
1324                 if (hmidi->input) {
1325                         if (n_pending > (int)sizeof (buf))
1326                                 n_pending = sizeof (buf);
1327                         for (i = 0; i < n_pending; ++i)
1328                                 buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1329                         if (n_pending)
1330                                 snd_rawmidi_receive (hmidi->input, buf, n_pending);
1331                 } else {
1332                         /* flush the MIDI input FIFO */
1333                         while (--n_pending)
1334                                 snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1335                 }
1336         }
1337         hmidi->pending = 0;
1338         if (hmidi->id)
1339                 hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable;
1340         else
1341                 hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable;
1342         hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
1343         spin_unlock_irqrestore (&hmidi->lock, flags);
1344         return snd_hdsp_midi_output_write (hmidi);
1345 }
1346
1347 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1348 {
1349         struct hdsp *hdsp;
1350         struct hdsp_midi *hmidi;
1351         unsigned long flags;
1352         u32 ie;
1353
1354         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1355         hdsp = hmidi->hdsp;
1356         ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
1357         spin_lock_irqsave (&hdsp->lock, flags);
1358         if (up) {
1359                 if (!(hdsp->control_register & ie)) {
1360                         snd_hdsp_flush_midi_input (hdsp, hmidi->id);
1361                         hdsp->control_register |= ie;
1362                 }
1363         } else {
1364                 hdsp->control_register &= ~ie;
1365                 tasklet_kill(&hdsp->midi_tasklet);
1366         }
1367
1368         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1369         spin_unlock_irqrestore (&hdsp->lock, flags);
1370 }
1371
1372 static void snd_hdsp_midi_output_timer(unsigned long data)
1373 {
1374         struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
1375         unsigned long flags;
1376
1377         snd_hdsp_midi_output_write(hmidi);
1378         spin_lock_irqsave (&hmidi->lock, flags);
1379
1380         /* this does not bump hmidi->istimer, because the
1381            kernel automatically removed the timer when it
1382            expired, and we are now adding it back, thus
1383            leaving istimer wherever it was set before.
1384         */
1385
1386         if (hmidi->istimer) {
1387                 hmidi->timer.expires = 1 + jiffies;
1388                 add_timer(&hmidi->timer);
1389         }
1390
1391         spin_unlock_irqrestore (&hmidi->lock, flags);
1392 }
1393
1394 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1395 {
1396         struct hdsp_midi *hmidi;
1397         unsigned long flags;
1398
1399         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1400         spin_lock_irqsave (&hmidi->lock, flags);
1401         if (up) {
1402                 if (!hmidi->istimer) {
1403                         init_timer(&hmidi->timer);
1404                         hmidi->timer.function = snd_hdsp_midi_output_timer;
1405                         hmidi->timer.data = (unsigned long) hmidi;
1406                         hmidi->timer.expires = 1 + jiffies;
1407                         add_timer(&hmidi->timer);
1408                         hmidi->istimer++;
1409                 }
1410         } else {
1411                 if (hmidi->istimer && --hmidi->istimer <= 0)
1412                         del_timer (&hmidi->timer);
1413         }
1414         spin_unlock_irqrestore (&hmidi->lock, flags);
1415         if (up)
1416                 snd_hdsp_midi_output_write(hmidi);
1417 }
1418
1419 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream)
1420 {
1421         struct hdsp_midi *hmidi;
1422
1423         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1424         spin_lock_irq (&hmidi->lock);
1425         snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id);
1426         hmidi->input = substream;
1427         spin_unlock_irq (&hmidi->lock);
1428
1429         return 0;
1430 }
1431
1432 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream)
1433 {
1434         struct hdsp_midi *hmidi;
1435
1436         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1437         spin_lock_irq (&hmidi->lock);
1438         hmidi->output = substream;
1439         spin_unlock_irq (&hmidi->lock);
1440
1441         return 0;
1442 }
1443
1444 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream)
1445 {
1446         struct hdsp_midi *hmidi;
1447
1448         snd_hdsp_midi_input_trigger (substream, 0);
1449
1450         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1451         spin_lock_irq (&hmidi->lock);
1452         hmidi->input = NULL;
1453         spin_unlock_irq (&hmidi->lock);
1454
1455         return 0;
1456 }
1457
1458 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream)
1459 {
1460         struct hdsp_midi *hmidi;
1461
1462         snd_hdsp_midi_output_trigger (substream, 0);
1463
1464         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1465         spin_lock_irq (&hmidi->lock);
1466         hmidi->output = NULL;
1467         spin_unlock_irq (&hmidi->lock);
1468
1469         return 0;
1470 }
1471
1472 static struct snd_rawmidi_ops snd_hdsp_midi_output =
1473 {
1474         .open =         snd_hdsp_midi_output_open,
1475         .close =        snd_hdsp_midi_output_close,
1476         .trigger =      snd_hdsp_midi_output_trigger,
1477 };
1478
1479 static struct snd_rawmidi_ops snd_hdsp_midi_input =
1480 {
1481         .open =         snd_hdsp_midi_input_open,
1482         .close =        snd_hdsp_midi_input_close,
1483         .trigger =      snd_hdsp_midi_input_trigger,
1484 };
1485
1486 static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id)
1487 {
1488         char buf[32];
1489
1490         hdsp->midi[id].id = id;
1491         hdsp->midi[id].rmidi = NULL;
1492         hdsp->midi[id].input = NULL;
1493         hdsp->midi[id].output = NULL;
1494         hdsp->midi[id].hdsp = hdsp;
1495         hdsp->midi[id].istimer = 0;
1496         hdsp->midi[id].pending = 0;
1497         spin_lock_init (&hdsp->midi[id].lock);
1498
1499         sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1500         if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1501                 return -1;
1502
1503         sprintf(hdsp->midi[id].rmidi->name, "HDSP MIDI %d", id+1);
1504         hdsp->midi[id].rmidi->private_data = &hdsp->midi[id];
1505
1506         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output);
1507         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input);
1508
1509         hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1510                 SNDRV_RAWMIDI_INFO_INPUT |
1511                 SNDRV_RAWMIDI_INFO_DUPLEX;
1512
1513         return 0;
1514 }
1515
1516 /*-----------------------------------------------------------------------------
1517   Control Interface
1518   ----------------------------------------------------------------------------*/
1519
1520 static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes)
1521 {
1522         u32 val = 0;
1523         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1524         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1525         if (val & HDSP_SPDIFProfessional)
1526                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1527         else
1528                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1529         return val;
1530 }
1531
1532 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
1533 {
1534         aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1535                          ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1536         if (val & HDSP_SPDIFProfessional)
1537                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1538         else
1539                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1540 }
1541
1542 static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1543 {
1544         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1545         uinfo->count = 1;
1546         return 0;
1547 }
1548
1549 static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1550 {
1551         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1552
1553         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
1554         return 0;
1555 }
1556
1557 static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1558 {
1559         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1560         int change;
1561         u32 val;
1562
1563         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1564         spin_lock_irq(&hdsp->lock);
1565         change = val != hdsp->creg_spdif;
1566         hdsp->creg_spdif = val;
1567         spin_unlock_irq(&hdsp->lock);
1568         return change;
1569 }
1570
1571 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1572 {
1573         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1574         uinfo->count = 1;
1575         return 0;
1576 }
1577
1578 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1579 {
1580         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1581
1582         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
1583         return 0;
1584 }
1585
1586 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1587 {
1588         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1589         int change;
1590         u32 val;
1591
1592         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1593         spin_lock_irq(&hdsp->lock);
1594         change = val != hdsp->creg_spdif_stream;
1595         hdsp->creg_spdif_stream = val;
1596         hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
1597         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
1598         spin_unlock_irq(&hdsp->lock);
1599         return change;
1600 }
1601
1602 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1603 {
1604         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1605         uinfo->count = 1;
1606         return 0;
1607 }
1608
1609 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1610 {
1611         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1612         return 0;
1613 }
1614
1615 #define HDSP_SPDIF_IN(xname, xindex) \
1616 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1617   .name = xname, \
1618   .index = xindex, \
1619   .info = snd_hdsp_info_spdif_in, \
1620   .get = snd_hdsp_get_spdif_in, \
1621   .put = snd_hdsp_put_spdif_in }
1622
1623 static unsigned int hdsp_spdif_in(struct hdsp *hdsp)
1624 {
1625         return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask);
1626 }
1627
1628 static int hdsp_set_spdif_input(struct hdsp *hdsp, int in)
1629 {
1630         hdsp->control_register &= ~HDSP_SPDIFInputMask;
1631         hdsp->control_register |= hdsp_encode_spdif_in(in);
1632         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1633         return 0;
1634 }
1635
1636 static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1637 {
1638         static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"};
1639         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1640
1641         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1642         uinfo->count = 1;
1643         uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3);
1644         if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2))
1645                 uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2);
1646         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1647         return 0;
1648 }
1649
1650 static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1651 {
1652         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1653
1654         ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1655         return 0;
1656 }
1657
1658 static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1659 {
1660         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1661         int change;
1662         unsigned int val;
1663
1664         if (!snd_hdsp_use_is_exclusive(hdsp))
1665                 return -EBUSY;
1666         val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1667         spin_lock_irq(&hdsp->lock);
1668         change = val != hdsp_spdif_in(hdsp);
1669         if (change)
1670                 hdsp_set_spdif_input(hdsp, val);
1671         spin_unlock_irq(&hdsp->lock);
1672         return change;
1673 }
1674
1675 #define HDSP_SPDIF_OUT(xname, xindex) \
1676 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1677   .info = snd_hdsp_info_spdif_bits, \
1678   .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1679
1680 static int hdsp_spdif_out(struct hdsp *hdsp)
1681 {
1682         return (hdsp->control_register & HDSP_SPDIFOpticalOut) ? 1 : 0;
1683 }
1684
1685 static int hdsp_set_spdif_output(struct hdsp *hdsp, int out)
1686 {
1687         if (out)
1688                 hdsp->control_register |= HDSP_SPDIFOpticalOut;
1689         else
1690                 hdsp->control_register &= ~HDSP_SPDIFOpticalOut;
1691         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1692         return 0;
1693 }
1694
1695 #define snd_hdsp_info_spdif_bits        snd_ctl_boolean_mono_info
1696
1697 static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1698 {
1699         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1700
1701         ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp);
1702         return 0;
1703 }
1704
1705 static int snd_hdsp_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1706 {
1707         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1708         int change;
1709         unsigned int val;
1710
1711         if (!snd_hdsp_use_is_exclusive(hdsp))
1712                 return -EBUSY;
1713         val = ucontrol->value.integer.value[0] & 1;
1714         spin_lock_irq(&hdsp->lock);
1715         change = (int)val != hdsp_spdif_out(hdsp);
1716         hdsp_set_spdif_output(hdsp, val);
1717         spin_unlock_irq(&hdsp->lock);
1718         return change;
1719 }
1720
1721 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1722 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1723   .info = snd_hdsp_info_spdif_bits, \
1724   .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1725
1726 static int hdsp_spdif_professional(struct hdsp *hdsp)
1727 {
1728         return (hdsp->control_register & HDSP_SPDIFProfessional) ? 1 : 0;
1729 }
1730
1731 static int hdsp_set_spdif_professional(struct hdsp *hdsp, int val)
1732 {
1733         if (val)
1734                 hdsp->control_register |= HDSP_SPDIFProfessional;
1735         else
1736                 hdsp->control_register &= ~HDSP_SPDIFProfessional;
1737         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1738         return 0;
1739 }
1740
1741 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1742 {
1743         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1744
1745         ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp);
1746         return 0;
1747 }
1748
1749 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1750 {
1751         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1752         int change;
1753         unsigned int val;
1754
1755         if (!snd_hdsp_use_is_exclusive(hdsp))
1756                 return -EBUSY;
1757         val = ucontrol->value.integer.value[0] & 1;
1758         spin_lock_irq(&hdsp->lock);
1759         change = (int)val != hdsp_spdif_professional(hdsp);
1760         hdsp_set_spdif_professional(hdsp, val);
1761         spin_unlock_irq(&hdsp->lock);
1762         return change;
1763 }
1764
1765 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1766 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1767   .info = snd_hdsp_info_spdif_bits, \
1768   .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1769
1770 static int hdsp_spdif_emphasis(struct hdsp *hdsp)
1771 {
1772         return (hdsp->control_register & HDSP_SPDIFEmphasis) ? 1 : 0;
1773 }
1774
1775 static int hdsp_set_spdif_emphasis(struct hdsp *hdsp, int val)
1776 {
1777         if (val)
1778                 hdsp->control_register |= HDSP_SPDIFEmphasis;
1779         else
1780                 hdsp->control_register &= ~HDSP_SPDIFEmphasis;
1781         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1782         return 0;
1783 }
1784
1785 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1786 {
1787         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1788
1789         ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp);
1790         return 0;
1791 }
1792
1793 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1794 {
1795         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1796         int change;
1797         unsigned int val;
1798
1799         if (!snd_hdsp_use_is_exclusive(hdsp))
1800                 return -EBUSY;
1801         val = ucontrol->value.integer.value[0] & 1;
1802         spin_lock_irq(&hdsp->lock);
1803         change = (int)val != hdsp_spdif_emphasis(hdsp);
1804         hdsp_set_spdif_emphasis(hdsp, val);
1805         spin_unlock_irq(&hdsp->lock);
1806         return change;
1807 }
1808
1809 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1810 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1811   .info = snd_hdsp_info_spdif_bits, \
1812   .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1813
1814 static int hdsp_spdif_nonaudio(struct hdsp *hdsp)
1815 {
1816         return (hdsp->control_register & HDSP_SPDIFNonAudio) ? 1 : 0;
1817 }
1818
1819 static int hdsp_set_spdif_nonaudio(struct hdsp *hdsp, int val)
1820 {
1821         if (val)
1822                 hdsp->control_register |= HDSP_SPDIFNonAudio;
1823         else
1824                 hdsp->control_register &= ~HDSP_SPDIFNonAudio;
1825         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1826         return 0;
1827 }
1828
1829 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1830 {
1831         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1832
1833         ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp);
1834         return 0;
1835 }
1836
1837 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1838 {
1839         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1840         int change;
1841         unsigned int val;
1842
1843         if (!snd_hdsp_use_is_exclusive(hdsp))
1844                 return -EBUSY;
1845         val = ucontrol->value.integer.value[0] & 1;
1846         spin_lock_irq(&hdsp->lock);
1847         change = (int)val != hdsp_spdif_nonaudio(hdsp);
1848         hdsp_set_spdif_nonaudio(hdsp, val);
1849         spin_unlock_irq(&hdsp->lock);
1850         return change;
1851 }
1852
1853 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1854 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1855   .name = xname, \
1856   .index = xindex, \
1857   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1858   .info = snd_hdsp_info_spdif_sample_rate, \
1859   .get = snd_hdsp_get_spdif_sample_rate \
1860 }
1861
1862 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1863 {
1864         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1865         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1866
1867         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1868         uinfo->count = 1;
1869         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7;
1870         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1871                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1872         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1873         return 0;
1874 }
1875
1876 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1877 {
1878         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1879
1880         switch (hdsp_spdif_sample_rate(hdsp)) {
1881         case 32000:
1882                 ucontrol->value.enumerated.item[0] = 0;
1883                 break;
1884         case 44100:
1885                 ucontrol->value.enumerated.item[0] = 1;
1886                 break;
1887         case 48000:
1888                 ucontrol->value.enumerated.item[0] = 2;
1889                 break;
1890         case 64000:
1891                 ucontrol->value.enumerated.item[0] = 3;
1892                 break;
1893         case 88200:
1894                 ucontrol->value.enumerated.item[0] = 4;
1895                 break;
1896         case 96000:
1897                 ucontrol->value.enumerated.item[0] = 5;
1898                 break;
1899         case 128000:
1900                 ucontrol->value.enumerated.item[0] = 7;
1901                 break;
1902         case 176400:
1903                 ucontrol->value.enumerated.item[0] = 8;
1904                 break;
1905         case 192000:
1906                 ucontrol->value.enumerated.item[0] = 9;
1907                 break;
1908         default:
1909                 ucontrol->value.enumerated.item[0] = 6;
1910         }
1911         return 0;
1912 }
1913
1914 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1915 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1916   .name = xname, \
1917   .index = xindex, \
1918   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1919   .info = snd_hdsp_info_system_sample_rate, \
1920   .get = snd_hdsp_get_system_sample_rate \
1921 }
1922
1923 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1924 {
1925         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1926         uinfo->count = 1;
1927         return 0;
1928 }
1929
1930 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1931 {
1932         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1933
1934         ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1935         return 0;
1936 }
1937
1938 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1939 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1940   .name = xname, \
1941   .index = xindex, \
1942   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1943   .info = snd_hdsp_info_autosync_sample_rate, \
1944   .get = snd_hdsp_get_autosync_sample_rate \
1945 }
1946
1947 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1948 {
1949         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1950         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1951         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1952         uinfo->count = 1;
1953         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
1954         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1955                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1956         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1957         return 0;
1958 }
1959
1960 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1961 {
1962         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1963
1964         switch (hdsp_external_sample_rate(hdsp)) {
1965         case 32000:
1966                 ucontrol->value.enumerated.item[0] = 0;
1967                 break;
1968         case 44100:
1969                 ucontrol->value.enumerated.item[0] = 1;
1970                 break;
1971         case 48000:
1972                 ucontrol->value.enumerated.item[0] = 2;
1973                 break;
1974         case 64000:
1975                 ucontrol->value.enumerated.item[0] = 3;
1976                 break;
1977         case 88200:
1978                 ucontrol->value.enumerated.item[0] = 4;
1979                 break;
1980         case 96000:
1981                 ucontrol->value.enumerated.item[0] = 5;
1982                 break;
1983         case 128000:
1984                 ucontrol->value.enumerated.item[0] = 7;
1985                 break;
1986         case 176400:
1987                 ucontrol->value.enumerated.item[0] = 8;
1988                 break;
1989         case 192000:
1990                 ucontrol->value.enumerated.item[0] = 9;
1991                 break;
1992         default:
1993                 ucontrol->value.enumerated.item[0] = 6;
1994         }
1995         return 0;
1996 }
1997
1998 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1999 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2000   .name = xname, \
2001   .index = xindex, \
2002   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2003   .info = snd_hdsp_info_system_clock_mode, \
2004   .get = snd_hdsp_get_system_clock_mode \
2005 }
2006
2007 static int hdsp_system_clock_mode(struct hdsp *hdsp)
2008 {
2009         if (hdsp->control_register & HDSP_ClockModeMaster)
2010                 return 0;
2011         else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate)
2012                         return 0;
2013         return 1;
2014 }
2015
2016 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2017 {
2018         static char *texts[] = {"Master", "Slave" };
2019
2020         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2021         uinfo->count = 1;
2022         uinfo->value.enumerated.items = 2;
2023         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2024                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2025         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2026         return 0;
2027 }
2028
2029 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2030 {
2031         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2032
2033         ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
2034         return 0;
2035 }
2036
2037 #define HDSP_CLOCK_SOURCE(xname, xindex) \
2038 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2039   .name = xname, \
2040   .index = xindex, \
2041   .info = snd_hdsp_info_clock_source, \
2042   .get = snd_hdsp_get_clock_source, \
2043   .put = snd_hdsp_put_clock_source \
2044 }
2045
2046 static int hdsp_clock_source(struct hdsp *hdsp)
2047 {
2048         if (hdsp->control_register & HDSP_ClockModeMaster) {
2049                 switch (hdsp->system_sample_rate) {
2050                 case 32000:
2051                         return 1;
2052                 case 44100:
2053                         return 2;
2054                 case 48000:
2055                         return 3;
2056                 case 64000:
2057                         return 4;
2058                 case 88200:
2059                         return 5;
2060                 case 96000:
2061                         return 6;
2062                 case 128000:
2063                         return 7;
2064                 case 176400:
2065                         return 8;
2066                 case 192000:
2067                         return 9;
2068                 default:
2069                         return 3;
2070                 }
2071         } else {
2072                 return 0;
2073         }
2074 }
2075
2076 static int hdsp_set_clock_source(struct hdsp *hdsp, int mode)
2077 {
2078         int rate;
2079         switch (mode) {
2080         case HDSP_CLOCK_SOURCE_AUTOSYNC:
2081                 if (hdsp_external_sample_rate(hdsp) != 0) {
2082                     if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
2083                         hdsp->control_register &= ~HDSP_ClockModeMaster;
2084                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2085                         return 0;
2086                     }
2087                 }
2088                 return -1;
2089         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
2090                 rate = 32000;
2091                 break;
2092         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2093                 rate = 44100;
2094                 break;
2095         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
2096                 rate = 48000;
2097                 break;
2098         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
2099                 rate = 64000;
2100                 break;
2101         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2102                 rate = 88200;
2103                 break;
2104         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
2105                 rate = 96000;
2106                 break;
2107         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
2108                 rate = 128000;
2109                 break;
2110         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
2111                 rate = 176400;
2112                 break;
2113         case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
2114                 rate = 192000;
2115                 break;
2116         default:
2117                 rate = 48000;
2118         }
2119         hdsp->control_register |= HDSP_ClockModeMaster;
2120         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2121         hdsp_set_rate(hdsp, rate, 1);
2122         return 0;
2123 }
2124
2125 static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2126 {
2127         static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2128         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2129
2130         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2131         uinfo->count = 1;
2132         if (hdsp->io_type == H9632)
2133             uinfo->value.enumerated.items = 10;
2134         else
2135             uinfo->value.enumerated.items = 7;
2136         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2137                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2138         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2139         return 0;
2140 }
2141
2142 static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2143 {
2144         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2145
2146         ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2147         return 0;
2148 }
2149
2150 static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2151 {
2152         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2153         int change;
2154         int val;
2155
2156         if (!snd_hdsp_use_is_exclusive(hdsp))
2157                 return -EBUSY;
2158         val = ucontrol->value.enumerated.item[0];
2159         if (val < 0) val = 0;
2160         if (hdsp->io_type == H9632) {
2161                 if (val > 9)
2162                         val = 9;
2163         } else {
2164                 if (val > 6)
2165                         val = 6;
2166         }
2167         spin_lock_irq(&hdsp->lock);
2168         if (val != hdsp_clock_source(hdsp))
2169                 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2170         else
2171                 change = 0;
2172         spin_unlock_irq(&hdsp->lock);
2173         return change;
2174 }
2175
2176 #define snd_hdsp_info_clock_source_lock         snd_ctl_boolean_mono_info
2177
2178 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2179 {
2180         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2181
2182         ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2183         return 0;
2184 }
2185
2186 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2187 {
2188         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2189         int change;
2190
2191         change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2192         if (change)
2193                 hdsp->clock_source_locked = !!ucontrol->value.integer.value[0];
2194         return change;
2195 }
2196
2197 #define HDSP_DA_GAIN(xname, xindex) \
2198 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2199   .name = xname, \
2200   .index = xindex, \
2201   .info = snd_hdsp_info_da_gain, \
2202   .get = snd_hdsp_get_da_gain, \
2203   .put = snd_hdsp_put_da_gain \
2204 }
2205
2206 static int hdsp_da_gain(struct hdsp *hdsp)
2207 {
2208         switch (hdsp->control_register & HDSP_DAGainMask) {
2209         case HDSP_DAGainHighGain:
2210                 return 0;
2211         case HDSP_DAGainPlus4dBu:
2212                 return 1;
2213         case HDSP_DAGainMinus10dBV:
2214                 return 2;
2215         default:
2216                 return 1;
2217         }
2218 }
2219
2220 static int hdsp_set_da_gain(struct hdsp *hdsp, int mode)
2221 {
2222         hdsp->control_register &= ~HDSP_DAGainMask;
2223         switch (mode) {
2224         case 0:
2225                 hdsp->control_register |= HDSP_DAGainHighGain;
2226                 break;
2227         case 1:
2228                 hdsp->control_register |= HDSP_DAGainPlus4dBu;
2229                 break;
2230         case 2:
2231                 hdsp->control_register |= HDSP_DAGainMinus10dBV;
2232                 break;
2233         default:
2234                 return -1;
2235
2236         }
2237         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2238         return 0;
2239 }
2240
2241 static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2242 {
2243         static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2244
2245         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2246         uinfo->count = 1;
2247         uinfo->value.enumerated.items = 3;
2248         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2249                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2250         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2251         return 0;
2252 }
2253
2254 static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2255 {
2256         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2257
2258         ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2259         return 0;
2260 }
2261
2262 static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2263 {
2264         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2265         int change;
2266         int val;
2267
2268         if (!snd_hdsp_use_is_exclusive(hdsp))
2269                 return -EBUSY;
2270         val = ucontrol->value.enumerated.item[0];
2271         if (val < 0) val = 0;
2272         if (val > 2) val = 2;
2273         spin_lock_irq(&hdsp->lock);
2274         if (val != hdsp_da_gain(hdsp))
2275                 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2276         else
2277                 change = 0;
2278         spin_unlock_irq(&hdsp->lock);
2279         return change;
2280 }
2281
2282 #define HDSP_AD_GAIN(xname, xindex) \
2283 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2284   .name = xname, \
2285   .index = xindex, \
2286   .info = snd_hdsp_info_ad_gain, \
2287   .get = snd_hdsp_get_ad_gain, \
2288   .put = snd_hdsp_put_ad_gain \
2289 }
2290
2291 static int hdsp_ad_gain(struct hdsp *hdsp)
2292 {
2293         switch (hdsp->control_register & HDSP_ADGainMask) {
2294         case HDSP_ADGainMinus10dBV:
2295                 return 0;
2296         case HDSP_ADGainPlus4dBu:
2297                 return 1;
2298         case HDSP_ADGainLowGain:
2299                 return 2;
2300         default:
2301                 return 1;
2302         }
2303 }
2304
2305 static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode)
2306 {
2307         hdsp->control_register &= ~HDSP_ADGainMask;
2308         switch (mode) {
2309         case 0:
2310                 hdsp->control_register |= HDSP_ADGainMinus10dBV;
2311                 break;
2312         case 1:
2313                 hdsp->control_register |= HDSP_ADGainPlus4dBu;
2314                 break;
2315         case 2:
2316                 hdsp->control_register |= HDSP_ADGainLowGain;
2317                 break;
2318         default:
2319                 return -1;
2320
2321         }
2322         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2323         return 0;
2324 }
2325
2326 static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2327 {
2328         static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2329
2330         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2331         uinfo->count = 1;
2332         uinfo->value.enumerated.items = 3;
2333         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2334                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2335         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2336         return 0;
2337 }
2338
2339 static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2340 {
2341         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2342
2343         ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2344         return 0;
2345 }
2346
2347 static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2348 {
2349         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2350         int change;
2351         int val;
2352
2353         if (!snd_hdsp_use_is_exclusive(hdsp))
2354                 return -EBUSY;
2355         val = ucontrol->value.enumerated.item[0];
2356         if (val < 0) val = 0;
2357         if (val > 2) val = 2;
2358         spin_lock_irq(&hdsp->lock);
2359         if (val != hdsp_ad_gain(hdsp))
2360                 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2361         else
2362                 change = 0;
2363         spin_unlock_irq(&hdsp->lock);
2364         return change;
2365 }
2366
2367 #define HDSP_PHONE_GAIN(xname, xindex) \
2368 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2369   .name = xname, \
2370   .index = xindex, \
2371   .info = snd_hdsp_info_phone_gain, \
2372   .get = snd_hdsp_get_phone_gain, \
2373   .put = snd_hdsp_put_phone_gain \
2374 }
2375
2376 static int hdsp_phone_gain(struct hdsp *hdsp)
2377 {
2378         switch (hdsp->control_register & HDSP_PhoneGainMask) {
2379         case HDSP_PhoneGain0dB:
2380                 return 0;
2381         case HDSP_PhoneGainMinus6dB:
2382                 return 1;
2383         case HDSP_PhoneGainMinus12dB:
2384                 return 2;
2385         default:
2386                 return 0;
2387         }
2388 }
2389
2390 static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode)
2391 {
2392         hdsp->control_register &= ~HDSP_PhoneGainMask;
2393         switch (mode) {
2394         case 0:
2395                 hdsp->control_register |= HDSP_PhoneGain0dB;
2396                 break;
2397         case 1:
2398                 hdsp->control_register |= HDSP_PhoneGainMinus6dB;
2399                 break;
2400         case 2:
2401                 hdsp->control_register |= HDSP_PhoneGainMinus12dB;
2402                 break;
2403         default:
2404                 return -1;
2405
2406         }
2407         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2408         return 0;
2409 }
2410
2411 static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2412 {
2413         static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
2414
2415         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2416         uinfo->count = 1;
2417         uinfo->value.enumerated.items = 3;
2418         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2419                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2420         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2421         return 0;
2422 }
2423
2424 static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2425 {
2426         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2427
2428         ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2429         return 0;
2430 }
2431
2432 static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2433 {
2434         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2435         int change;
2436         int val;
2437
2438         if (!snd_hdsp_use_is_exclusive(hdsp))
2439                 return -EBUSY;
2440         val = ucontrol->value.enumerated.item[0];
2441         if (val < 0) val = 0;
2442         if (val > 2) val = 2;
2443         spin_lock_irq(&hdsp->lock);
2444         if (val != hdsp_phone_gain(hdsp))
2445                 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2446         else
2447                 change = 0;
2448         spin_unlock_irq(&hdsp->lock);
2449         return change;
2450 }
2451
2452 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2453 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2454   .name = xname, \
2455   .index = xindex, \
2456   .info = snd_hdsp_info_xlr_breakout_cable, \
2457   .get = snd_hdsp_get_xlr_breakout_cable, \
2458   .put = snd_hdsp_put_xlr_breakout_cable \
2459 }
2460
2461 static int hdsp_xlr_breakout_cable(struct hdsp *hdsp)
2462 {
2463         if (hdsp->control_register & HDSP_XLRBreakoutCable)
2464                 return 1;
2465         return 0;
2466 }
2467
2468 static int hdsp_set_xlr_breakout_cable(struct hdsp *hdsp, int mode)
2469 {
2470         if (mode)
2471                 hdsp->control_register |= HDSP_XLRBreakoutCable;
2472         else
2473                 hdsp->control_register &= ~HDSP_XLRBreakoutCable;
2474         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2475         return 0;
2476 }
2477
2478 #define snd_hdsp_info_xlr_breakout_cable        snd_ctl_boolean_mono_info
2479
2480 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2481 {
2482         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2483
2484         ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp);
2485         return 0;
2486 }
2487
2488 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2489 {
2490         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2491         int change;
2492         int val;
2493
2494         if (!snd_hdsp_use_is_exclusive(hdsp))
2495                 return -EBUSY;
2496         val = ucontrol->value.integer.value[0] & 1;
2497         spin_lock_irq(&hdsp->lock);
2498         change = (int)val != hdsp_xlr_breakout_cable(hdsp);
2499         hdsp_set_xlr_breakout_cable(hdsp, val);
2500         spin_unlock_irq(&hdsp->lock);
2501         return change;
2502 }
2503
2504 /* (De)activates old RME Analog Extension Board
2505    These are connected to the internal ADAT connector
2506    Switching this on desactivates external ADAT
2507 */
2508 #define HDSP_AEB(xname, xindex) \
2509 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2510   .name = xname, \
2511   .index = xindex, \
2512   .info = snd_hdsp_info_aeb, \
2513   .get = snd_hdsp_get_aeb, \
2514   .put = snd_hdsp_put_aeb \
2515 }
2516
2517 static int hdsp_aeb(struct hdsp *hdsp)
2518 {
2519         if (hdsp->control_register & HDSP_AnalogExtensionBoard)
2520                 return 1;
2521         return 0;
2522 }
2523
2524 static int hdsp_set_aeb(struct hdsp *hdsp, int mode)
2525 {
2526         if (mode)
2527                 hdsp->control_register |= HDSP_AnalogExtensionBoard;
2528         else
2529                 hdsp->control_register &= ~HDSP_AnalogExtensionBoard;
2530         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2531         return 0;
2532 }
2533
2534 #define snd_hdsp_info_aeb               snd_ctl_boolean_mono_info
2535
2536 static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2537 {
2538         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2539
2540         ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp);
2541         return 0;
2542 }
2543
2544 static int snd_hdsp_put_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2545 {
2546         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2547         int change;
2548         int val;
2549
2550         if (!snd_hdsp_use_is_exclusive(hdsp))
2551                 return -EBUSY;
2552         val = ucontrol->value.integer.value[0] & 1;
2553         spin_lock_irq(&hdsp->lock);
2554         change = (int)val != hdsp_aeb(hdsp);
2555         hdsp_set_aeb(hdsp, val);
2556         spin_unlock_irq(&hdsp->lock);
2557         return change;
2558 }
2559
2560 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2561 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2562   .name = xname, \
2563   .index = xindex, \
2564   .info = snd_hdsp_info_pref_sync_ref, \
2565   .get = snd_hdsp_get_pref_sync_ref, \
2566   .put = snd_hdsp_put_pref_sync_ref \
2567 }
2568
2569 static int hdsp_pref_sync_ref(struct hdsp *hdsp)
2570 {
2571         /* Notice that this looks at the requested sync source,
2572            not the one actually in use.
2573         */
2574
2575         switch (hdsp->control_register & HDSP_SyncRefMask) {
2576         case HDSP_SyncRef_ADAT1:
2577                 return HDSP_SYNC_FROM_ADAT1;
2578         case HDSP_SyncRef_ADAT2:
2579                 return HDSP_SYNC_FROM_ADAT2;
2580         case HDSP_SyncRef_ADAT3:
2581                 return HDSP_SYNC_FROM_ADAT3;
2582         case HDSP_SyncRef_SPDIF:
2583                 return HDSP_SYNC_FROM_SPDIF;
2584         case HDSP_SyncRef_WORD:
2585                 return HDSP_SYNC_FROM_WORD;
2586         case HDSP_SyncRef_ADAT_SYNC:
2587                 return HDSP_SYNC_FROM_ADAT_SYNC;
2588         default:
2589                 return HDSP_SYNC_FROM_WORD;
2590         }
2591         return 0;
2592 }
2593
2594 static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref)
2595 {
2596         hdsp->control_register &= ~HDSP_SyncRefMask;
2597         switch (pref) {
2598         case HDSP_SYNC_FROM_ADAT1:
2599                 hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */
2600                 break;
2601         case HDSP_SYNC_FROM_ADAT2:
2602                 hdsp->control_register |= HDSP_SyncRef_ADAT2;
2603                 break;
2604         case HDSP_SYNC_FROM_ADAT3:
2605                 hdsp->control_register |= HDSP_SyncRef_ADAT3;
2606                 break;
2607         case HDSP_SYNC_FROM_SPDIF:
2608                 hdsp->control_register |= HDSP_SyncRef_SPDIF;
2609                 break;
2610         case HDSP_SYNC_FROM_WORD:
2611                 hdsp->control_register |= HDSP_SyncRef_WORD;
2612                 break;
2613         case HDSP_SYNC_FROM_ADAT_SYNC:
2614                 hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC;
2615                 break;
2616         default:
2617                 return -1;
2618         }
2619         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2620         return 0;
2621 }
2622
2623 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2624 {
2625         static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2626         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2627
2628         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2629         uinfo->count = 1;
2630
2631         switch (hdsp->io_type) {
2632         case Digiface:
2633         case H9652:
2634                 uinfo->value.enumerated.items = 6;
2635                 break;
2636         case Multiface:
2637                 uinfo->value.enumerated.items = 4;
2638                 break;
2639         case H9632:
2640                 uinfo->value.enumerated.items = 3;
2641                 break;
2642         default:
2643                 uinfo->value.enumerated.items = 0;
2644                 break;
2645         }
2646
2647         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2648                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2649         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2650         return 0;
2651 }
2652
2653 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2654 {
2655         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2656
2657         ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2658         return 0;
2659 }
2660
2661 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2662 {
2663         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2664         int change, max;
2665         unsigned int val;
2666
2667         if (!snd_hdsp_use_is_exclusive(hdsp))
2668                 return -EBUSY;
2669
2670         switch (hdsp->io_type) {
2671         case Digiface:
2672         case H9652:
2673                 max = 6;
2674                 break;
2675         case Multiface:
2676                 max = 4;
2677                 break;
2678         case H9632:
2679                 max = 3;
2680                 break;
2681         default:
2682                 return -EIO;
2683         }
2684
2685         val = ucontrol->value.enumerated.item[0] % max;
2686         spin_lock_irq(&hdsp->lock);
2687         change = (int)val != hdsp_pref_sync_ref(hdsp);
2688         hdsp_set_pref_sync_ref(hdsp, val);
2689         spin_unlock_irq(&hdsp->lock);
2690         return change;
2691 }
2692
2693 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2694 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2695   .name = xname, \
2696   .index = xindex, \
2697   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2698   .info = snd_hdsp_info_autosync_ref, \
2699   .get = snd_hdsp_get_autosync_ref, \
2700 }
2701
2702 static int hdsp_autosync_ref(struct hdsp *hdsp)
2703 {
2704         /* This looks at the autosync selected sync reference */
2705         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
2706
2707         switch (status2 & HDSP_SelSyncRefMask) {
2708         case HDSP_SelSyncRef_WORD:
2709                 return HDSP_AUTOSYNC_FROM_WORD;
2710         case HDSP_SelSyncRef_ADAT_SYNC:
2711                 return HDSP_AUTOSYNC_FROM_ADAT_SYNC;
2712         case HDSP_SelSyncRef_SPDIF:
2713                 return HDSP_AUTOSYNC_FROM_SPDIF;
2714         case HDSP_SelSyncRefMask:
2715                 return HDSP_AUTOSYNC_FROM_NONE;
2716         case HDSP_SelSyncRef_ADAT1:
2717                 return HDSP_AUTOSYNC_FROM_ADAT1;
2718         case HDSP_SelSyncRef_ADAT2:
2719                 return HDSP_AUTOSYNC_FROM_ADAT2;
2720         case HDSP_SelSyncRef_ADAT3:
2721                 return HDSP_AUTOSYNC_FROM_ADAT3;
2722         default:
2723                 return HDSP_AUTOSYNC_FROM_WORD;
2724         }
2725         return 0;
2726 }
2727
2728 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2729 {
2730         static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2731
2732         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2733         uinfo->count = 1;
2734         uinfo->value.enumerated.items = 7;
2735         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2736                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2737         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2738         return 0;
2739 }
2740
2741 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2742 {
2743         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2744
2745         ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2746         return 0;
2747 }
2748
2749 #define HDSP_LINE_OUT(xname, xindex) \
2750 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2751   .name = xname, \
2752   .index = xindex, \
2753   .info = snd_hdsp_info_line_out, \
2754   .get = snd_hdsp_get_line_out, \
2755   .put = snd_hdsp_put_line_out \
2756 }
2757
2758 static int hdsp_line_out(struct hdsp *hdsp)
2759 {
2760         return (hdsp->control_register & HDSP_LineOut) ? 1 : 0;
2761 }
2762
2763 static int hdsp_set_line_output(struct hdsp *hdsp, int out)
2764 {
2765         if (out)
2766                 hdsp->control_register |= HDSP_LineOut;
2767         else
2768                 hdsp->control_register &= ~HDSP_LineOut;
2769         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2770         return 0;
2771 }
2772
2773 #define snd_hdsp_info_line_out          snd_ctl_boolean_mono_info
2774
2775 static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2776 {
2777         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2778
2779         spin_lock_irq(&hdsp->lock);
2780         ucontrol->value.integer.value[0] = hdsp_line_out(hdsp);
2781         spin_unlock_irq(&hdsp->lock);
2782         return 0;
2783 }
2784
2785 static int snd_hdsp_put_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2786 {
2787         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2788         int change;
2789         unsigned int val;
2790
2791         if (!snd_hdsp_use_is_exclusive(hdsp))
2792                 return -EBUSY;
2793         val = ucontrol->value.integer.value[0] & 1;
2794         spin_lock_irq(&hdsp->lock);
2795         change = (int)val != hdsp_line_out(hdsp);
2796         hdsp_set_line_output(hdsp, val);
2797         spin_unlock_irq(&hdsp->lock);
2798         return change;
2799 }
2800
2801 #define HDSP_PRECISE_POINTER(xname, xindex) \
2802 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2803   .name = xname, \
2804   .index = xindex, \
2805   .info = snd_hdsp_info_precise_pointer, \
2806   .get = snd_hdsp_get_precise_pointer, \
2807   .put = snd_hdsp_put_precise_pointer \
2808 }
2809
2810 static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise)
2811 {
2812         if (precise)
2813                 hdsp->precise_ptr = 1;
2814         else
2815                 hdsp->precise_ptr = 0;
2816         return 0;
2817 }
2818
2819 #define snd_hdsp_info_precise_pointer           snd_ctl_boolean_mono_info
2820
2821 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2822 {
2823         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2824
2825         spin_lock_irq(&hdsp->lock);
2826         ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2827         spin_unlock_irq(&hdsp->lock);
2828         return 0;
2829 }
2830
2831 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2832 {
2833         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2834         int change;
2835         unsigned int val;
2836
2837         if (!snd_hdsp_use_is_exclusive(hdsp))
2838                 return -EBUSY;
2839         val = ucontrol->value.integer.value[0] & 1;
2840         spin_lock_irq(&hdsp->lock);
2841         change = (int)val != hdsp->precise_ptr;
2842         hdsp_set_precise_pointer(hdsp, val);
2843         spin_unlock_irq(&hdsp->lock);
2844         return change;
2845 }
2846
2847 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2848 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2849   .name = xname, \
2850   .index = xindex, \
2851   .info = snd_hdsp_info_use_midi_tasklet, \
2852   .get = snd_hdsp_get_use_midi_tasklet, \
2853   .put = snd_hdsp_put_use_midi_tasklet \
2854 }
2855
2856 static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet)
2857 {
2858         if (use_tasklet)
2859                 hdsp->use_midi_tasklet = 1;
2860         else
2861                 hdsp->use_midi_tasklet = 0;
2862         return 0;
2863 }
2864
2865 #define snd_hdsp_info_use_midi_tasklet          snd_ctl_boolean_mono_info
2866
2867 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2868 {
2869         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2870
2871         spin_lock_irq(&hdsp->lock);
2872         ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
2873         spin_unlock_irq(&hdsp->lock);
2874         return 0;
2875 }
2876
2877 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2878 {
2879         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2880         int change;
2881         unsigned int val;
2882
2883         if (!snd_hdsp_use_is_exclusive(hdsp))
2884                 return -EBUSY;
2885         val = ucontrol->value.integer.value[0] & 1;
2886         spin_lock_irq(&hdsp->lock);
2887         change = (int)val != hdsp->use_midi_tasklet;
2888         hdsp_set_use_midi_tasklet(hdsp, val);
2889         spin_unlock_irq(&hdsp->lock);
2890         return change;
2891 }
2892
2893 #define HDSP_MIXER(xname, xindex) \
2894 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2895   .name = xname, \
2896   .index = xindex, \
2897   .device = 0, \
2898   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2899                  SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2900   .info = snd_hdsp_info_mixer, \
2901   .get = snd_hdsp_get_mixer, \
2902   .put = snd_hdsp_put_mixer \
2903 }
2904
2905 static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2906 {
2907         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2908         uinfo->count = 3;
2909         uinfo->value.integer.min = 0;
2910         uinfo->value.integer.max = 65536;
2911         uinfo->value.integer.step = 1;
2912         return 0;
2913 }
2914
2915 static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2916 {
2917         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2918         int source;
2919         int destination;
2920         int addr;
2921
2922         source = ucontrol->value.integer.value[0];
2923         destination = ucontrol->value.integer.value[1];
2924
2925         if (source >= hdsp->max_channels)
2926                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
2927         else
2928                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2929
2930         spin_lock_irq(&hdsp->lock);
2931         ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
2932         spin_unlock_irq(&hdsp->lock);
2933         return 0;
2934 }
2935
2936 static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2937 {
2938         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2939         int change;
2940         int source;
2941         int destination;
2942         int gain;
2943         int addr;
2944
2945         if (!snd_hdsp_use_is_exclusive(hdsp))
2946                 return -EBUSY;
2947
2948         source = ucontrol->value.integer.value[0];
2949         destination = ucontrol->value.integer.value[1];
2950
2951         if (source >= hdsp->max_channels)
2952                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination);
2953         else
2954                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2955
2956         gain = ucontrol->value.integer.value[2];
2957
2958         spin_lock_irq(&hdsp->lock);
2959         change = gain != hdsp_read_gain(hdsp, addr);
2960         if (change)
2961                 hdsp_write_gain(hdsp, addr, gain);
2962         spin_unlock_irq(&hdsp->lock);
2963         return change;
2964 }
2965
2966 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2967 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2968   .name = xname, \
2969   .index = xindex, \
2970   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2971   .info = snd_hdsp_info_sync_check, \
2972   .get = snd_hdsp_get_wc_sync_check \
2973 }
2974
2975 static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2976 {
2977         static char *texts[] = {"No Lock", "Lock", "Sync" };
2978         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2979         uinfo->count = 1;
2980         uinfo->value.enumerated.items = 3;
2981         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2982                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2983         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2984         return 0;
2985 }
2986
2987 static int hdsp_wc_sync_check(struct hdsp *hdsp)
2988 {
2989         int status2 = hdsp_read(hdsp, HDSP_status2Register);
2990         if (status2 & HDSP_wc_lock) {
2991                 if (status2 & HDSP_wc_sync)
2992                         return 2;
2993                 else
2994                          return 1;
2995         } else
2996                 return 0;
2997         return 0;
2998 }
2999
3000 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3001 {
3002         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3003
3004         ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
3005         return 0;
3006 }
3007
3008 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
3009 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3010   .name = xname, \
3011   .index = xindex, \
3012   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3013   .info = snd_hdsp_info_sync_check, \
3014   .get = snd_hdsp_get_spdif_sync_check \
3015 }
3016
3017 static int hdsp_spdif_sync_check(struct hdsp *hdsp)
3018 {
3019         int status = hdsp_read(hdsp, HDSP_statusRegister);
3020         if (status & HDSP_SPDIFErrorFlag)
3021                 return 0;
3022         else {
3023                 if (status & HDSP_SPDIFSync)
3024                         return 2;
3025                 else
3026                         return 1;
3027         }
3028         return 0;
3029 }
3030
3031 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3032 {
3033         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3034
3035         ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
3036         return 0;
3037 }
3038
3039 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
3040 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3041   .name = xname, \
3042   .index = xindex, \
3043   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3044   .info = snd_hdsp_info_sync_check, \
3045   .get = snd_hdsp_get_adatsync_sync_check \
3046 }
3047
3048 static int hdsp_adatsync_sync_check(struct hdsp *hdsp)
3049 {
3050         int status = hdsp_read(hdsp, HDSP_statusRegister);
3051         if (status & HDSP_TimecodeLock) {
3052                 if (status & HDSP_TimecodeSync)
3053                         return 2;
3054                 else
3055                         return 1;
3056         } else
3057                 return 0;
3058 }
3059
3060 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3061 {
3062         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3063
3064         ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
3065         return 0;
3066 }
3067
3068 #define HDSP_ADAT_SYNC_CHECK \
3069 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3070   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3071   .info = snd_hdsp_info_sync_check, \
3072   .get = snd_hdsp_get_adat_sync_check \
3073 }
3074
3075 static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
3076 {
3077         int status = hdsp_read(hdsp, HDSP_statusRegister);
3078
3079         if (status & (HDSP_Lock0>>idx)) {
3080                 if (status & (HDSP_Sync0>>idx))
3081                         return 2;
3082                 else
3083                         return 1;
3084         } else
3085                 return 0;
3086 }
3087
3088 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3089 {
3090         int offset;
3091         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3092
3093         offset = ucontrol->id.index - 1;
3094         snd_BUG_ON(offset < 0);
3095
3096         switch (hdsp->io_type) {
3097         case Digiface:
3098         case H9652:
3099                 if (offset >= 3)
3100                         return -EINVAL;
3101                 break;
3102         case Multiface:
3103         case H9632:
3104                 if (offset >= 1)
3105                         return -EINVAL;
3106                 break;
3107         default:
3108                 return -EIO;
3109         }
3110
3111         ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
3112         return 0;
3113 }
3114
3115 #define HDSP_DDS_OFFSET(xname, xindex) \
3116 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3117   .name = xname, \
3118   .index = xindex, \
3119   .info = snd_hdsp_info_dds_offset, \
3120   .get = snd_hdsp_get_dds_offset, \
3121   .put = snd_hdsp_put_dds_offset \
3122 }
3123
3124 static int hdsp_dds_offset(struct hdsp *hdsp)
3125 {
3126         u64 n;
3127         unsigned int dds_value = hdsp->dds_value;
3128         int system_sample_rate = hdsp->system_sample_rate;
3129
3130         if (!dds_value)
3131                 return 0;
3132
3133         n = DDS_NUMERATOR;
3134         /*
3135          * dds_value = n / rate
3136          * rate = n / dds_value
3137          */
3138         n = div_u64(n, dds_value);
3139         if (system_sample_rate >= 112000)
3140                 n *= 4;
3141         else if (system_sample_rate >= 56000)
3142                 n *= 2;
3143         return ((int)n) - system_sample_rate;
3144 }
3145
3146 static int hdsp_set_dds_offset(struct hdsp *hdsp, int offset_hz)
3147 {
3148         int rate = hdsp->system_sample_rate + offset_hz;
3149         hdsp_set_dds_value(hdsp, rate);
3150         return 0;
3151 }
3152
3153 static int snd_hdsp_info_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3154 {
3155         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3156         uinfo->count = 1;
3157         uinfo->value.integer.min = -5000;
3158         uinfo->value.integer.max = 5000;
3159         return 0;
3160 }
3161
3162 static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3163 {
3164         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3165
3166         ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp);
3167         return 0;
3168 }
3169
3170 static int snd_hdsp_put_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3171 {
3172         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3173         int change;
3174         int val;
3175
3176         if (!snd_hdsp_use_is_exclusive(hdsp))
3177                 return -EBUSY;
3178         val = ucontrol->value.enumerated.item[0];
3179         spin_lock_irq(&hdsp->lock);
3180         if (val != hdsp_dds_offset(hdsp))
3181                 change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0;
3182         else
3183                 change = 0;
3184         spin_unlock_irq(&hdsp->lock);
3185         return change;
3186 }
3187
3188 static struct snd_kcontrol_new snd_hdsp_9632_controls[] = {
3189 HDSP_DA_GAIN("DA Gain", 0),
3190 HDSP_AD_GAIN("AD Gain", 0),
3191 HDSP_PHONE_GAIN("Phones Gain", 0),
3192 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0),
3193 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
3194 };
3195
3196 static struct snd_kcontrol_new snd_hdsp_controls[] = {
3197 {
3198         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3199         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
3200         .info =         snd_hdsp_control_spdif_info,
3201         .get =          snd_hdsp_control_spdif_get,
3202         .put =          snd_hdsp_control_spdif_put,
3203 },
3204 {
3205         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
3206         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3207         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
3208         .info =         snd_hdsp_control_spdif_stream_info,
3209         .get =          snd_hdsp_control_spdif_stream_get,
3210         .put =          snd_hdsp_control_spdif_stream_put,
3211 },
3212 {
3213         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3214         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3215         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
3216         .info =         snd_hdsp_control_spdif_mask_info,
3217         .get =          snd_hdsp_control_spdif_mask_get,
3218         .private_value = IEC958_AES0_NONAUDIO |
3219                          IEC958_AES0_PROFESSIONAL |
3220                          IEC958_AES0_CON_EMPHASIS,
3221 },
3222 {
3223         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3224         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3225         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
3226         .info =         snd_hdsp_control_spdif_mask_info,
3227         .get =          snd_hdsp_control_spdif_mask_get,
3228         .private_value = IEC958_AES0_NONAUDIO |
3229                          IEC958_AES0_PROFESSIONAL |
3230                          IEC958_AES0_PRO_EMPHASIS,
3231 },
3232 HDSP_MIXER("Mixer", 0),
3233 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3234 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3235 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3236 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3237 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3238 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3239 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3240 {
3241         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3242         .name = "Sample Clock Source Locking",
3243         .info = snd_hdsp_info_clock_source_lock,
3244         .get = snd_hdsp_get_clock_source_lock,
3245         .put = snd_hdsp_put_clock_source_lock,
3246 },
3247 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3248 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3249 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3250 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3251 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3252 /* 'External Rate' complies with the alsa control naming scheme */
3253 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3254 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3255 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3256 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3257 HDSP_LINE_OUT("Line Out", 0),
3258 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3259 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3260 };
3261
3262
3263 static int hdsp_rpm_input12(struct hdsp *hdsp)
3264 {
3265         switch (hdsp->control_register & HDSP_RPM_Inp12) {
3266         case HDSP_RPM_Inp12_Phon_6dB:
3267                 return 0;
3268         case HDSP_RPM_Inp12_Phon_n6dB:
3269                 return 2;
3270         case HDSP_RPM_Inp12_Line_0dB:
3271                 return 3;
3272         case HDSP_RPM_Inp12_Line_n6dB:
3273                 return 4;
3274         }
3275         return 1;
3276 }
3277
3278
3279 static int snd_hdsp_get_rpm_input12(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3280 {
3281         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3282
3283         ucontrol->value.enumerated.item[0] = hdsp_rpm_input12(hdsp);
3284         return 0;
3285 }
3286
3287
3288 static int hdsp_set_rpm_input12(struct hdsp *hdsp, int mode)
3289 {
3290         hdsp->control_register &= ~HDSP_RPM_Inp12;
3291         switch (mode) {
3292         case 0:
3293                 hdsp->control_register |= HDSP_RPM_Inp12_Phon_6dB;
3294                 break;
3295         case 1:
3296                 break;
3297         case 2:
3298                 hdsp->control_register |= HDSP_RPM_Inp12_Phon_n6dB;
3299                 break;
3300         case 3:
3301                 hdsp->control_register |= HDSP_RPM_Inp12_Line_0dB;
3302                 break;
3303         case 4:
3304                 hdsp->control_register |= HDSP_RPM_Inp12_Line_n6dB;
3305                 break;
3306         default:
3307                 return -1;
3308         }
3309
3310         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3311         return 0;
3312 }
3313
3314
3315 static int snd_hdsp_put_rpm_input12(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3316 {
3317         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3318         int change;
3319         int val;
3320
3321         if (!snd_hdsp_use_is_exclusive(hdsp))
3322                 return -EBUSY;
3323         val = ucontrol->value.enumerated.item[0];
3324         if (val < 0)
3325                 val = 0;
3326         if (val > 4)
3327                 val = 4;
3328         spin_lock_irq(&hdsp->lock);
3329         if (val != hdsp_rpm_input12(hdsp))
3330                 change = (hdsp_set_rpm_input12(hdsp, val) == 0) ? 1 : 0;
3331         else
3332                 change = 0;
3333         spin_unlock_irq(&hdsp->lock);
3334         return change;
3335 }
3336
3337
3338 static int snd_hdsp_info_rpm_input(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3339 {
3340         static char *texts[] = {"Phono +6dB", "Phono 0dB", "Phono -6dB", "Line 0dB", "Line -6dB"};
3341
3342         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3343         uinfo->count = 1;
3344         uinfo->value.enumerated.items = 5;
3345         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3346                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3347         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3348         return 0;
3349 }
3350
3351
3352 static int hdsp_rpm_input34(struct hdsp *hdsp)
3353 {
3354         switch (hdsp->control_register & HDSP_RPM_Inp34) {
3355         case HDSP_RPM_Inp34_Phon_6dB:
3356                 return 0;
3357         case HDSP_RPM_Inp34_Phon_n6dB:
3358                 return 2;
3359         case HDSP_RPM_Inp34_Line_0dB:
3360                 return 3;
3361         case HDSP_RPM_Inp34_Line_n6dB:
3362                 return 4;
3363         }
3364         return 1;
3365 }
3366
3367
3368 static int snd_hdsp_get_rpm_input34(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3369 {
3370         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3371
3372         ucontrol->value.enumerated.item[0] = hdsp_rpm_input34(hdsp);
3373         return 0;
3374 }
3375
3376
3377 static int hdsp_set_rpm_input34(struct hdsp *hdsp, int mode)
3378 {
3379         hdsp->control_register &= ~HDSP_RPM_Inp34;
3380         switch (mode) {
3381         case 0:
3382                 hdsp->control_register |= HDSP_RPM_Inp34_Phon_6dB;
3383                 break;
3384         case 1:
3385                 break;
3386         case 2:
3387                 hdsp->control_register |= HDSP_RPM_Inp34_Phon_n6dB;
3388                 break;
3389         case 3:
3390                 hdsp->control_register |= HDSP_RPM_Inp34_Line_0dB;
3391                 break;
3392         case 4:
3393                 hdsp->control_register |= HDSP_RPM_Inp34_Line_n6dB;
3394                 break;
3395         default:
3396                 return -1;
3397         }
3398
3399         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3400         return 0;
3401 }
3402
3403
3404 static int snd_hdsp_put_rpm_input34(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3405 {
3406         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3407         int change;
3408         int val;
3409
3410         if (!snd_hdsp_use_is_exclusive(hdsp))
3411                 return -EBUSY;
3412         val = ucontrol->value.enumerated.item[0];
3413         if (val < 0)
3414                 val = 0;
3415         if (val > 4)
3416                 val = 4;
3417         spin_lock_irq(&hdsp->lock);
3418         if (val != hdsp_rpm_input34(hdsp))
3419                 change = (hdsp_set_rpm_input34(hdsp, val) == 0) ? 1 : 0;
3420         else
3421                 change = 0;
3422         spin_unlock_irq(&hdsp->lock);
3423         return change;
3424 }
3425
3426
3427 /* RPM Bypass switch */
3428 static int hdsp_rpm_bypass(struct hdsp *hdsp)
3429 {
3430         return (hdsp->control_register & HDSP_RPM_Bypass) ? 1 : 0;
3431 }
3432
3433
3434 static int snd_hdsp_get_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3435 {
3436         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3437
3438         ucontrol->value.integer.value[0] = hdsp_rpm_bypass(hdsp);
3439         return 0;
3440 }
3441
3442
3443 static int hdsp_set_rpm_bypass(struct hdsp *hdsp, int on)
3444 {
3445         if (on)
3446                 hdsp->control_register |= HDSP_RPM_Bypass;
3447         else
3448                 hdsp->control_register &= ~HDSP_RPM_Bypass;
3449         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3450         return 0;
3451 }
3452
3453
3454 static int snd_hdsp_put_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3455 {
3456         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3457         int change;
3458         unsigned int val;
3459
3460         if (!snd_hdsp_use_is_exclusive(hdsp))
3461                 return -EBUSY;
3462         val = ucontrol->value.integer.value[0] & 1;
3463         spin_lock_irq(&hdsp->lock);
3464         change = (int)val != hdsp_rpm_bypass(hdsp);
3465         hdsp_set_rpm_bypass(hdsp, val);
3466         spin_unlock_irq(&hdsp->lock);
3467         return change;
3468 }
3469
3470
3471 static int snd_hdsp_info_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3472 {
3473         static char *texts[] = {"On", "Off"};
3474
3475         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3476         uinfo->count = 1;
3477         uinfo->value.enumerated.items = 2;
3478         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3479                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3480         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3481         return 0;
3482 }
3483
3484
3485 /* RPM Disconnect switch */
3486 static int hdsp_rpm_disconnect(struct hdsp *hdsp)
3487 {
3488         return (hdsp->control_register & HDSP_RPM_Disconnect) ? 1 : 0;
3489 }
3490
3491
3492 static int snd_hdsp_get_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3493 {
3494         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3495
3496         ucontrol->value.integer.value[0] = hdsp_rpm_disconnect(hdsp);
3497         return 0;
3498 }
3499
3500
3501 static int hdsp_set_rpm_disconnect(struct hdsp *hdsp, int on)
3502 {
3503         if (on)
3504                 hdsp->control_register |= HDSP_RPM_Disconnect;
3505         else
3506                 hdsp->control_register &= ~HDSP_RPM_Disconnect;
3507         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3508         return 0;
3509 }
3510
3511
3512 static int snd_hdsp_put_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3513 {
3514         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3515         int change;
3516         unsigned int val;
3517
3518         if (!snd_hdsp_use_is_exclusive(hdsp))
3519                 return -EBUSY;
3520         val = ucontrol->value.integer.value[0] & 1;
3521         spin_lock_irq(&hdsp->lock);
3522         change = (int)val != hdsp_rpm_disconnect(hdsp);
3523         hdsp_set_rpm_disconnect(hdsp, val);
3524         spin_unlock_irq(&hdsp->lock);
3525         return change;
3526 }
3527
3528 static int snd_hdsp_info_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3529 {
3530         static char *texts[] = {"On", "Off"};
3531
3532         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3533         uinfo->count = 1;
3534         uinfo->value.enumerated.items = 2;
3535         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3536                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3537         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3538         return 0;
3539 }
3540
3541 static struct snd_kcontrol_new snd_hdsp_rpm_controls[] = {
3542         {
3543                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3544                 .name = "RPM Bypass",
3545                 .get = snd_hdsp_get_rpm_bypass,
3546                 .put = snd_hdsp_put_rpm_bypass,
3547                 .info = snd_hdsp_info_rpm_bypass
3548         },
3549         {
3550                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3551                 .name = "RPM Disconnect",
3552                 .get = snd_hdsp_get_rpm_disconnect,
3553                 .put = snd_hdsp_put_rpm_disconnect,
3554                 .info = snd_hdsp_info_rpm_disconnect
3555         },
3556         {
3557                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3558                 .name = "Input 1/2",
3559                 .get = snd_hdsp_get_rpm_input12,
3560                 .put = snd_hdsp_put_rpm_input12,
3561                 .info = snd_hdsp_info_rpm_input
3562         },
3563         {
3564                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3565                 .name = "Input 3/4",
3566                 .get = snd_hdsp_get_rpm_input34,
3567                 .put = snd_hdsp_put_rpm_input34,
3568                 .info = snd_hdsp_info_rpm_input
3569         },
3570         HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3571         HDSP_MIXER("Mixer", 0)
3572 };
3573
3574 static struct snd_kcontrol_new snd_hdsp_96xx_aeb = HDSP_AEB("Analog Extension Board", 0);
3575 static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK;
3576
3577 static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp)
3578 {
3579         unsigned int idx;
3580         int err;
3581         struct snd_kcontrol *kctl;
3582
3583         if (hdsp->io_type == RPM) {
3584                 /* RPM Bypass, Disconnect and Input switches */
3585                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_rpm_controls); idx++) {
3586                         err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_rpm_controls[idx], hdsp));
3587                         if (err < 0)
3588                                 return err;
3589                 }
3590                 return 0;
3591         }
3592
3593         for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3594                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
3595                         return err;
3596                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
3597                         hdsp->spdif_ctl = kctl;
3598         }
3599
3600         /* ADAT SyncCheck status */
3601         snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
3602         snd_hdsp_adat_sync_check.index = 1;
3603         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3604                 return err;
3605         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
3606                 for (idx = 1; idx < 3; ++idx) {
3607                         snd_hdsp_adat_sync_check.index = idx+1;
3608                         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3609                                 return err;
3610                 }
3611         }
3612
3613         /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3614         if (hdsp->io_type == H9632) {
3615                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3616                         if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0)
3617                                 return err;
3618                 }
3619         }
3620
3621         /* AEB control for H96xx card */
3622         if (hdsp->io_type == H9632 || hdsp->io_type == H9652) {
3623                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0)
3624                                 return err;
3625         }
3626
3627         return 0;
3628 }
3629
3630 /*------------------------------------------------------------
3631    /proc interface
3632  ------------------------------------------------------------*/
3633
3634 static void
3635 snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
3636 {
3637         struct hdsp *hdsp = entry->private_data;
3638         unsigned int status;
3639         unsigned int status2;
3640         char *pref_sync_ref;
3641         char *autosync_ref;
3642         char *system_clock_mode;
3643         char *clock_source;
3644         int x;
3645
3646         status = hdsp_read(hdsp, HDSP_statusRegister);
3647         status2 = hdsp_read(hdsp, HDSP_status2Register);
3648
3649         snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name,
3650                     hdsp->card->number + 1);
3651         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
3652                     hdsp->capture_buffer, hdsp->playback_buffer);
3653         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3654                     hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase);
3655         snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3656         snd_iprintf(buffer, "Control2 register: 0x%x\n",
3657                     hdsp->control2_register);
3658         snd_iprintf(buffer, "Status register: 0x%x\n", status);
3659         snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3660
3661         if (hdsp_check_for_iobox(hdsp)) {
3662                 snd_iprintf(buffer, "No I/O box connected.\n"
3663                             "Please connect one and upload firmware.\n");
3664                 return;
3665         }
3666
3667         if (hdsp_check_for_firmware(hdsp, 0)) {
3668                 if (hdsp->state & HDSP_FirmwareCached) {
3669                         if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3670                                 snd_iprintf(buffer, "Firmware loading from "
3671                                             "cache failed, "
3672                                             "please upload manually.\n");
3673                                 return;
3674                         }
3675                 } else {
3676                         int err = -EINVAL;
3677 #ifdef HDSP_FW_LOADER
3678                         err = hdsp_request_fw_loader(hdsp);
3679 #endif
3680                         if (err < 0) {
3681                                 snd_iprintf(buffer,
3682                                             "No firmware loaded nor cached, "
3683                                             "please upload firmware.\n");
3684                                 return;
3685                         }
3686                 }
3687         }
3688
3689         snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3690         snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3691         snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3692         snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3693         snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3694         snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off");
3695
3696         snd_iprintf(buffer, "\n");
3697
3698         x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask));
3699
3700         snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes);
3701         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp));
3702         snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off");
3703         snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off");
3704
3705         snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2);
3706
3707         snd_iprintf(buffer, "\n");
3708
3709         switch (hdsp_clock_source(hdsp)) {
3710         case HDSP_CLOCK_SOURCE_AUTOSYNC:
3711                 clock_source = "AutoSync";
3712                 break;
3713         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
3714                 clock_source = "Internal 32 kHz";
3715                 break;
3716         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3717                 clock_source = "Internal 44.1 kHz";
3718                 break;
3719         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
3720                 clock_source = "Internal 48 kHz";
3721                 break;
3722         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
3723                 clock_source = "Internal 64 kHz";
3724                 break;
3725         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3726                 clock_source = "Internal 88.2 kHz";
3727                 break;
3728         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
3729                 clock_source = "Internal 96 kHz";
3730                 break;
3731         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
3732                 clock_source = "Internal 128 kHz";
3733                 break;
3734         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3735                 clock_source = "Internal 176.4 kHz";
3736                 break;
3737                 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
3738                 clock_source = "Internal 192 kHz";
3739                 break;
3740         default:
3741                 clock_source = "Error";
3742         }
3743         snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
3744
3745         if (hdsp_system_clock_mode(hdsp))
3746                 system_clock_mode = "Slave";
3747         else
3748                 system_clock_mode = "Master";
3749
3750         switch (hdsp_pref_sync_ref (hdsp)) {
3751         case HDSP_SYNC_FROM_WORD:
3752                 pref_sync_ref = "Word Clock";
3753                 break;
3754         case HDSP_SYNC_FROM_ADAT_SYNC:
3755                 pref_sync_ref = "ADAT Sync";
3756                 break;
3757         case HDSP_SYNC_FROM_SPDIF:
3758                 pref_sync_ref = "SPDIF";
3759                 break;
3760         case HDSP_SYNC_FROM_ADAT1:
3761                 pref_sync_ref = "ADAT1";
3762                 break;
3763         case HDSP_SYNC_FROM_ADAT2:
3764                 pref_sync_ref = "ADAT2";
3765                 break;
3766         case HDSP_SYNC_FROM_ADAT3:
3767                 pref_sync_ref = "ADAT3";
3768                 break;
3769         default:
3770                 pref_sync_ref = "Word Clock";
3771                 break;
3772         }
3773         snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
3774
3775         switch (hdsp_autosync_ref (hdsp)) {
3776         case HDSP_AUTOSYNC_FROM_WORD:
3777                 autosync_ref = "Word Clock";
3778                 break;
3779         case HDSP_AUTOSYNC_FROM_ADAT_SYNC:
3780                 autosync_ref = "ADAT Sync";
3781                 break;
3782         case HDSP_AUTOSYNC_FROM_SPDIF:
3783                 autosync_ref = "SPDIF";
3784                 break;
3785         case HDSP_AUTOSYNC_FROM_NONE:
3786                 autosync_ref = "None";
3787                 break;
3788         case HDSP_AUTOSYNC_FROM_ADAT1:
3789                 autosync_ref = "ADAT1";
3790                 break;
3791         case HDSP_AUTOSYNC_FROM_ADAT2:
3792                 autosync_ref = "ADAT2";
3793                 break;
3794         case HDSP_AUTOSYNC_FROM_ADAT3:
3795                 autosync_ref = "ADAT3";
3796                 break;
3797         default:
3798                 autosync_ref = "---";
3799                 break;
3800         }
3801         snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
3802
3803         snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
3804
3805         snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
3806
3807         snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
3808         snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
3809
3810         snd_iprintf(buffer, "\n");
3811
3812         if (hdsp->io_type != RPM) {
3813                 switch (hdsp_spdif_in(hdsp)) {
3814                 case HDSP_SPDIFIN_OPTICAL:
3815                         snd_iprintf(buffer, "IEC958 input: Optical\n");
3816                         break;
3817                 case HDSP_SPDIFIN_COAXIAL:
3818                         snd_iprintf(buffer, "IEC958 input: Coaxial\n");
3819                         break;
3820                 case HDSP_SPDIFIN_INTERNAL:
3821                         snd_iprintf(buffer, "IEC958 input: Internal\n");
3822                         break;
3823                 case HDSP_SPDIFIN_AES:
3824                         snd_iprintf(buffer, "IEC958 input: AES\n");
3825                         break;
3826                 default:
3827                         snd_iprintf(buffer, "IEC958 input: ???\n");
3828                         break;
3829                 }
3830         }
3831
3832         if (RPM == hdsp->io_type) {
3833                 if (hdsp->control_register & HDSP_RPM_Bypass)
3834                         snd_iprintf(buffer, "RPM Bypass: disabled\n");
3835                 else
3836                         snd_iprintf(buffer, "RPM Bypass: enabled\n");
3837                 if (hdsp->control_register & HDSP_RPM_Disconnect)
3838                         snd_iprintf(buffer, "RPM disconnected\n");
3839                 else
3840                         snd_iprintf(buffer, "RPM connected\n");
3841
3842                 switch (hdsp->control_register & HDSP_RPM_Inp12) {
3843                 case HDSP_RPM_Inp12_Phon_6dB:
3844                         snd_iprintf(buffer, "Input 1/2: Phono, 6dB\n");
3845                         break;
3846                 case HDSP_RPM_Inp12_Phon_0dB:
3847                         snd_iprintf(buffer, "Input 1/2: Phono, 0dB\n");
3848                         break;
3849                 case HDSP_RPM_Inp12_Phon_n6dB:
3850                         snd_iprintf(buffer, "Input 1/2: Phono, -6dB\n");
3851                         break;
3852                 case HDSP_RPM_Inp12_Line_0dB:
3853                         snd_iprintf(buffer, "Input 1/2: Line, 0dB\n");
3854                         break;
3855                 case HDSP_RPM_Inp12_Line_n6dB:
3856                         snd_iprintf(buffer, "Input 1/2: Line, -6dB\n");
3857                         break;
3858                 default:
3859                         snd_iprintf(buffer, "Input 1/2: ???\n");
3860                 }
3861
3862                 switch (hdsp->control_register & HDSP_RPM_Inp34) {
3863                 case HDSP_RPM_Inp34_Phon_6dB:
3864                         snd_iprintf(buffer, "Input 3/4: Phono, 6dB\n");
3865                         break;
3866                 case HDSP_RPM_Inp34_Phon_0dB:
3867                         snd_iprintf(buffer, "Input 3/4: Phono, 0dB\n");
3868                         break;
3869                 case HDSP_RPM_Inp34_Phon_n6dB:
3870                         snd_iprintf(buffer, "Input 3/4: Phono, -6dB\n");
3871                         break;
3872                 case HDSP_RPM_Inp34_Line_0dB:
3873                         snd_iprintf(buffer, "Input 3/4: Line, 0dB\n");
3874                         break;
3875                 case HDSP_RPM_Inp34_Line_n6dB:
3876                         snd_iprintf(buffer, "Input 3/4: Line, -6dB\n");
3877                         break;
3878                 default:
3879                         snd_iprintf(buffer, "Input 3/4: ???\n");
3880                 }
3881
3882         } else {
3883                 if (hdsp->control_register & HDSP_SPDIFOpticalOut)
3884                         snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
3885                 else
3886                         snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
3887
3888                 if (hdsp->control_register & HDSP_SPDIFProfessional)
3889                         snd_iprintf(buffer, "IEC958 quality: Professional\n");
3890                 else
3891                         snd_iprintf(buffer, "IEC958 quality: Consumer\n");
3892
3893                 if (hdsp->control_register & HDSP_SPDIFEmphasis)
3894                         snd_iprintf(buffer, "IEC958 emphasis: on\n");
3895                 else
3896                         snd_iprintf(buffer, "IEC958 emphasis: off\n");
3897
3898                 if (hdsp->control_register & HDSP_SPDIFNonAudio)
3899                         snd_iprintf(buffer, "IEC958 NonAudio: on\n");
3900                 else
3901                         snd_iprintf(buffer, "IEC958 NonAudio: off\n");
3902                 x = hdsp_spdif_sample_rate(hdsp);
3903                 if (x != 0)
3904                         snd_iprintf(buffer, "IEC958 sample rate: %d\n", x);
3905                 else
3906                         snd_iprintf(buffer, "IEC958 sample rate: Error flag set\n");
3907         }
3908         snd_iprintf(buffer, "\n");
3909
3910         /* Sync Check */
3911         x = status & HDSP_Sync0;
3912         if (status & HDSP_Lock0)
3913                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
3914         else
3915                 snd_iprintf(buffer, "ADAT1: No Lock\n");
3916
3917         switch (hdsp->io_type) {
3918         case Digiface:
3919         case H9652:
3920                 x = status & HDSP_Sync1;
3921                 if (status & HDSP_Lock1)
3922                         snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
3923                 else
3924                         snd_iprintf(buffer, "ADAT2: No Lock\n");
3925                 x = status & HDSP_Sync2;
3926                 if (status & HDSP_Lock2)
3927                         snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
3928                 else
3929                         snd_iprintf(buffer, "ADAT3: No Lock\n");
3930                 break;
3931         default:
3932                 /* relax */
3933                 break;
3934         }
3935
3936         x = status & HDSP_SPDIFSync;
3937         if (status & HDSP_SPDIFErrorFlag)
3938                 snd_iprintf (buffer, "SPDIF: No Lock\n");
3939         else
3940                 snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
3941
3942         x = status2 & HDSP_wc_sync;
3943         if (status2 & HDSP_wc_lock)
3944                 snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
3945         else
3946                 snd_iprintf (buffer, "Word Clock: No Lock\n");
3947
3948         x = status & HDSP_TimecodeSync;
3949         if (status & HDSP_TimecodeLock)
3950                 snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
3951         else
3952                 snd_iprintf(buffer, "ADAT Sync: No Lock\n");
3953
3954         snd_iprintf(buffer, "\n");
3955
3956         /* Informations about H9632 specific controls */
3957         if (hdsp->io_type == H9632) {
3958                 char *tmp;
3959
3960                 switch (hdsp_ad_gain(hdsp)) {
3961                 case 0:
3962                         tmp = "-10 dBV";
3963                         break;
3964                 case 1:
3965                         tmp = "+4 dBu";
3966                         break;
3967                 default:
3968                         tmp = "Lo Gain";
3969                         break;
3970                 }
3971                 snd_iprintf(buffer, "AD Gain : %s\n", tmp);
3972
3973                 switch (hdsp_da_gain(hdsp)) {
3974                 case 0:
3975                         tmp = "Hi Gain";
3976                         break;
3977                 case 1:
3978                         tmp = "+4 dBu";
3979                         break;
3980                 default:
3981                         tmp = "-10 dBV";
3982                         break;
3983                 }
3984                 snd_iprintf(buffer, "DA Gain : %s\n", tmp);
3985
3986                 switch (hdsp_phone_gain(hdsp)) {
3987                 case 0:
3988                         tmp = "0 dB";
3989                         break;
3990                 case 1:
3991                         tmp = "-6 dB";
3992                         break;
3993                 default:
3994                         tmp = "-12 dB";
3995                         break;
3996                 }
3997                 snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
3998
3999                 snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
4000
4001                 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
4002                         snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
4003                 else
4004                         snd_iprintf(buffer, "AEB : off (ADAT1 external)\n");
4005                 snd_iprintf(buffer, "\n");
4006         }
4007
4008 }
4009
4010 static void snd_hdsp_proc_init(struct hdsp *hdsp)
4011 {
4012         struct snd_info_entry *entry;
4013
4014         if (! snd_card_proc_new(hdsp->card, "hdsp", &entry))
4015                 snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read);
4016 }
4017
4018 static void snd_hdsp_free_buffers(struct hdsp *hdsp)
4019 {
4020         snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci);
4021         snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci);
4022 }
4023
4024 static int __devinit snd_hdsp_initialize_memory(struct hdsp *hdsp)
4025 {
4026         unsigned long pb_bus, cb_bus;
4027
4028         if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 ||
4029             snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) {
4030                 if (hdsp->capture_dma_buf.area)
4031                         snd_dma_free_pages(&hdsp->capture_dma_buf);
4032                 printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
4033                 return -ENOMEM;
4034         }
4035
4036         /* Align to bus-space 64K boundary */
4037
4038         cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul);
4039         pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul);
4040
4041         /* Tell the card where it is */
4042
4043         hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus);
4044         hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus);
4045
4046         hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr);
4047         hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr);
4048
4049         return 0;
4050 }
4051
4052 static int snd_hdsp_set_defaults(struct hdsp *hdsp)
4053 {
4054         unsigned int i;
4055
4056         /* ASSUMPTION: hdsp->lock is either held, or
4057            there is no need to hold it (e.g. during module
4058            initialization).
4059          */
4060
4061         /* set defaults:
4062
4063            SPDIF Input via Coax
4064            Master clock mode
4065            maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
4066                             which implies 2 4096 sample, 32Kbyte periods).
4067            Enable line out.
4068          */
4069
4070         hdsp->control_register = HDSP_ClockModeMaster |
4071                                  HDSP_SPDIFInputCoaxial |
4072                                  hdsp_encode_latency(7) |
4073                                  HDSP_LineOut;
4074
4075
4076         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4077
4078 #ifdef SNDRV_BIG_ENDIAN
4079         hdsp->control2_register = HDSP_BIGENDIAN_MODE;
4080 #else
4081         hdsp->control2_register = 0;
4082 #endif
4083         if (hdsp->io_type == H9652)
4084                 snd_hdsp_9652_enable_mixer (hdsp);
4085         else
4086                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
4087
4088         hdsp_reset_hw_pointer(hdsp);
4089         hdsp_compute_period_size(hdsp);
4090
4091         /* silence everything */
4092
4093         for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
4094                 hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
4095
4096         for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
4097                 if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
4098                         return -EIO;
4099         }
4100
4101         /* H9632 specific defaults */
4102         if (hdsp->io_type == H9632) {
4103                 hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
4104                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4105         }
4106
4107         /* set a default rate so that the channel map is set up.
4108          */
4109
4110         hdsp_set_rate(hdsp, 48000, 1);
4111
4112         return 0;
4113 }
4114
4115 static void hdsp_midi_tasklet(unsigned long arg)
4116 {
4117         struct hdsp *hdsp = (struct hdsp *)arg;
4118
4119         if (hdsp->midi[0].pending)
4120                 snd_hdsp_midi_input_read (&hdsp->midi[0]);
4121         if (hdsp->midi[1].pending)
4122                 snd_hdsp_midi_input_read (&hdsp->midi[1]);
4123 }
4124
4125 static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
4126 {
4127         struct hdsp *hdsp = (struct hdsp *) dev_id;
4128         unsigned int status;
4129         int audio;
4130         int midi0;
4131         int midi1;
4132         unsigned int midi0status;
4133         unsigned int midi1status;
4134         int schedule = 0;
4135
4136         status = hdsp_read(hdsp, HDSP_statusRegister);
4137
4138         audio = status & HDSP_audioIRQPending;
4139         midi0 = status & HDSP_midi0IRQPending;
4140         midi1 = status & HDSP_midi1IRQPending;
4141
4142         if (!audio && !midi0 && !midi1)
4143                 return IRQ_NONE;
4144
4145         hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
4146
4147         midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
4148         midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
4149
4150         if (!(hdsp->state & HDSP_InitializationComplete))
4151                 return IRQ_HANDLED;
4152
4153         if (audio) {
4154                 if (hdsp->capture_substream)
4155                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
4156
4157                 if (hdsp->playback_substream)
4158                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
4159         }
4160
4161         if (midi0 && midi0status) {
4162                 if (hdsp->use_midi_tasklet) {
4163                         /* we disable interrupts for this input until processing is done */
4164                         hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
4165                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4166                         hdsp->midi[0].pending = 1;
4167                         schedule = 1;
4168                 } else {
4169                         snd_hdsp_midi_input_read (&hdsp->midi[0]);
4170                 }
4171         }
4172         if (hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632 && midi1 && midi1status) {
4173                 if (hdsp->use_midi_tasklet) {
4174                         /* we disable interrupts for this input until processing is done */
4175                         hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
4176                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4177                         hdsp->midi[1].pending = 1;
4178                         schedule = 1;
4179                 } else {
4180                         snd_hdsp_midi_input_read (&hdsp->midi[1]);
4181                 }
4182         }
4183         if (hdsp->use_midi_tasklet && schedule)
4184                 tasklet_schedule(&hdsp->midi_tasklet);
4185         return IRQ_HANDLED;
4186 }
4187
4188 static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream)
4189 {
4190         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4191         return hdsp_hw_pointer(hdsp);
4192 }
4193
4194 static char *hdsp_channel_buffer_location(struct hdsp *hdsp,
4195                                              int stream,
4196                                              int channel)
4197
4198 {
4199         int mapped_channel;
4200
4201         if (snd_BUG_ON(channel < 0 || channel >= hdsp->max_channels))
4202                 return NULL;
4203
4204         if ((mapped_channel = hdsp->channel_map[channel]) < 0)
4205                 return NULL;
4206
4207         if (stream == SNDRV_PCM_STREAM_CAPTURE)
4208                 return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
4209         else
4210                 return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
4211 }
4212
4213 static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel,
4214                                   snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
4215 {
4216         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4217         char *channel_buf;
4218
4219         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
4220                 return -EINVAL;
4221
4222         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4223         if (snd_BUG_ON(!channel_buf))
4224                 return -EIO;
4225         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
4226                 return -EFAULT;
4227         return count;
4228 }
4229
4230 static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel,
4231                                  snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
4232 {
4233         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4234         char *channel_buf;
4235
4236         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
4237                 return -EINVAL;
4238
4239         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4240         if (snd_BUG_ON(!channel_buf))
4241                 return -EIO;
4242         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
4243                 return -EFAULT;
4244         return count;
4245 }
4246
4247 static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel,
4248                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
4249 {
4250         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4251         char *channel_buf;
4252
4253         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4254         if (snd_BUG_ON(!channel_buf))
4255                 return -EIO;
4256         memset(channel_buf + pos * 4, 0, count * 4);
4257         return count;
4258 }
4259
4260 static int snd_hdsp_reset(struct snd_pcm_substream *substream)
4261 {
4262         struct snd_pcm_runtime *runtime = substream->runtime;
4263         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4264         struct snd_pcm_substream *other;
4265         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4266                 other = hdsp->capture_substream;
4267         else
4268                 other = hdsp->playback_substream;
4269         if (hdsp->running)
4270                 runtime->status->hw_ptr = hdsp_hw_pointer(hdsp);
4271         else
4272                 runtime->status->hw_ptr = 0;
4273         if (other) {
4274                 struct snd_pcm_substream *s;
4275                 struct snd_pcm_runtime *oruntime = other->runtime;
4276                 snd_pcm_group_for_each_entry(s, substream) {
4277                         if (s == other) {
4278                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
4279                                 break;
4280                         }
4281                 }
4282         }
4283         return 0;
4284 }
4285
4286 static int snd_hdsp_hw_params(struct snd_pcm_substream *substream,
4287                                  struct snd_pcm_hw_params *params)
4288 {
4289         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4290         int err;
4291         pid_t this_pid;
4292         pid_t other_pid;
4293
4294         if (hdsp_check_for_iobox (hdsp))
4295                 return -EIO;
4296
4297         if (hdsp_check_for_firmware(hdsp, 1))
4298                 return -EIO;
4299
4300         spin_lock_irq(&hdsp->lock);
4301
4302         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4303                 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
4304                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
4305                 this_pid = hdsp->playback_pid;
4306                 other_pid = hdsp->capture_pid;
4307         } else {
4308                 this_pid = hdsp->capture_pid;
4309                 other_pid = hdsp->playback_pid;
4310         }
4311
4312         if ((other_pid > 0) && (this_pid != other_pid)) {
4313
4314                 /* The other stream is open, and not by the same
4315                    task as this one. Make sure that the parameters
4316                    that matter are the same.
4317                  */
4318
4319                 if (params_rate(params) != hdsp->system_sample_rate) {
4320                         spin_unlock_irq(&hdsp->lock);
4321                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
4322                         return -EBUSY;
4323                 }
4324
4325                 if (params_period_size(params) != hdsp->period_bytes / 4) {
4326                         spin_unlock_irq(&hdsp->lock);
4327                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
4328                         return -EBUSY;
4329                 }
4330
4331                 /* We're fine. */
4332
4333                 spin_unlock_irq(&hdsp->lock);
4334                 return 0;
4335
4336         } else {
4337                 spin_unlock_irq(&hdsp->lock);
4338         }
4339
4340         /* how to make sure that the rate matches an externally-set one ?
4341          */
4342
4343         spin_lock_irq(&hdsp->lock);
4344         if (! hdsp->clock_source_locked) {
4345                 if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
4346                         spin_unlock_irq(&hdsp->lock);
4347                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
4348                         return err;
4349                 }
4350         }
4351         spin_unlock_irq(&hdsp->lock);
4352
4353         if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
4354                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
4355                 return err;
4356         }
4357
4358         return 0;
4359 }
4360
4361 static int snd_hdsp_channel_info(struct snd_pcm_substream *substream,
4362                                     struct snd_pcm_channel_info *info)
4363 {
4364         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4365         int mapped_channel;
4366
4367         if (snd_BUG_ON(info->channel >= hdsp->max_channels))
4368                 return -EINVAL;
4369
4370         if ((mapped_channel = hdsp->channel_map[info->channel]) < 0)
4371                 return -EINVAL;
4372
4373         info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES;
4374         info->first = 0;
4375         info->step = 32;
4376         return 0;
4377 }
4378
4379 static int snd_hdsp_ioctl(struct snd_pcm_substream *substream,
4380                              unsigned int cmd, void *arg)
4381 {
4382         switch (cmd) {
4383         case SNDRV_PCM_IOCTL1_RESET:
4384                 return snd_hdsp_reset(substream);
4385         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
4386                 return snd_hdsp_channel_info(substream, arg);
4387         default:
4388                 break;
4389         }
4390
4391         return snd_pcm_lib_ioctl(substream, cmd, arg);
4392 }
4393
4394 static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd)
4395 {
4396         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4397         struct snd_pcm_substream *other;
4398         int running;
4399
4400         if (hdsp_check_for_iobox (hdsp))
4401                 return -EIO;
4402
4403         if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
4404                 return -EIO;
4405
4406         spin_lock(&hdsp->lock);
4407         running = hdsp->running;
4408         switch (cmd) {
4409         case SNDRV_PCM_TRIGGER_START:
4410                 running |= 1 << substream->stream;
4411                 break;
4412         case SNDRV_PCM_TRIGGER_STOP:
4413                 running &= ~(1 << substream->stream);
4414                 break;
4415         default:
4416                 snd_BUG();
4417                 spin_unlock(&hdsp->lock);
4418                 return -EINVAL;
4419         }
4420         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4421                 other = hdsp->capture_substream;
4422         else
4423                 other = hdsp->playback_substream;
4424
4425         if (other) {
4426                 struct snd_pcm_substream *s;
4427                 snd_pcm_group_for_each_entry(s, substream) {
4428                         if (s == other) {
4429                                 snd_pcm_trigger_done(s, substream);
4430                                 if (cmd == SNDRV_PCM_TRIGGER_START)
4431                                         running |= 1 << s->stream;
4432                                 else
4433                                         running &= ~(1 << s->stream);
4434                                 goto _ok;
4435                         }
4436                 }
4437                 if (cmd == SNDRV_PCM_TRIGGER_START) {
4438                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
4439                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4440                                 hdsp_silence_playback(hdsp);
4441                 } else {
4442                         if (running &&
4443                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4444                                 hdsp_silence_playback(hdsp);
4445                 }
4446         } else {
4447                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4448                                 hdsp_silence_playback(hdsp);
4449         }
4450  _ok:
4451         snd_pcm_trigger_done(substream, substream);
4452         if (!hdsp->running && running)
4453                 hdsp_start_audio(hdsp);
4454         else if (hdsp->running && !running)
4455                 hdsp_stop_audio(hdsp);
4456         hdsp->running = running;
4457         spin_unlock(&hdsp->lock);
4458
4459         return 0;
4460 }
4461
4462 static int snd_hdsp_prepare(struct snd_pcm_substream *substream)
4463 {
4464         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4465         int result = 0;
4466
4467         if (hdsp_check_for_iobox (hdsp))
4468                 return -EIO;
4469
4470         if (hdsp_check_for_firmware(hdsp, 1))
4471                 return -EIO;
4472
4473         spin_lock_irq(&hdsp->lock);
4474         if (!hdsp->running)
4475                 hdsp_reset_hw_pointer(hdsp);
4476         spin_unlock_irq(&hdsp->lock);
4477         return result;
4478 }
4479
4480 static struct snd_pcm_hardware snd_hdsp_playback_subinfo =
4481 {
4482         .info =                 (SNDRV_PCM_INFO_MMAP |
4483                                  SNDRV_PCM_INFO_MMAP_VALID |
4484                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4485                                  SNDRV_PCM_INFO_SYNC_START |
4486                                  SNDRV_PCM_INFO_DOUBLE),
4487 #ifdef SNDRV_BIG_ENDIAN
4488         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4489 #else
4490         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4491 #endif
4492         .rates =                (SNDRV_PCM_RATE_32000 |
4493                                  SNDRV_PCM_RATE_44100 |
4494                                  SNDRV_PCM_RATE_48000 |
4495                                  SNDRV_PCM_RATE_64000 |
4496                                  SNDRV_PCM_RATE_88200 |
4497                                  SNDRV_PCM_RATE_96000),
4498         .rate_min =             32000,
4499         .rate_max =             96000,
4500         .channels_min =         6,
4501         .channels_max =         HDSP_MAX_CHANNELS,
4502         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4503         .period_bytes_min =     (64 * 4) * 10,
4504         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4505         .periods_min =          2,
4506         .periods_max =          2,
4507         .fifo_size =            0
4508 };
4509
4510 static struct snd_pcm_hardware snd_hdsp_capture_subinfo =
4511 {
4512         .info =                 (SNDRV_PCM_INFO_MMAP |
4513                                  SNDRV_PCM_INFO_MMAP_VALID |
4514                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4515                                  SNDRV_PCM_INFO_SYNC_START),
4516 #ifdef SNDRV_BIG_ENDIAN
4517         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4518 #else
4519         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4520 #endif
4521         .rates =                (SNDRV_PCM_RATE_32000 |
4522                                  SNDRV_PCM_RATE_44100 |
4523                                  SNDRV_PCM_RATE_48000 |
4524                                  SNDRV_PCM_RATE_64000 |
4525                                  SNDRV_PCM_RATE_88200 |
4526                                  SNDRV_PCM_RATE_96000),
4527         .rate_min =             32000,
4528         .rate_max =             96000,
4529         .channels_min =         5,
4530         .channels_max =         HDSP_MAX_CHANNELS,
4531         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4532         .period_bytes_min =     (64 * 4) * 10,
4533         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4534         .periods_min =          2,
4535         .periods_max =          2,
4536         .fifo_size =            0
4537 };
4538
4539 static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4540
4541 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = {
4542         .count = ARRAY_SIZE(hdsp_period_sizes),
4543         .list = hdsp_period_sizes,
4544         .mask = 0
4545 };
4546
4547 static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4548
4549 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = {
4550         .count = ARRAY_SIZE(hdsp_9632_sample_rates),
4551         .list = hdsp_9632_sample_rates,
4552         .mask = 0
4553 };
4554
4555 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params,
4556                                         struct snd_pcm_hw_rule *rule)
4557 {
4558         struct hdsp *hdsp = rule->private;
4559         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4560         if (hdsp->io_type == H9632) {
4561                 unsigned int list[3];
4562                 list[0] = hdsp->qs_in_channels;
4563                 list[1] = hdsp->ds_in_channels;
4564                 list[2] = hdsp->ss_in_channels;
4565                 return snd_interval_list(c, 3, list, 0);
4566         } else {
4567                 unsigned int list[2];
4568                 list[0] = hdsp->ds_in_channels;
4569                 list[1] = hdsp->ss_in_channels;
4570                 return snd_interval_list(c, 2, list, 0);
4571         }
4572 }
4573
4574 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params,
4575                                         struct snd_pcm_hw_rule *rule)
4576 {
4577         unsigned int list[3];
4578         struct hdsp *hdsp = rule->private;
4579         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4580         if (hdsp->io_type == H9632) {
4581                 list[0] = hdsp->qs_out_channels;
4582                 list[1] = hdsp->ds_out_channels;
4583                 list[2] = hdsp->ss_out_channels;
4584                 return snd_interval_list(c, 3, list, 0);
4585         } else {
4586                 list[0] = hdsp->ds_out_channels;
4587                 list[1] = hdsp->ss_out_channels;
4588         }
4589         return snd_interval_list(c, 2, list, 0);
4590 }
4591
4592 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
4593                                              struct snd_pcm_hw_rule *rule)
4594 {
4595         struct hdsp *hdsp = rule->private;
4596         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4597         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4598         if (r->min > 96000 && hdsp->io_type == H9632) {
4599                 struct snd_interval t = {
4600                         .min = hdsp->qs_in_channels,
4601                         .max = hdsp->qs_in_channels,
4602                         .integer = 1,
4603                 };
4604                 return snd_interval_refine(c, &t);
4605         } else if (r->min > 48000 && r->max <= 96000) {
4606                 struct snd_interval t = {
4607                         .min = hdsp->ds_in_channels,
4608                         .max = hdsp->ds_in_channels,
4609                         .integer = 1,
4610                 };
4611                 return snd_interval_refine(c, &t);
4612         } else if (r->max < 64000) {
4613                 struct snd_interval t = {
4614                         .min = hdsp->ss_in_channels,
4615                         .max = hdsp->ss_in_channels,
4616                         .integer = 1,
4617                 };
4618                 return snd_interval_refine(c, &t);
4619         }
4620         return 0;
4621 }
4622
4623 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
4624                                              struct snd_pcm_hw_rule *rule)
4625 {
4626         struct hdsp *hdsp = rule->private;
4627         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4628         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4629         if (r->min > 96000 && hdsp->io_type == H9632) {
4630                 struct snd_interval t = {
4631                         .min = hdsp->qs_out_channels,
4632                         .max = hdsp->qs_out_channels,
4633                         .integer = 1,
4634                 };
4635                 return snd_interval_refine(c, &t);
4636         } else if (r->min > 48000 && r->max <= 96000) {
4637                 struct snd_interval t = {
4638                         .min = hdsp->ds_out_channels,
4639                         .max = hdsp->ds_out_channels,
4640                         .integer = 1,
4641                 };
4642                 return snd_interval_refine(c, &t);
4643         } else if (r->max < 64000) {
4644                 struct snd_interval t = {
4645                         .min = hdsp->ss_out_channels,
4646                         .max = hdsp->ss_out_channels,
4647                         .integer = 1,
4648                 };
4649                 return snd_interval_refine(c, &t);
4650         }
4651         return 0;
4652 }
4653
4654 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
4655                                              struct snd_pcm_hw_rule *rule)
4656 {
4657         struct hdsp *hdsp = rule->private;
4658         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4659         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4660         if (c->min >= hdsp->ss_out_channels) {
4661                 struct snd_interval t = {
4662                         .min = 32000,
4663                         .max = 48000,
4664                         .integer = 1,
4665                 };
4666                 return snd_interval_refine(r, &t);
4667         } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) {
4668                 struct snd_interval t = {
4669                         .min = 128000,
4670                         .max = 192000,
4671                         .integer = 1,
4672                 };
4673                 return snd_interval_refine(r, &t);
4674         } else if (c->max <= hdsp->ds_out_channels) {
4675                 struct snd_interval t = {
4676                         .min = 64000,
4677                         .max = 96000,
4678                         .integer = 1,
4679                 };
4680                 return snd_interval_refine(r, &t);
4681         }
4682         return 0;
4683 }
4684
4685 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
4686                                              struct snd_pcm_hw_rule *rule)
4687 {
4688         struct hdsp *hdsp = rule->private;
4689         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4690         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4691         if (c->min >= hdsp->ss_in_channels) {
4692                 struct snd_interval t = {
4693                         .min = 32000,
4694                         .max = 48000,
4695                         .integer = 1,
4696                 };
4697                 return snd_interval_refine(r, &t);
4698         } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) {
4699                 struct snd_interval t = {
4700                         .min = 128000,
4701                         .max = 192000,
4702                         .integer = 1,
4703                 };
4704                 return snd_interval_refine(r, &t);
4705         } else if (c->max <= hdsp->ds_in_channels) {
4706                 struct snd_interval t = {
4707                         .min = 64000,
4708                         .max = 96000,
4709                         .integer = 1,
4710                 };
4711                 return snd_interval_refine(r, &t);
4712         }
4713         return 0;
4714 }
4715
4716 static int snd_hdsp_playback_open(struct snd_pcm_substream *substream)
4717 {
4718         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4719         struct snd_pcm_runtime *runtime = substream->runtime;
4720
4721         if (hdsp_check_for_iobox (hdsp))
4722                 return -EIO;
4723
4724         if (hdsp_check_for_firmware(hdsp, 1))
4725                 return -EIO;
4726
4727         spin_lock_irq(&hdsp->lock);
4728
4729         snd_pcm_set_sync(substream);
4730
4731         runtime->hw = snd_hdsp_playback_subinfo;
4732         runtime->dma_area = hdsp->playback_buffer;
4733         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4734
4735         hdsp->playback_pid = current->pid;
4736         hdsp->playback_substream = substream;
4737
4738         spin_unlock_irq(&hdsp->lock);
4739
4740         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4741         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4742         if (hdsp->clock_source_locked) {
4743                 runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate;
4744         } else if (hdsp->io_type == H9632) {
4745                 runtime->hw.rate_max = 192000;
4746                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4747                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4748         }
4749         if (hdsp->io_type == H9632) {
4750                 runtime->hw.channels_min = hdsp->qs_out_channels;
4751                 runtime->hw.channels_max = hdsp->ss_out_channels;
4752         }
4753
4754         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4755                              snd_hdsp_hw_rule_out_channels, hdsp,
4756                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4757         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4758                              snd_hdsp_hw_rule_out_channels_rate, hdsp,
4759                              SNDRV_PCM_HW_PARAM_RATE, -1);
4760         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4761                              snd_hdsp_hw_rule_rate_out_channels, hdsp,
4762                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4763
4764         if (RPM != hdsp->io_type) {
4765                 hdsp->creg_spdif_stream = hdsp->creg_spdif;
4766                 hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4767                 snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4768                         SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4769         }
4770         return 0;
4771 }
4772
4773 static int snd_hdsp_playback_release(struct snd_pcm_substream *substream)
4774 {
4775         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4776
4777         spin_lock_irq(&hdsp->lock);
4778
4779         hdsp->playback_pid = -1;
4780         hdsp->playback_substream = NULL;
4781
4782         spin_unlock_irq(&hdsp->lock);
4783
4784         if (RPM != hdsp->io_type) {
4785                 hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4786                 snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4787                         SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4788         }
4789         return 0;
4790 }
4791
4792
4793 static int snd_hdsp_capture_open(struct snd_pcm_substream *substream)
4794 {
4795         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4796         struct snd_pcm_runtime *runtime = substream->runtime;
4797
4798         if (hdsp_check_for_iobox (hdsp))
4799                 return -EIO;
4800
4801         if (hdsp_check_for_firmware(hdsp, 1))
4802                 return -EIO;
4803
4804         spin_lock_irq(&hdsp->lock);
4805
4806         snd_pcm_set_sync(substream);
4807
4808         runtime->hw = snd_hdsp_capture_subinfo;
4809         runtime->dma_area = hdsp->capture_buffer;
4810         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4811
4812         hdsp->capture_pid = current->pid;
4813         hdsp->capture_substream = substream;
4814
4815         spin_unlock_irq(&hdsp->lock);
4816
4817         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4818         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4819         if (hdsp->io_type == H9632) {
4820                 runtime->hw.channels_min = hdsp->qs_in_channels;
4821                 runtime->hw.channels_max = hdsp->ss_in_channels;
4822                 runtime->hw.rate_max = 192000;
4823                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4824                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4825         }
4826         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4827                              snd_hdsp_hw_rule_in_channels, hdsp,
4828                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4829         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4830                              snd_hdsp_hw_rule_in_channels_rate, hdsp,
4831                              SNDRV_PCM_HW_PARAM_RATE, -1);
4832         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4833                              snd_hdsp_hw_rule_rate_in_channels, hdsp,
4834                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4835         return 0;
4836 }
4837
4838 static int snd_hdsp_capture_release(struct snd_pcm_substream *substream)
4839 {
4840         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4841
4842         spin_lock_irq(&hdsp->lock);
4843
4844         hdsp->capture_pid = -1;
4845         hdsp->capture_substream = NULL;
4846
4847         spin_unlock_irq(&hdsp->lock);
4848         return 0;
4849 }
4850
4851 /* helper functions for copying meter values */
4852 static inline int copy_u32_le(void __user *dest, void __iomem *src)
4853 {
4854         u32 val = readl(src);
4855         return copy_to_user(dest, &val, 4);
4856 }
4857
4858 static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4859 {
4860         u32 rms_low, rms_high;
4861         u64 rms;
4862         rms_low = readl(src_low);
4863         rms_high = readl(src_high);
4864         rms = ((u64)rms_high << 32) | rms_low;
4865         return copy_to_user(dest, &rms, 8);
4866 }
4867
4868 static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4869 {
4870         u32 rms_low, rms_high;
4871         u64 rms;
4872         rms_low = readl(src_low) & 0xffffff00;
4873         rms_high = readl(src_high) & 0xffffff00;
4874         rms = ((u64)rms_high << 32) | rms_low;
4875         return copy_to_user(dest, &rms, 8);
4876 }
4877
4878 static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4879 {
4880         int doublespeed = 0;
4881         int i, j, channels, ofs;
4882
4883         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4884                 doublespeed = 1;
4885         channels = doublespeed ? 14 : 26;
4886         for (i = 0, j = 0; i < 26; ++i) {
4887                 if (doublespeed && (i & 4))
4888                         continue;
4889                 ofs = HDSP_9652_peakBase - j * 4;
4890                 if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs))
4891                         return -EFAULT;
4892                 ofs -= channels * 4;
4893                 if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs))
4894                         return -EFAULT;
4895                 ofs -= channels * 4;
4896                 if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs))
4897                         return -EFAULT;
4898                 ofs = HDSP_9652_rmsBase + j * 8;
4899                 if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs,
4900                                 hdsp->iobase + ofs + 4))
4901                         return -EFAULT;
4902                 ofs += channels * 8;
4903                 if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs,
4904                                 hdsp->iobase + ofs + 4))
4905                         return -EFAULT;
4906                 ofs += channels * 8;
4907                 if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs,
4908                                 hdsp->iobase + ofs + 4))
4909                         return -EFAULT;
4910                 j++;
4911         }
4912         return 0;
4913 }
4914
4915 static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4916 {
4917         int i, j;
4918         struct hdsp_9632_meters __iomem *m;
4919         int doublespeed = 0;
4920
4921         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4922                 doublespeed = 1;
4923         m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase);
4924         for (i = 0, j = 0; i < 16; ++i, ++j) {
4925                 if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j]))
4926                         return -EFAULT;
4927                 if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j]))
4928                         return -EFAULT;
4929                 if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j]))
4930                         return -EFAULT;
4931                 if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j],
4932                                 &m->input_rms_high[j]))
4933                         return -EFAULT;
4934                 if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j],
4935                                 &m->playback_rms_high[j]))
4936                         return -EFAULT;
4937                 if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j],
4938                                 &m->output_rms_high[j]))
4939                         return -EFAULT;
4940                 if (doublespeed && i == 3) i += 4;
4941         }
4942         return 0;
4943 }
4944
4945 static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4946 {
4947         int i;
4948
4949         for (i = 0; i < 26; i++) {
4950                 if (copy_u32_le(&peak_rms->playback_peaks[i],
4951                                 hdsp->iobase + HDSP_playbackPeakLevel + i * 4))
4952                         return -EFAULT;
4953                 if (copy_u32_le(&peak_rms->input_peaks[i],
4954                                 hdsp->iobase + HDSP_inputPeakLevel + i * 4))
4955                         return -EFAULT;
4956         }
4957         for (i = 0; i < 28; i++) {
4958                 if (copy_u32_le(&peak_rms->output_peaks[i],
4959                                 hdsp->iobase + HDSP_outputPeakLevel + i * 4))
4960                         return -EFAULT;
4961         }
4962         for (i = 0; i < 26; ++i) {
4963                 if (copy_u64_le(&peak_rms->playback_rms[i],
4964                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
4965                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
4966                         return -EFAULT;
4967                 if (copy_u64_le(&peak_rms->input_rms[i],
4968                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
4969                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8))
4970                         return -EFAULT;
4971         }
4972         return 0;
4973 }
4974
4975 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
4976 {
4977         struct hdsp *hdsp = hw->private_data;
4978         void __user *argp = (void __user *)arg;
4979         int err;
4980
4981         switch (cmd) {
4982         case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: {
4983                 struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg;
4984
4985                 err = hdsp_check_for_iobox(hdsp);
4986                 if (err < 0)
4987                         return err;
4988
4989                 err = hdsp_check_for_firmware(hdsp, 1);
4990                 if (err < 0)
4991                         return err;
4992
4993                 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4994                         snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4995                         return -EINVAL;
4996                 }
4997
4998                 switch (hdsp->io_type) {
4999                 case H9652:
5000                         return hdsp_9652_get_peak(hdsp, peak_rms);
5001                 case H9632:
5002                         return hdsp_9632_get_peak(hdsp, peak_rms);
5003                 default:
5004                         return hdsp_get_peak(hdsp, peak_rms);
5005                 }
5006         }
5007         case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: {
5008                 struct hdsp_config_info info;
5009                 unsigned long flags;
5010                 int i;
5011
5012                 err = hdsp_check_for_iobox(hdsp);
5013                 if (err < 0)
5014                         return err;
5015
5016                 err = hdsp_check_for_firmware(hdsp, 1);
5017                 if (err < 0)
5018                         return err;
5019
5020                 memset(&info, 0, sizeof(info));
5021                 spin_lock_irqsave(&hdsp->lock, flags);
5022                 info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
5023                 info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
5024                 if (hdsp->io_type != H9632)
5025                     info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp);
5026                 info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp);
5027                 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632) ? 3 : 1); ++i)
5028                         info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i);
5029                 info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp);
5030                 info.spdif_out = (unsigned char)hdsp_spdif_out(hdsp);
5031                 info.spdif_professional = (unsigned char)hdsp_spdif_professional(hdsp);
5032                 info.spdif_emphasis = (unsigned char)hdsp_spdif_emphasis(hdsp);
5033                 info.spdif_nonaudio = (unsigned char)hdsp_spdif_nonaudio(hdsp);
5034                 info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp);
5035                 info.system_sample_rate = hdsp->system_sample_rate;
5036                 info.autosync_sample_rate = hdsp_external_sample_rate(hdsp);
5037                 info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp);
5038                 info.clock_source = (unsigned char)hdsp_clock_source(hdsp);
5039                 info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp);
5040                 info.line_out = (unsigned char)hdsp_line_out(hdsp);
5041                 if (hdsp->io_type == H9632) {
5042                         info.da_gain = (unsigned char)hdsp_da_gain(hdsp);
5043                         info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
5044                         info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
5045                         info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp);
5046
5047                 } else if (hdsp->io_type == RPM) {
5048                         info.da_gain = (unsigned char) hdsp_rpm_input12(hdsp);
5049                         info.ad_gain = (unsigned char) hdsp_rpm_input34(hdsp);
5050                 }
5051                 if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
5052                         info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp);
5053                 spin_unlock_irqrestore(&hdsp->lock, flags);
5054                 if (copy_to_user(argp, &info, sizeof(info)))
5055                         return -EFAULT;
5056                 break;
5057         }
5058         case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
5059                 struct hdsp_9632_aeb h9632_aeb;
5060
5061                 if (hdsp->io_type != H9632) return -EINVAL;
5062                 h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
5063                 h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
5064                 if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb)))
5065                         return -EFAULT;
5066                 break;
5067         }
5068         case SNDRV_HDSP_IOCTL_GET_VERSION: {
5069                 struct hdsp_version hdsp_version;
5070                 int err;
5071
5072                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
5073                 if (hdsp->io_type == Undefined) {
5074                         if ((err = hdsp_get_iobox_version(hdsp)) < 0)
5075                                 return err;
5076                 }
5077                 hdsp_version.io_type = hdsp->io_type;
5078                 hdsp_version.firmware_rev = hdsp->firmware_rev;
5079                 if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version))))
5080                         return -EFAULT;
5081                 break;
5082         }
5083         case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: {
5084                 struct hdsp_firmware __user *firmware;
5085                 u32 __user *firmware_data;
5086                 int err;
5087
5088                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
5089                 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
5090                 if (hdsp->io_type == Undefined) return -EINVAL;
5091
5092                 if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded))
5093                         return -EBUSY;
5094
5095                 snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n");
5096                 firmware = (struct hdsp_firmware __user *)argp;
5097
5098                 if (get_user(firmware_data, &firmware->firmware_data))
5099                         return -EFAULT;
5100
5101                 if (hdsp_check_for_iobox (hdsp))
5102                         return -EIO;
5103
5104                 if (copy_from_user(hdsp->firmware_cache, firmware_data, sizeof(hdsp->firmware_cache)) != 0)
5105                         return -EFAULT;
5106
5107                 hdsp->state |= HDSP_FirmwareCached;
5108
5109                 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
5110                         return err;
5111
5112                 if (!(hdsp->state & HDSP_InitializationComplete)) {
5113                         if ((err = snd_hdsp_enable_io(hdsp)) < 0)
5114                                 return err;
5115
5116                         snd_hdsp_initialize_channels(hdsp);
5117                         snd_hdsp_initialize_midi_flush(hdsp);
5118
5119                         if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
5120                                 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
5121                                 return err;
5122                         }
5123                 }
5124                 break;
5125         }
5126         case SNDRV_HDSP_IOCTL_GET_MIXER: {
5127                 struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp;
5128                 if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE))
5129                         return -EFAULT;
5130                 break;
5131         }
5132         default:
5133                 return -EINVAL;
5134         }
5135         return 0;
5136 }
5137
5138 static struct snd_pcm_ops snd_hdsp_playback_ops = {
5139         .open =         snd_hdsp_playback_open,
5140         .close =        snd_hdsp_playback_release,
5141         .ioctl =        snd_hdsp_ioctl,
5142         .hw_params =    snd_hdsp_hw_params,
5143         .prepare =      snd_hdsp_prepare,
5144         .trigger =      snd_hdsp_trigger,
5145         .pointer =      snd_hdsp_hw_pointer,
5146         .copy =         snd_hdsp_playback_copy,
5147         .silence =      snd_hdsp_hw_silence,
5148 };
5149
5150 static struct snd_pcm_ops snd_hdsp_capture_ops = {
5151         .open =         snd_hdsp_capture_open,
5152         .close =        snd_hdsp_capture_release,
5153         .ioctl =        snd_hdsp_ioctl,
5154         .hw_params =    snd_hdsp_hw_params,
5155         .prepare =      snd_hdsp_prepare,
5156         .trigger =      snd_hdsp_trigger,
5157         .pointer =      snd_hdsp_hw_pointer,
5158         .copy =         snd_hdsp_capture_copy,
5159 };
5160
5161 static int snd_hdsp_create_hwdep(struct snd_card *card, struct hdsp *hdsp)
5162 {
5163         struct snd_hwdep *hw;
5164         int err;
5165
5166         if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
5167                 return err;
5168
5169         hdsp->hwdep = hw;
5170         hw->private_data = hdsp;
5171         strcpy(hw->name, "HDSP hwdep interface");
5172
5173         hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
5174
5175         return 0;
5176 }
5177
5178 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp)
5179 {
5180         struct snd_pcm *pcm;
5181         int err;
5182
5183         if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0)
5184                 return err;
5185
5186         hdsp->pcm = pcm;
5187         pcm->private_data = hdsp;
5188         strcpy(pcm->name, hdsp->card_name);
5189
5190         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops);
5191         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops);
5192
5193         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
5194
5195         return 0;
5196 }
5197
5198 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp)
5199 {
5200         hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
5201         hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
5202 }
5203
5204 static int snd_hdsp_enable_io (struct hdsp *hdsp)
5205 {
5206         int i;
5207
5208         if (hdsp_fifo_wait (hdsp, 0, 100)) {
5209                 snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
5210                 return -EIO;
5211         }
5212
5213         for (i = 0; i < hdsp->max_channels; ++i) {
5214                 hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
5215                 hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
5216         }
5217
5218         return 0;
5219 }
5220
5221 static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
5222 {
5223         int status, aebi_channels, aebo_channels;
5224
5225         switch (hdsp->io_type) {
5226         case Digiface:
5227                 hdsp->card_name = "RME Hammerfall DSP + Digiface";
5228                 hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS;
5229                 hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS;
5230                 break;
5231
5232         case H9652:
5233                 hdsp->card_name = "RME Hammerfall HDSP 9652";
5234                 hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
5235                 hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
5236                 break;
5237
5238         case H9632:
5239                 status = hdsp_read(hdsp, HDSP_statusRegister);
5240                 /* HDSP_AEBx bits are low when AEB are connected */
5241                 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
5242                 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
5243                 hdsp->card_name = "RME Hammerfall HDSP 9632";
5244                 hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels;
5245                 hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels;
5246                 hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels;
5247                 hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels;
5248                 hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels;
5249                 hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels;
5250                 break;
5251
5252         case Multiface:
5253                 hdsp->card_name = "RME Hammerfall DSP + Multiface";
5254                 hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
5255                 hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
5256                 break;
5257
5258         case RPM:
5259                 hdsp->card_name = "RME Hammerfall DSP + RPM";
5260                 hdsp->ss_in_channels = RPM_CHANNELS-1;
5261                 hdsp->ss_out_channels = RPM_CHANNELS;
5262                 hdsp->ds_in_channels = RPM_CHANNELS-1;
5263                 hdsp->ds_out_channels = RPM_CHANNELS;
5264                 break;
5265
5266         default:
5267                 /* should never get here */
5268                 break;
5269         }
5270 }
5271
5272 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp)
5273 {
5274         snd_hdsp_flush_midi_input (hdsp, 0);
5275         snd_hdsp_flush_midi_input (hdsp, 1);
5276 }
5277
5278 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
5279 {
5280         int err;
5281
5282         if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
5283                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
5284                 return err;
5285         }
5286
5287
5288         if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
5289                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
5290                 return err;
5291         }
5292
5293         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
5294                 if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) {
5295                         snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n");
5296                         return err;
5297                 }
5298         }
5299
5300         if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) {
5301                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n");
5302                 return err;
5303         }
5304
5305         snd_hdsp_proc_init(hdsp);
5306
5307         hdsp->system_sample_rate = -1;
5308         hdsp->playback_pid = -1;
5309         hdsp->capture_pid = -1;
5310         hdsp->capture_substream = NULL;
5311         hdsp->playback_substream = NULL;
5312
5313         if ((err = snd_hdsp_set_defaults(hdsp)) < 0) {
5314                 snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
5315                 return err;
5316         }
5317
5318         if (!(hdsp->state & HDSP_InitializationComplete)) {
5319                 strcpy(card->shortname, "Hammerfall DSP");
5320                 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5321                         hdsp->port, hdsp->irq);
5322
5323                 if ((err = snd_card_register(card)) < 0) {
5324                         snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
5325                         return err;
5326                 }
5327                 hdsp->state |= HDSP_InitializationComplete;
5328         }
5329
5330         return 0;
5331 }
5332
5333 #ifdef HDSP_FW_LOADER
5334 /* load firmware via hotplug fw loader */
5335 static int hdsp_request_fw_loader(struct hdsp *hdsp)
5336 {
5337         const char *fwfile;
5338         const struct firmware *fw;
5339         int err;
5340
5341         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
5342                 return 0;
5343         if (hdsp->io_type == Undefined) {
5344                 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
5345                         return err;
5346                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
5347                         return 0;
5348         }
5349
5350         /* caution: max length of firmware filename is 30! */
5351         switch (hdsp->io_type) {
5352         case RPM:
5353                 fwfile = "rpm_firmware.bin";
5354                 break;
5355         case Multiface:
5356                 if (hdsp->firmware_rev == 0xa)
5357                         fwfile = "multiface_firmware.bin";
5358                 else
5359                         fwfile = "multiface_firmware_rev11.bin";
5360                 break;
5361         case Digiface:
5362                 if (hdsp->firmware_rev == 0xa)
5363                         fwfile = "digiface_firmware.bin";
5364                 else
5365                         fwfile = "digiface_firmware_rev11.bin";
5366                 break;
5367         default:
5368                 snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type);
5369                 return -EINVAL;
5370         }
5371
5372         if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) {
5373                 snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile);
5374                 return -ENOENT;
5375         }
5376         if (fw->size < sizeof(hdsp->firmware_cache)) {
5377                 snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n",
5378                            (int)fw->size, (int)sizeof(hdsp->firmware_cache));
5379                 release_firmware(fw);
5380                 return -EINVAL;
5381         }
5382
5383         memcpy(hdsp->firmware_cache, fw->data, sizeof(hdsp->firmware_cache));
5384
5385         release_firmware(fw);
5386
5387         hdsp->state |= HDSP_FirmwareCached;
5388
5389         if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
5390                 return err;
5391
5392         if (!(hdsp->state & HDSP_InitializationComplete)) {
5393                 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
5394                         return err;
5395
5396                 if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) {
5397                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n");
5398                         return err;
5399                 }
5400                 snd_hdsp_initialize_channels(hdsp);
5401                 snd_hdsp_initialize_midi_flush(hdsp);
5402                 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
5403                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
5404                         return err;
5405                 }
5406         }
5407         return 0;
5408 }
5409 #endif
5410
5411 static int __devinit snd_hdsp_create(struct snd_card *card,
5412                                      struct hdsp *hdsp)
5413 {
5414         struct pci_dev *pci = hdsp->pci;
5415         int err;
5416         int is_9652 = 0;
5417         int is_9632 = 0;
5418
5419         hdsp->irq = -1;
5420         hdsp->state = 0;
5421         hdsp->midi[0].rmidi = NULL;
5422         hdsp->midi[1].rmidi = NULL;
5423         hdsp->midi[0].input = NULL;
5424         hdsp->midi[1].input = NULL;
5425         hdsp->midi[0].output = NULL;
5426         hdsp->midi[1].output = NULL;
5427         hdsp->midi[0].pending = 0;
5428         hdsp->midi[1].pending = 0;
5429         spin_lock_init(&hdsp->midi[0].lock);
5430         spin_lock_init(&hdsp->midi[1].lock);
5431         hdsp->iobase = NULL;
5432         hdsp->control_register = 0;
5433         hdsp->control2_register = 0;
5434         hdsp->io_type = Undefined;
5435         hdsp->max_channels = 26;
5436
5437         hdsp->card = card;
5438
5439         spin_lock_init(&hdsp->lock);
5440
5441         tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
5442
5443         pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
5444         hdsp->firmware_rev &= 0xff;
5445
5446         /* From Martin Bjoernsen :
5447             "It is important that the card's latency timer register in
5448             the PCI configuration space is set to a value much larger
5449             than 0 by the computer's BIOS or the driver.
5450             The windows driver always sets this 8 bit register [...]
5451             to its maximum 255 to avoid problems with some computers."
5452         */
5453         pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
5454
5455         strcpy(card->driver, "H-DSP");
5456         strcpy(card->mixername, "Xilinx FPGA");
5457
5458         if (hdsp->firmware_rev < 0xa)
5459                 return -ENODEV;
5460         else if (hdsp->firmware_rev < 0x64)
5461                 hdsp->card_name = "RME Hammerfall DSP";
5462         else if (hdsp->firmware_rev < 0x96) {
5463                 hdsp->card_name = "RME HDSP 9652";
5464                 is_9652 = 1;
5465         } else {
5466                 hdsp->card_name = "RME HDSP 9632";
5467                 hdsp->max_channels = 16;
5468                 is_9632 = 1;
5469         }
5470
5471         if ((err = pci_enable_device(pci)) < 0)
5472                 return err;
5473
5474         pci_set_master(hdsp->pci);
5475
5476         if ((err = pci_request_regions(pci, "hdsp")) < 0)
5477                 return err;
5478         hdsp->port = pci_resource_start(pci, 0);
5479         if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) {
5480                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1);
5481                 return -EBUSY;
5482         }
5483
5484         if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED,
5485                         KBUILD_MODNAME, hdsp)) {
5486                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq);
5487                 return -EBUSY;
5488         }
5489
5490         hdsp->irq = pci->irq;
5491         hdsp->precise_ptr = 0;
5492         hdsp->use_midi_tasklet = 1;
5493         hdsp->dds_value = 0;
5494
5495         if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
5496                 return err;
5497
5498         if (!is_9652 && !is_9632) {
5499                 /* we wait a maximum of 10 seconds to let freshly
5500                  * inserted cardbus cards do their hardware init */
5501                 err = hdsp_wait_for_iobox(hdsp, 1000, 10);
5502
5503                 if (err < 0)
5504                         return err;
5505
5506                 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
5507 #ifdef HDSP_FW_LOADER
5508                         if ((err = hdsp_request_fw_loader(hdsp)) < 0)
5509                                 /* we don't fail as this can happen
5510                                    if userspace is not ready for
5511                                    firmware upload
5512                                 */
5513                                 snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
5514                         else
5515                                 /* init is complete, we return */
5516                                 return 0;
5517 #endif
5518                         /* we defer initialization */
5519                         snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5520                         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5521                                 return err;
5522                         return 0;
5523                 } else {
5524                         snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
5525                         if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version2)
5526                                 hdsp->io_type = RPM;
5527                         else if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
5528                                 hdsp->io_type = Multiface;
5529                         else
5530                                 hdsp->io_type = Digiface;
5531                 }
5532         }
5533
5534         if ((err = snd_hdsp_enable_io(hdsp)) != 0)
5535                 return err;
5536
5537         if (is_9652)
5538                 hdsp->io_type = H9652;
5539
5540         if (is_9632)
5541                 hdsp->io_type = H9632;
5542
5543         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5544                 return err;
5545
5546         snd_hdsp_initialize_channels(hdsp);
5547         snd_hdsp_initialize_midi_flush(hdsp);
5548
5549         hdsp->state |= HDSP_FirmwareLoaded;
5550
5551         if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
5552                 return err;
5553
5554         return 0;
5555 }
5556
5557 static int snd_hdsp_free(struct hdsp *hdsp)
5558 {
5559         if (hdsp->port) {
5560                 /* stop the audio, and cancel all interrupts */
5561                 tasklet_kill(&hdsp->midi_tasklet);
5562                 hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable);
5563                 hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
5564         }
5565
5566         if (hdsp->irq >= 0)
5567                 free_irq(hdsp->irq, (void *)hdsp);
5568
5569         snd_hdsp_free_buffers(hdsp);
5570
5571         if (hdsp->iobase)
5572                 iounmap(hdsp->iobase);
5573
5574         if (hdsp->port)
5575                 pci_release_regions(hdsp->pci);
5576
5577         pci_disable_device(hdsp->pci);
5578         return 0;
5579 }
5580
5581 static void snd_hdsp_card_free(struct snd_card *card)
5582 {
5583         struct hdsp *hdsp = card->private_data;
5584
5585         if (hdsp)
5586                 snd_hdsp_free(hdsp);
5587 }
5588
5589 static int __devinit snd_hdsp_probe(struct pci_dev *pci,
5590                                     const struct pci_device_id *pci_id)
5591 {
5592         static int dev;
5593         struct hdsp *hdsp;
5594         struct snd_card *card;
5595         int err;
5596
5597         if (dev >= SNDRV_CARDS)
5598                 return -ENODEV;
5599         if (!enable[dev]) {
5600                 dev++;
5601                 return -ENOENT;
5602         }
5603
5604         err = snd_card_create(index[dev], id[dev], THIS_MODULE,
5605                               sizeof(struct hdsp), &card);
5606         if (err < 0)
5607                 return err;
5608
5609         hdsp = card->private_data;
5610         card->private_free = snd_hdsp_card_free;
5611         hdsp->dev = dev;
5612         hdsp->pci = pci;
5613         snd_card_set_dev(card, &pci->dev);
5614
5615         if ((err = snd_hdsp_create(card, hdsp)) < 0) {
5616                 snd_card_free(card);
5617                 return err;
5618         }
5619
5620         strcpy(card->shortname, "Hammerfall DSP");
5621         sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5622                 hdsp->port, hdsp->irq);
5623
5624         if ((err = snd_card_register(card)) < 0) {
5625                 snd_card_free(card);
5626                 return err;
5627         }
5628         pci_set_drvdata(pci, card);
5629         dev++;
5630         return 0;
5631 }
5632
5633 static void __devexit snd_hdsp_remove(struct pci_dev *pci)
5634 {
5635         snd_card_free(pci_get_drvdata(pci));
5636         pci_set_drvdata(pci, NULL);
5637 }
5638
5639 static struct pci_driver driver = {
5640         .name =     KBUILD_MODNAME,
5641         .id_table = snd_hdsp_ids,
5642         .probe =    snd_hdsp_probe,
5643         .remove = __devexit_p(snd_hdsp_remove),
5644 };
5645
5646 static int __init alsa_card_hdsp_init(void)
5647 {
5648         return pci_register_driver(&driver);
5649 }
5650
5651 static void __exit alsa_card_hdsp_exit(void)
5652 {
5653         pci_unregister_driver(&driver);
5654 }
5655
5656 module_init(alsa_card_hdsp_init)
5657 module_exit(alsa_card_hdsp_exit)