sound/pci/rme9652/hdsp.c

   1 /*
   2  *   ALSA driver for RME Hammerfall DSP audio interface(s)
   3  *
   4  *      Copyright (c) 2002  Paul Davis
   5  *                          Marcus Andersson
   6  *                          Thomas Charbonnel
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/slab.h>
  28 #include <linux/pci.h>
  29 #include <linux/firmware.h>
  30 #include <linux/moduleparam.h>
  31
  32 #include <sound/core.h>
  33 #include <sound/control.h>
  34 #include <sound/pcm.h>
  35 #include <sound/info.h>
  36 #include <sound/asoundef.h>
  37 #include <sound/rawmidi.h>
  38 #include <sound/hwdep.h>
  39 #include <sound/initval.h>
  40 #include <sound/hdsp.h>
  41
  42 #include <asm/byteorder.h>
  43 #include <asm/current.h>
  44 #include <asm/io.h>
  45
  46 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  47 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  48 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  49
  50 module_param_array(index, int, NULL, 0444);
  51 MODULE_PARM_DESC(index, "Index value for RME Hammerfall DSP interface.");
  52 module_param_array(id, charp, NULL, 0444);
  53 MODULE_PARM_DESC(id, "ID string for RME Hammerfall DSP interface.");
  54 module_param_array(enable, bool, NULL, 0444);
  55 MODULE_PARM_DESC(enable, "Enable/disable specific Hammerfall DSP soundcards.");
  56 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
  57 MODULE_DESCRIPTION("RME Hammerfall DSP");
  58 MODULE_LICENSE("GPL");
  59 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
  60                 "{RME HDSP-9652},"
  61                 "{RME HDSP-9632}}");
  62 #ifdef HDSP_FW_LOADER
  63 MODULE_FIRMWARE("multiface_firmware.bin");
  64 MODULE_FIRMWARE("multiface_firmware_rev11.bin");
  65 MODULE_FIRMWARE("digiface_firmware.bin");
  66 MODULE_FIRMWARE("digiface_firmware_rev11.bin");
  67 #endif
  68
  69 #define HDSP_MAX_CHANNELS        26
  70 #define HDSP_MAX_DS_CHANNELS     14
  71 #define HDSP_MAX_QS_CHANNELS     8
  72 #define DIGIFACE_SS_CHANNELS     26
  73 #define DIGIFACE_DS_CHANNELS     14
  74 #define MULTIFACE_SS_CHANNELS    18
  75 #define MULTIFACE_DS_CHANNELS    14
  76 #define H9652_SS_CHANNELS        26
  77 #define H9652_DS_CHANNELS        14
  78 /* This does not include possible Analog Extension Boards
  79    AEBs are detected at card initialization
  80 */
  81 #define H9632_SS_CHANNELS        12
  82 #define H9632_DS_CHANNELS        8
  83 #define H9632_QS_CHANNELS        4
  84
  85 /* Write registers. These are defined as byte-offsets from the iobase value.
  86  */
  87 #define HDSP_resetPointer               0
  88 #define HDSP_freqReg                    0
  89 #define HDSP_outputBufferAddress        32
  90 #define HDSP_inputBufferAddress         36
  91 #define HDSP_controlRegister            64
  92 #define HDSP_interruptConfirmation      96
  93 #define HDSP_outputEnable               128
  94 #define HDSP_control2Reg                256
  95 #define HDSP_midiDataOut0               352
  96 #define HDSP_midiDataOut1               356
  97 #define HDSP_fifoData                   368
  98 #define HDSP_inputEnable                384
  99
 100 /* Read registers. These are defined as byte-offsets from the iobase value
 101  */
 102
 103 #define HDSP_statusRegister    0
 104 #define HDSP_timecode        128
 105 #define HDSP_status2Register 192
 106 #define HDSP_midiDataIn0     360
 107 #define HDSP_midiDataIn1     364
 108 #define HDSP_midiStatusOut0  384
 109 #define HDSP_midiStatusOut1  388
 110 #define HDSP_midiStatusIn0   392
 111 #define HDSP_midiStatusIn1   396
 112 #define HDSP_fifoStatus      400
 113
 114 /* the meters are regular i/o-mapped registers, but offset
 115    considerably from the rest. the peak registers are reset
 116    when read; the least-significant 4 bits are full-scale counters;
 117    the actual peak value is in the most-significant 24 bits.
 118 */
 119
 120 #define HDSP_playbackPeakLevel  4096  /* 26 * 32 bit values */
 121 #define HDSP_inputPeakLevel     4224  /* 26 * 32 bit values */
 122 #define HDSP_outputPeakLevel    4352  /* (26+2) * 32 bit values */
 123 #define HDSP_playbackRmsLevel   4612  /* 26 * 64 bit values */
 124 #define HDSP_inputRmsLevel      4868  /* 26 * 64 bit values */
 125
 126
 127 /* This is for H9652 cards
 128    Peak values are read downward from the base
 129    Rms values are read upward
 130    There are rms values for the outputs too
 131    26*3 values are read in ss mode
 132    14*3 in ds mode, with no gap between values
 133 */
 134 #define HDSP_9652_peakBase      7164
 135 #define HDSP_9652_rmsBase       4096
 136
 137 /* c.f. the hdsp_9632_meters_t struct */
 138 #define HDSP_9632_metersBase    4096
 139
 140 #define HDSP_IO_EXTENT     7168
 141
 142 /* control2 register bits */
 143
 144 #define HDSP_TMS                0x01
 145 #define HDSP_TCK                0x02
 146 #define HDSP_TDI                0x04
 147 #define HDSP_JTAG               0x08
 148 #define HDSP_PWDN               0x10
 149 #define HDSP_PROGRAM            0x020
 150 #define HDSP_CONFIG_MODE_0      0x040
 151 #define HDSP_CONFIG_MODE_1      0x080
 152 #define HDSP_VERSION_BIT        0x100
 153 #define HDSP_BIGENDIAN_MODE     0x200
 154 #define HDSP_RD_MULTIPLE        0x400
 155 #define HDSP_9652_ENABLE_MIXER  0x800
 156 #define HDSP_TDO                0x10000000
 157
 158 #define HDSP_S_PROGRAM          (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
 159 #define HDSP_S_LOAD             (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
 160
 161 /* Control Register bits */
 162
 163 #define HDSP_Start                (1<<0)  /* start engine */
 164 #define HDSP_Latency0             (1<<1)  /* buffer size = 2^n where n is defined by Latency{2,1,0} */
 165 #define HDSP_Latency1             (1<<2)  /* [ see above ] */
 166 #define HDSP_Latency2             (1<<3)  /* [ see above ] */
 167 #define HDSP_ClockModeMaster      (1<<4)  /* 1=Master, 0=Slave/Autosync */
 168 #define HDSP_AudioInterruptEnable (1<<5)  /* what do you think ? */
 169 #define HDSP_Frequency0           (1<<6)  /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
 170 #define HDSP_Frequency1           (1<<7)  /* 0=32kHz/64kHz/128kHz */
 171 #define HDSP_DoubleSpeed          (1<<8)  /* 0=normal speed, 1=double speed */
 172 #define HDSP_SPDIFProfessional    (1<<9)  /* 0=consumer, 1=professional */
 173 #define HDSP_SPDIFEmphasis        (1<<10) /* 0=none, 1=on */
 174 #define HDSP_SPDIFNonAudio        (1<<11) /* 0=off, 1=on */
 175 #define HDSP_SPDIFOpticalOut      (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
 176 #define HDSP_SyncRef2             (1<<13)
 177 #define HDSP_SPDIFInputSelect0    (1<<14)
 178 #define HDSP_SPDIFInputSelect1    (1<<15)
 179 #define HDSP_SyncRef0             (1<<16)
 180 #define HDSP_SyncRef1             (1<<17)
 181 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
 182 #define HDSP_XLRBreakoutCable     (1<<20) /* For H9632 cards */
 183 #define HDSP_Midi0InterruptEnable (1<<22)
 184 #define HDSP_Midi1InterruptEnable (1<<23)
 185 #define HDSP_LineOut              (1<<24)
 186 #define HDSP_ADGain0              (1<<25) /* From here : H9632 specific */
 187 #define HDSP_ADGain1              (1<<26)
 188 #define HDSP_DAGain0              (1<<27)
 189 #define HDSP_DAGain1              (1<<28)
 190 #define HDSP_PhoneGain0           (1<<29)
 191 #define HDSP_PhoneGain1           (1<<30)
 192 #define HDSP_QuadSpeed            (1<<31)
 193
 194 #define HDSP_ADGainMask       (HDSP_ADGain0|HDSP_ADGain1)
 195 #define HDSP_ADGainMinus10dBV  HDSP_ADGainMask
 196 #define HDSP_ADGainPlus4dBu   (HDSP_ADGain0)
 197 #define HDSP_ADGainLowGain     0
 198
 199 #define HDSP_DAGainMask         (HDSP_DAGain0|HDSP_DAGain1)
 200 #define HDSP_DAGainHighGain      HDSP_DAGainMask
 201 #define HDSP_DAGainPlus4dBu     (HDSP_DAGain0)
 202 #define HDSP_DAGainMinus10dBV    0
 203
 204 #define HDSP_PhoneGainMask      (HDSP_PhoneGain0|HDSP_PhoneGain1)
 205 #define HDSP_PhoneGain0dB        HDSP_PhoneGainMask
 206 #define HDSP_PhoneGainMinus6dB  (HDSP_PhoneGain0)
 207 #define HDSP_PhoneGainMinus12dB  0
 208
 209 #define HDSP_LatencyMask    (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
 210 #define HDSP_FrequencyMask  (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
 211
 212 #define HDSP_SPDIFInputMask    (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 213 #define HDSP_SPDIFInputADAT1    0
 214 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
 215 #define HDSP_SPDIFInputCdrom   (HDSP_SPDIFInputSelect1)
 216 #define HDSP_SPDIFInputAES     (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 217
 218 #define HDSP_SyncRefMask        (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
 219 #define HDSP_SyncRef_ADAT1       0
 220 #define HDSP_SyncRef_ADAT2      (HDSP_SyncRef0)
 221 #define HDSP_SyncRef_ADAT3      (HDSP_SyncRef1)
 222 #define HDSP_SyncRef_SPDIF      (HDSP_SyncRef0|HDSP_SyncRef1)
 223 #define HDSP_SyncRef_WORD       (HDSP_SyncRef2)
 224 #define HDSP_SyncRef_ADAT_SYNC  (HDSP_SyncRef0|HDSP_SyncRef2)
 225
 226 /* Sample Clock Sources */
 227
 228 #define HDSP_CLOCK_SOURCE_AUTOSYNC           0
 229 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ     1
 230 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ   2
 231 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ     3
 232 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ     4
 233 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ   5
 234 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ     6
 235 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ    7
 236 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ  8
 237 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ    9
 238
 239 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
 240
 241 #define HDSP_SYNC_FROM_WORD      0
 242 #define HDSP_SYNC_FROM_SPDIF     1
 243 #define HDSP_SYNC_FROM_ADAT1     2
 244 #define HDSP_SYNC_FROM_ADAT_SYNC 3
 245 #define HDSP_SYNC_FROM_ADAT2     4
 246 #define HDSP_SYNC_FROM_ADAT3     5
 247
 248 /* SyncCheck status */
 249
 250 #define HDSP_SYNC_CHECK_NO_LOCK 0
 251 #define HDSP_SYNC_CHECK_LOCK    1
 252 #define HDSP_SYNC_CHECK_SYNC    2
 253
 254 /* AutoSync references - used by "autosync_ref" control switch */
 255
 256 #define HDSP_AUTOSYNC_FROM_WORD      0
 257 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
 258 #define HDSP_AUTOSYNC_FROM_SPDIF     2
 259 #define HDSP_AUTOSYNC_FROM_NONE      3
 260 #define HDSP_AUTOSYNC_FROM_ADAT1     4
 261 #define HDSP_AUTOSYNC_FROM_ADAT2     5
 262 #define HDSP_AUTOSYNC_FROM_ADAT3     6
 263
 264 /* Possible sources of S/PDIF input */
 265
 266 #define HDSP_SPDIFIN_OPTICAL  0 /* optical  (ADAT1) */
 267 #define HDSP_SPDIFIN_COAXIAL  1 /* coaxial (RCA) */
 268 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
 269 #define HDSP_SPDIFIN_AES      3 /* xlr for H9632 (AES)*/
 270
 271 #define HDSP_Frequency32KHz    HDSP_Frequency0
 272 #define HDSP_Frequency44_1KHz  HDSP_Frequency1
 273 #define HDSP_Frequency48KHz    (HDSP_Frequency1|HDSP_Frequency0)
 274 #define HDSP_Frequency64KHz    (HDSP_DoubleSpeed|HDSP_Frequency0)
 275 #define HDSP_Frequency88_2KHz  (HDSP_DoubleSpeed|HDSP_Frequency1)
 276 #define HDSP_Frequency96KHz    (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 277 /* For H9632 cards */
 278 #define HDSP_Frequency128KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
 279 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
 280 #define HDSP_Frequency192KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 281 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
 282         return 104857600000000 / rate; // 100 MHz
 283         return 110100480000000 / rate; // 105 MHz
 284 */
 285 #define DDS_NUMERATOR 104857600000000ULL;  /*  =  2^20 * 10^8 */
 286
 287 #define hdsp_encode_latency(x)       (((x)<<1) & HDSP_LatencyMask)
 288 #define hdsp_decode_latency(x)       (((x) & HDSP_LatencyMask)>>1)
 289
 290 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
 291 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
 292
 293 /* Status Register bits */
 294
 295 #define HDSP_audioIRQPending    (1<<0)
 296 #define HDSP_Lock2              (1<<1)     /* this is for Digiface and H9652 */
 297 #define HDSP_spdifFrequency3    HDSP_Lock2 /* this is for H9632 only */
 298 #define HDSP_Lock1              (1<<2)
 299 #define HDSP_Lock0              (1<<3)
 300 #define HDSP_SPDIFSync          (1<<4)
 301 #define HDSP_TimecodeLock       (1<<5)
 302 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
 303 #define HDSP_Sync2              (1<<16)
 304 #define HDSP_Sync1              (1<<17)
 305 #define HDSP_Sync0              (1<<18)
 306 #define HDSP_DoubleSpeedStatus  (1<<19)
 307 #define HDSP_ConfigError        (1<<20)
 308 #define HDSP_DllError           (1<<21)
 309 #define HDSP_spdifFrequency0    (1<<22)
 310 #define HDSP_spdifFrequency1    (1<<23)
 311 #define HDSP_spdifFrequency2    (1<<24)
 312 #define HDSP_SPDIFErrorFlag     (1<<25)
 313 #define HDSP_BufferID           (1<<26)
 314 #define HDSP_TimecodeSync       (1<<27)
 315 #define HDSP_AEBO               (1<<28) /* H9632 specific Analog Extension Boards */
 316 #define HDSP_AEBI               (1<<29) /* 0 = present, 1 = absent */
 317 #define HDSP_midi0IRQPending    (1<<30)
 318 #define HDSP_midi1IRQPending    (1<<31)
 319
 320 #define HDSP_spdifFrequencyMask    (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
 321 #define HDSP_spdifFrequencyMask_9632 (HDSP_spdifFrequency0|\
 322                                       HDSP_spdifFrequency1|\
 323                                       HDSP_spdifFrequency2|\
 324                                       HDSP_spdifFrequency3)
 325
 326 #define HDSP_spdifFrequency32KHz   (HDSP_spdifFrequency0)
 327 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
 328 #define HDSP_spdifFrequency48KHz   (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
 329
 330 #define HDSP_spdifFrequency64KHz   (HDSP_spdifFrequency2)
 331 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
 332 #define HDSP_spdifFrequency96KHz   (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
 333
 334 /* This is for H9632 cards */
 335 #define HDSP_spdifFrequency128KHz   (HDSP_spdifFrequency0|\
 336                                      HDSP_spdifFrequency1|\
 337                                      HDSP_spdifFrequency2)
 338 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
 339 #define HDSP_spdifFrequency192KHz   (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
 340
 341 /* Status2 Register bits */
 342
 343 #define HDSP_version0     (1<<0)
 344 #define HDSP_version1     (1<<1)
 345 #define HDSP_version2     (1<<2)
 346 #define HDSP_wc_lock      (1<<3)
 347 #define HDSP_wc_sync      (1<<4)
 348 #define HDSP_inp_freq0    (1<<5)
 349 #define HDSP_inp_freq1    (1<<6)
 350 #define HDSP_inp_freq2    (1<<7)
 351 #define HDSP_SelSyncRef0  (1<<8)
 352 #define HDSP_SelSyncRef1  (1<<9)
 353 #define HDSP_SelSyncRef2  (1<<10)
 354
 355 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
 356
 357 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
 358 #define HDSP_systemFrequency32   (HDSP_inp_freq0)
 359 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
 360 #define HDSP_systemFrequency48   (HDSP_inp_freq0|HDSP_inp_freq1)
 361 #define HDSP_systemFrequency64   (HDSP_inp_freq2)
 362 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
 363 #define HDSP_systemFrequency96   (HDSP_inp_freq1|HDSP_inp_freq2)
 364 /* FIXME : more values for 9632 cards ? */
 365
 366 #define HDSP_SelSyncRefMask        (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
 367 #define HDSP_SelSyncRef_ADAT1      0
 368 #define HDSP_SelSyncRef_ADAT2      (HDSP_SelSyncRef0)
 369 #define HDSP_SelSyncRef_ADAT3      (HDSP_SelSyncRef1)
 370 #define HDSP_SelSyncRef_SPDIF      (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
 371 #define HDSP_SelSyncRef_WORD       (HDSP_SelSyncRef2)
 372 #define HDSP_SelSyncRef_ADAT_SYNC  (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
 373
 374 /* Card state flags */
 375
 376 #define HDSP_InitializationComplete  (1<<0)
 377 #define HDSP_FirmwareLoaded          (1<<1)
 378 #define HDSP_FirmwareCached          (1<<2)
 379
 380 /* FIFO wait times, defined in terms of 1/10ths of msecs */
 381
 382 #define HDSP_LONG_WAIT   5000
 383 #define HDSP_SHORT_WAIT  30
 384
 385 #define UNITY_GAIN                       32768
 386 #define MINUS_INFINITY_GAIN              0
 387
 388 /* the size of a substream (1 mono data stream) */
 389
 390 #define HDSP_CHANNEL_BUFFER_SAMPLES  (16*1024)
 391 #define HDSP_CHANNEL_BUFFER_BYTES    (4*HDSP_CHANNEL_BUFFER_SAMPLES)
 392
 393 /* the size of the area we need to allocate for DMA transfers. the
 394    size is the same regardless of the number of channels - the
 395    Multiface still uses the same memory area.
 396
 397    Note that we allocate 1 more channel than is apparently needed
 398    because the h/w seems to write 1 byte beyond the end of the last
 399    page. Sigh.
 400 */
 401
 402 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
 403 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
 404
 405 /* use hotplug firmeare loader? */
 406 #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
 407 #if !defined(HDSP_USE_HWDEP_LOADER) && !defined(CONFIG_SND_HDSP)
 408 #define HDSP_FW_LOADER
 409 #endif
 410 #endif
 411
 412 struct hdsp_9632_meters {
 413     u32 input_peak[16];
 414     u32 playback_peak[16];
 415     u32 output_peak[16];
 416     u32 xxx_peak[16];
 417     u32 padding[64];
 418     u32 input_rms_low[16];
 419     u32 playback_rms_low[16];
 420     u32 output_rms_low[16];
 421     u32 xxx_rms_low[16];
 422     u32 input_rms_high[16];
 423     u32 playback_rms_high[16];
 424     u32 output_rms_high[16];
 425     u32 xxx_rms_high[16];
 426 };
 427
 428 struct hdsp_midi {
 429     struct hdsp             *hdsp;
 430     int                      id;
 431     struct snd_rawmidi           *rmidi;
 432     struct snd_rawmidi_substream *input;
 433     struct snd_rawmidi_substream *output;
 434     char                     istimer; /* timer in use */
 435     struct timer_list        timer;
 436     spinlock_t               lock;
 437     int                      pending;
 438 };
 439
 440 struct hdsp {
 441         spinlock_t            lock;
 442         struct snd_pcm_substream *capture_substream;
 443         struct snd_pcm_substream *playback_substream;
 444         struct hdsp_midi      midi[2];
 445         struct tasklet_struct midi_tasklet;
 446         int                   use_midi_tasklet;
 447         int                   precise_ptr;
 448         u32                   control_register;      /* cached value */
 449         u32                   control2_register;     /* cached value */
 450         u32                   creg_spdif;
 451         u32                   creg_spdif_stream;
 452         int                   clock_source_locked;
 453         char                 *card_name;             /* digiface/multiface */
 454         enum HDSP_IO_Type     io_type;               /* ditto, but for code use */
 455         unsigned short        firmware_rev;
 456         unsigned short        state;                 /* stores state bits */
 457         u32                   firmware_cache[24413]; /* this helps recover from accidental iobox power failure */
 458         size_t                period_bytes;          /* guess what this is */
 459         unsigned char         max_channels;
 460         unsigned char         qs_in_channels;        /* quad speed mode for H9632 */
 461         unsigned char         ds_in_channels;
 462         unsigned char         ss_in_channels;       /* different for multiface/digiface */
 463         unsigned char         qs_out_channels;
 464         unsigned char         ds_out_channels;
 465         unsigned char         ss_out_channels;
 466
 467         struct snd_dma_buffer capture_dma_buf;
 468         struct snd_dma_buffer playback_dma_buf;
 469         unsigned char        *capture_buffer;       /* suitably aligned address */
 470         unsigned char        *playback_buffer;      /* suitably aligned address */
 471
 472         pid_t                 capture_pid;
 473         pid_t                 playback_pid;
 474         int                   running;
 475         int                   system_sample_rate;
 476         char                 *channel_map;
 477         int                   dev;
 478         int                   irq;
 479         unsigned long         port;
 480         void __iomem         *iobase;
 481         struct snd_card *card;
 482         struct snd_pcm *pcm;
 483         struct snd_hwdep          *hwdep;
 484         struct pci_dev       *pci;
 485         struct snd_kcontrol *spdif_ctl;
 486         unsigned short        mixer_matrix[HDSP_MATRIX_MIXER_SIZE];
 487         unsigned int          dds_value; /* last value written to freq register */
 488 };
 489
 490 /* These tables map the ALSA channels 1..N to the channels that we
 491    need to use in order to find the relevant channel buffer. RME
 492    refer to this kind of mapping as between "the ADAT channel and
 493    the DMA channel." We index it using the logical audio channel,
 494    and the value is the DMA channel (i.e. channel buffer number)
 495    where the data for that channel can be read/written from/to.
 496 */
 497
 498 static char channel_map_df_ss[HDSP_MAX_CHANNELS] = {
 499         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 500         18, 19, 20, 21, 22, 23, 24, 25
 501 };
 502
 503 static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
 504         /* Analog */
 505         0, 1, 2, 3, 4, 5, 6, 7,
 506         /* ADAT 2 */
 507         16, 17, 18, 19, 20, 21, 22, 23,
 508         /* SPDIF */
 509         24, 25,
 510         -1, -1, -1, -1, -1, -1, -1, -1
 511 };
 512
 513 static char channel_map_ds[HDSP_MAX_CHANNELS] = {
 514         /* ADAT channels are remapped */
 515         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 516         /* channels 12 and 13 are S/PDIF */
 517         24, 25,
 518         /* others don't exist */
 519         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 520 };
 521
 522 static char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = {
 523         /* ADAT channels */
 524         0, 1, 2, 3, 4, 5, 6, 7,
 525         /* SPDIF */
 526         8, 9,
 527         /* Analog */
 528         10, 11,
 529         /* AO4S-192 and AI4S-192 extension boards */
 530         12, 13, 14, 15,
 531         /* others don't exist */
 532         -1, -1, -1, -1, -1, -1, -1, -1,
 533         -1, -1
 534 };
 535
 536 static char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = {
 537         /* ADAT */
 538         1, 3, 5, 7,
 539         /* SPDIF */
 540         8, 9,
 541         /* Analog */
 542         10, 11,
 543         /* AO4S-192 and AI4S-192 extension boards */
 544         12, 13, 14, 15,
 545         /* others don't exist */
 546         -1, -1, -1, -1, -1, -1, -1, -1,
 547         -1, -1, -1, -1, -1, -1
 548 };
 549
 550 static char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = {
 551         /* ADAT is disabled in this mode */
 552         /* SPDIF */
 553         8, 9,
 554         /* Analog */
 555         10, 11,
 556         /* AO4S-192 and AI4S-192 extension boards */
 557         12, 13, 14, 15,
 558         /* others don't exist */
 559         -1, -1, -1, -1, -1, -1, -1, -1,
 560         -1, -1, -1, -1, -1, -1, -1, -1,
 561         -1, -1
 562 };
 563
 564 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 565 {
 566         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 567         dmab->dev.dev = snd_dma_pci_data(pci);
 568         if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
 569                 if (dmab->bytes >= size)
 570                         return 0;
 571         }
 572         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 573                                 size, dmab) < 0)
 574                 return -ENOMEM;
 575         return 0;
 576 }
 577
 578 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 579 {
 580         if (dmab->area) {
 581                 dmab->dev.dev = NULL; /* make it anonymous */
 582                 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
 583         }
 584 }
 585
 586
 587 static struct pci_device_id snd_hdsp_ids[] = {
 588         {
 589                 .vendor = PCI_VENDOR_ID_XILINX,
 590                 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
 591                 .subvendor = PCI_ANY_ID,
 592                 .subdevice = PCI_ANY_ID,
 593         }, /* RME Hammerfall-DSP */
 594         { 0, },
 595 };
 596
 597 MODULE_DEVICE_TABLE(pci, snd_hdsp_ids);
 598
 599 /* prototypes */
 600 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp);
 601 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp);
 602 static int snd_hdsp_enable_io (struct hdsp *hdsp);
 603 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp);
 604 static void snd_hdsp_initialize_channels (struct hdsp *hdsp);
 605 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout);
 606 static int hdsp_autosync_ref(struct hdsp *hdsp);
 607 static int snd_hdsp_set_defaults(struct hdsp *hdsp);
 608 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp);
 609
 610 static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out)
 611 {
 612         switch (hdsp->io_type) {
 613         case Multiface:
 614         case Digiface:
 615         default:
 616                 if (hdsp->firmware_rev == 0xa)
 617                         return (64 * out) + (32 + (in));
 618                 else
 619                         return (52 * out) + (26 + (in));
 620         case H9632:
 621                 return (32 * out) + (16 + (in));
 622         case H9652:
 623                 return (52 * out) + (26 + (in));
 624         }
 625 }
 626
 627 static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out)
 628 {
 629         switch (hdsp->io_type) {
 630         case Multiface:
 631         case Digiface:
 632         default:
 633                 if (hdsp->firmware_rev == 0xa)
 634                         return (64 * out) + in;
 635                 else
 636                         return (52 * out) + in;
 637         case H9632:
 638                 return (32 * out) + in;
 639         case H9652:
 640                 return (52 * out) + in;
 641         }
 642 }
 643
 644 static void hdsp_write(struct hdsp *hdsp, int reg, int val)
 645 {
 646         writel(val, hdsp->iobase + reg);
 647 }
 648
 649 static unsigned int hdsp_read(struct hdsp *hdsp, int reg)
 650 {
 651         return readl (hdsp->iobase + reg);
 652 }
 653
 654 static int hdsp_check_for_iobox (struct hdsp *hdsp)
 655 {
 656         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
 657         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
 658                 snd_printk ("Hammerfall-DSP: no Digiface or Multiface connected!\n");
 659                 hdsp->state &= ~HDSP_FirmwareLoaded;
 660                 return -EIO;
 661         }
 662         return 0;
 663 }
 664
 665 static int hdsp_wait_for_iobox(struct hdsp *hdsp, unsigned int loops,
 666                                unsigned int delay)
 667 {
 668         unsigned int i;
 669
 670         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 671                 return 0;
 672
 673         for (i = 0; i != loops; ++i) {
 674                 if (hdsp_read(hdsp, HDSP_statusRegister) & HDSP_ConfigError)
 675                         msleep(delay);
 676                 else {
 677                         snd_printd("Hammerfall-DSP: iobox found after %ums!\n",
 678                                    i * delay);
 679                         return 0;
 680                 }
 681         }
 682
 683         snd_printk("Hammerfall-DSP: no Digiface or Multiface connected!\n");
 684         hdsp->state &= ~HDSP_FirmwareLoaded;
 685         return -EIO;
 686 }
 687
 688 static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
 689
 690         int i;
 691         unsigned long flags;
 692
 693         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 694
 695                 snd_printk ("Hammerfall-DSP: loading firmware\n");
 696
 697                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
 698                 hdsp_write (hdsp, HDSP_fifoData, 0);
 699
 700                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 701                         snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
 702                         return -EIO;
 703                 }
 704
 705                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 706
 707                 for (i = 0; i < 24413; ++i) {
 708                         hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]);
 709                         if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
 710                                 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
 711                                 return -EIO;
 712                         }
 713                 }
 714
 715                 ssleep(3);
 716
 717                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 718                         snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
 719                         return -EIO;
 720                 }
 721
 722 #ifdef SNDRV_BIG_ENDIAN
 723                 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
 724 #else
 725                 hdsp->control2_register = 0;
 726 #endif
 727                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
 728                 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
 729
 730         }
 731         if (hdsp->state & HDSP_InitializationComplete) {
 732                 snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
 733                 spin_lock_irqsave(&hdsp->lock, flags);
 734                 snd_hdsp_set_defaults(hdsp);
 735                 spin_unlock_irqrestore(&hdsp->lock, flags);
 736         }
 737
 738         hdsp->state |= HDSP_FirmwareLoaded;
 739
 740         return 0;
 741 }
 742
 743 static int hdsp_get_iobox_version (struct hdsp *hdsp)
 744 {
 745         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 746
 747                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
 748                 hdsp_write (hdsp, HDSP_fifoData, 0);
 749                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0)
 750                         return -EIO;
 751
 752                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 753                 hdsp_write (hdsp, HDSP_fifoData, 0);
 754
 755                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT)) {
 756                         hdsp->io_type = Multiface;
 757                         hdsp_write (hdsp, HDSP_control2Reg, HDSP_VERSION_BIT);
 758                         hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 759                         hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT);
 760                 } else {
 761                         hdsp->io_type = Digiface;
 762                 }
 763         } else {
 764                 /* firmware was already loaded, get iobox type */
 765                 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
 766                         hdsp->io_type = Multiface;
 767                 else
 768                         hdsp->io_type = Digiface;
 769         }
 770         return 0;
 771 }
 772
 773
 774 #ifdef HDSP_FW_LOADER
 775 static int hdsp_request_fw_loader(struct hdsp *hdsp);
 776 #endif
 777
 778 static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand)
 779 {
 780         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 781                 return 0;
 782         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 783                 hdsp->state &= ~HDSP_FirmwareLoaded;
 784                 if (! load_on_demand)
 785                         return -EIO;
 786                 snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n");
 787                 /* try to load firmware */
 788                 if (! (hdsp->state & HDSP_FirmwareCached)) {
 789 #ifdef HDSP_FW_LOADER
 790                         if (! hdsp_request_fw_loader(hdsp))
 791                                 return 0;
 792 #endif
 793                         snd_printk(KERN_ERR
 794                                    "Hammerfall-DSP: No firmware loaded nor "
 795                                    "cached, please upload firmware.\n");
 796                         return -EIO;
 797                 }
 798                 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
 799                         snd_printk(KERN_ERR
 800                                    "Hammerfall-DSP: Firmware loading from "
 801                                    "cache failed, please upload manually.\n");
 802                         return -EIO;
 803                 }
 804         }
 805         return 0;
 806 }
 807
 808
 809 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
 810 {
 811         int i;
 812
 813         /* the fifoStatus registers reports on how many words
 814            are available in the command FIFO.
 815         */
 816
 817         for (i = 0; i < timeout; i++) {
 818
 819                 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
 820                         return 0;
 821
 822                 /* not very friendly, but we only do this during a firmware
 823                    load and changing the mixer, so we just put up with it.
 824                 */
 825
 826                 udelay (100);
 827         }
 828
 829         snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
 830                     count, timeout);
 831         return -1;
 832 }
 833
 834 static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr)
 835 {
 836         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 837                 return 0;
 838
 839         return hdsp->mixer_matrix[addr];
 840 }
 841
 842 static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data)
 843 {
 844         unsigned int ad;
 845
 846         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 847                 return -1;
 848
 849         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
 850
 851                 /* from martin bjornsen:
 852
 853                    "You can only write dwords to the
 854                    mixer memory which contain two
 855                    mixer values in the low and high
 856                    word. So if you want to change
 857                    value 0 you have to read value 1
 858                    from the cache and write both to
 859                    the first dword in the mixer
 860                    memory."
 861                 */
 862
 863                 if (hdsp->io_type == H9632 && addr >= 512)
 864                         return 0;
 865
 866                 if (hdsp->io_type == H9652 && addr >= 1352)
 867                         return 0;
 868
 869                 hdsp->mixer_matrix[addr] = data;
 870
 871
 872                 /* `addr' addresses a 16-bit wide address, but
 873                    the address space accessed via hdsp_write
 874                    uses byte offsets. put another way, addr
 875                    varies from 0 to 1351, but to access the
 876                    corresponding memory location, we need
 877                    to access 0 to 2703 ...
 878                 */
 879                 ad = addr/2;
 880
 881                 hdsp_write (hdsp, 4096 + (ad*4),
 882                             (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
 883                             hdsp->mixer_matrix[addr&0x7fe]);
 884
 885                 return 0;
 886
 887         } else {
 888
 889                 ad = (addr << 16) + data;
 890
 891                 if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
 892                         return -1;
 893
 894                 hdsp_write (hdsp, HDSP_fifoData, ad);
 895                 hdsp->mixer_matrix[addr] = data;
 896
 897         }
 898
 899         return 0;
 900 }
 901
 902 static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp)
 903 {
 904         unsigned long flags;
 905         int ret = 1;
 906
 907         spin_lock_irqsave(&hdsp->lock, flags);
 908         if ((hdsp->playback_pid != hdsp->capture_pid) &&
 909             (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
 910                 ret = 0;
 911         spin_unlock_irqrestore(&hdsp->lock, flags);
 912         return ret;
 913 }
 914
 915 static int hdsp_spdif_sample_rate(struct hdsp *hdsp)
 916 {
 917         unsigned int status = hdsp_read(hdsp, HDSP_statusRegister);
 918         unsigned int rate_bits = (status & HDSP_spdifFrequencyMask);
 919
 920         /* For the 9632, the mask is different */
 921         if (hdsp->io_type == H9632)
 922                  rate_bits = (status & HDSP_spdifFrequencyMask_9632);
 923
 924         if (status & HDSP_SPDIFErrorFlag)
 925                 return 0;
 926
 927         switch (rate_bits) {
 928         case HDSP_spdifFrequency32KHz: return 32000;
 929         case HDSP_spdifFrequency44_1KHz: return 44100;
 930         case HDSP_spdifFrequency48KHz: return 48000;
 931         case HDSP_spdifFrequency64KHz: return 64000;
 932         case HDSP_spdifFrequency88_2KHz: return 88200;
 933         case HDSP_spdifFrequency96KHz: return 96000;
 934         case HDSP_spdifFrequency128KHz:
 935                 if (hdsp->io_type == H9632) return 128000;
 936                 break;
 937         case HDSP_spdifFrequency176_4KHz:
 938                 if (hdsp->io_type == H9632) return 176400;
 939                 break;
 940         case HDSP_spdifFrequency192KHz:
 941                 if (hdsp->io_type == H9632) return 192000;
 942                 break;
 943         default:
 944                 break;
 945         }
 946         snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status);
 947         return 0;
 948 }
 949
 950 static int hdsp_external_sample_rate(struct hdsp *hdsp)
 951 {
 952         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
 953         unsigned int rate_bits = status2 & HDSP_systemFrequencyMask;
 954
 955         /* For the 9632 card, there seems to be no bit for indicating external
 956          * sample rate greater than 96kHz. The card reports the corresponding
 957          * single speed. So the best means seems to get spdif rate when
 958          * autosync reference is spdif */
 959         if (hdsp->io_type == H9632 &&
 960             hdsp_autosync_ref(hdsp) == HDSP_AUTOSYNC_FROM_SPDIF)
 961                  return hdsp_spdif_sample_rate(hdsp);
 962
 963         switch (rate_bits) {
 964         case HDSP_systemFrequency32:   return 32000;
 965         case HDSP_systemFrequency44_1: return 44100;
 966         case HDSP_systemFrequency48:   return 48000;
 967         case HDSP_systemFrequency64:   return 64000;
 968         case HDSP_systemFrequency88_2: return 88200;
 969         case HDSP_systemFrequency96:   return 96000;
 970         default:
 971                 return 0;
 972         }
 973 }
 974
 975 static void hdsp_compute_period_size(struct hdsp *hdsp)
 976 {
 977         hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8));
 978 }
 979
 980 static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp)
 981 {
 982         int position;
 983
 984         position = hdsp_read(hdsp, HDSP_statusRegister);
 985
 986         if (!hdsp->precise_ptr)
 987                 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
 988
 989         position &= HDSP_BufferPositionMask;
 990         position /= 4;
 991         position &= (hdsp->period_bytes/2) - 1;
 992         return position;
 993 }
 994
 995 static void hdsp_reset_hw_pointer(struct hdsp *hdsp)
 996 {
 997         hdsp_write (hdsp, HDSP_resetPointer, 0);
 998         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
 999                 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
1000                  * requires (?) to write again DDS value after a reset pointer
1001                  * (at least, it works like this) */
1002                 hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value);
1003 }
1004
1005 static void hdsp_start_audio(struct hdsp *s)
1006 {
1007         s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start);
1008         hdsp_write(s, HDSP_controlRegister, s->control_register);
1009 }
1010
1011 static void hdsp_stop_audio(struct hdsp *s)
1012 {
1013         s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable);
1014         hdsp_write(s, HDSP_controlRegister, s->control_register);
1015 }
1016
1017 static void hdsp_silence_playback(struct hdsp *hdsp)
1018 {
1019         memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
1020 }
1021
1022 static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
1023 {
1024         int n;
1025
1026         spin_lock_irq(&s->lock);
1027
1028         frames >>= 7;
1029         n = 0;
1030         while (frames) {
1031                 n++;
1032                 frames >>= 1;
1033         }
1034
1035         s->control_register &= ~HDSP_LatencyMask;
1036         s->control_register |= hdsp_encode_latency(n);
1037
1038         hdsp_write(s, HDSP_controlRegister, s->control_register);
1039
1040         hdsp_compute_period_size(s);
1041
1042         spin_unlock_irq(&s->lock);
1043
1044         return 0;
1045 }
1046
1047 static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
1048 {
1049         u64 n;
1050         u32 r;
1051
1052         if (rate >= 112000)
1053                 rate /= 4;
1054         else if (rate >= 56000)
1055                 rate /= 2;
1056
1057         n = DDS_NUMERATOR;
1058         div64_32(&n, rate, &r);
1059         /* n should be less than 2^32 for being written to FREQ register */
1060         snd_BUG_ON(n >> 32);
1061         /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1062            value to write it after a reset */
1063         hdsp->dds_value = n;
1064         hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value);
1065 }
1066
1067 static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally)
1068 {
1069         int reject_if_open = 0;
1070         int current_rate;
1071         int rate_bits;
1072
1073         /* ASSUMPTION: hdsp->lock is either held, or
1074            there is no need for it (e.g. during module
1075            initialization).
1076         */
1077
1078         if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
1079                 if (called_internally) {
1080                         /* request from ctl or card initialization */
1081                         snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1082                         return -1;
1083                 } else {
1084                         /* hw_param request while in AutoSync mode */
1085                         int external_freq = hdsp_external_sample_rate(hdsp);
1086                         int spdif_freq = hdsp_spdif_sample_rate(hdsp);
1087
1088                         if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1089                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
1090                         else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1091                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1092                         else if (rate != external_freq) {
1093                                 snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
1094                                 return -1;
1095                         }
1096                 }
1097         }
1098
1099         current_rate = hdsp->system_sample_rate;
1100
1101         /* Changing from a "single speed" to a "double speed" rate is
1102            not allowed if any substreams are open. This is because
1103            such a change causes a shift in the location of
1104            the DMA buffers and a reduction in the number of available
1105            buffers.
1106
1107            Note that a similar but essentially insoluble problem
1108            exists for externally-driven rate changes. All we can do
1109            is to flag rate changes in the read/write routines.  */
1110
1111         if (rate > 96000 && hdsp->io_type != H9632)
1112                 return -EINVAL;
1113
1114         switch (rate) {
1115         case 32000:
1116                 if (current_rate > 48000)
1117                         reject_if_open = 1;
1118                 rate_bits = HDSP_Frequency32KHz;
1119                 break;
1120         case 44100:
1121                 if (current_rate > 48000)
1122                         reject_if_open = 1;
1123                 rate_bits = HDSP_Frequency44_1KHz;
1124                 break;
1125         case 48000:
1126                 if (current_rate > 48000)
1127                         reject_if_open = 1;
1128                 rate_bits = HDSP_Frequency48KHz;
1129                 break;
1130         case 64000:
1131                 if (current_rate <= 48000 || current_rate > 96000)
1132                         reject_if_open = 1;
1133                 rate_bits = HDSP_Frequency64KHz;
1134                 break;
1135         case 88200:
1136                 if (current_rate <= 48000 || current_rate > 96000)
1137                         reject_if_open = 1;
1138                 rate_bits = HDSP_Frequency88_2KHz;
1139                 break;
1140         case 96000:
1141                 if (current_rate <= 48000 || current_rate > 96000)
1142                         reject_if_open = 1;
1143                 rate_bits = HDSP_Frequency96KHz;
1144                 break;
1145         case 128000:
1146                 if (current_rate < 128000)
1147                         reject_if_open = 1;
1148                 rate_bits = HDSP_Frequency128KHz;
1149                 break;
1150         case 176400:
1151                 if (current_rate < 128000)
1152                         reject_if_open = 1;
1153                 rate_bits = HDSP_Frequency176_4KHz;
1154                 break;
1155         case 192000:
1156                 if (current_rate < 128000)
1157                         reject_if_open = 1;
1158                 rate_bits = HDSP_Frequency192KHz;
1159                 break;
1160         default:
1161                 return -EINVAL;
1162         }
1163
1164         if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1165                 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1166                             hdsp->capture_pid,
1167                             hdsp->playback_pid);
1168                 return -EBUSY;
1169         }
1170
1171         hdsp->control_register &= ~HDSP_FrequencyMask;
1172         hdsp->control_register |= rate_bits;
1173         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1174
1175         /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1176         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1177                 hdsp_set_dds_value(hdsp, rate);
1178
1179         if (rate >= 128000) {
1180                 hdsp->channel_map = channel_map_H9632_qs;
1181         } else if (rate > 48000) {
1182                 if (hdsp->io_type == H9632)
1183                         hdsp->channel_map = channel_map_H9632_ds;
1184                 else
1185                         hdsp->channel_map = channel_map_ds;
1186         } else {
1187                 switch (hdsp->io_type) {
1188                 case Multiface:
1189                         hdsp->channel_map = channel_map_mf_ss;
1190                         break;
1191                 case Digiface:
1192                 case H9652:
1193                         hdsp->channel_map = channel_map_df_ss;
1194                         break;
1195                 case H9632:
1196                         hdsp->channel_map = channel_map_H9632_ss;
1197                         break;
1198                 default:
1199                         /* should never happen */
1200                         break;
1201                 }
1202         }
1203
1204         hdsp->system_sample_rate = rate;
1205
1206         return 0;
1207 }
1208
1209 /*----------------------------------------------------------------------------
1210    MIDI
1211   ----------------------------------------------------------------------------*/
1212
1213 static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id)
1214 {
1215         /* the hardware already does the relevant bit-mask with 0xff */
1216         if (id)
1217                 return hdsp_read(hdsp, HDSP_midiDataIn1);
1218         else
1219                 return hdsp_read(hdsp, HDSP_midiDataIn0);
1220 }
1221
1222 static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val)
1223 {
1224         /* the hardware already does the relevant bit-mask with 0xff */
1225         if (id)
1226                 hdsp_write(hdsp, HDSP_midiDataOut1, val);
1227         else
1228                 hdsp_write(hdsp, HDSP_midiDataOut0, val);
1229 }
1230
1231 static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id)
1232 {
1233         if (id)
1234                 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1235         else
1236                 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1237 }
1238
1239 static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id)
1240 {
1241         int fifo_bytes_used;
1242
1243         if (id)
1244                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1245         else
1246                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1247
1248         if (fifo_bytes_used < 128)
1249                 return  128 - fifo_bytes_used;
1250         else
1251                 return 0;
1252 }
1253
1254 static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id)
1255 {
1256         while (snd_hdsp_midi_input_available (hdsp, id))
1257                 snd_hdsp_midi_read_byte (hdsp, id);
1258 }
1259
1260 static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi)
1261 {
1262         unsigned long flags;
1263         int n_pending;
1264         int to_write;
1265         int i;
1266         unsigned char buf[128];
1267
1268         /* Output is not interrupt driven */
1269
1270         spin_lock_irqsave (&hmidi->lock, flags);
1271         if (hmidi->output) {
1272                 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
1273                         if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
1274                                 if (n_pending > (int)sizeof (buf))
1275                                         n_pending = sizeof (buf);
1276
1277                                 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
1278                                         for (i = 0; i < to_write; ++i)
1279                                                 snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
1280                                 }
1281                         }
1282                 }
1283         }
1284         spin_unlock_irqrestore (&hmidi->lock, flags);
1285         return 0;
1286 }
1287
1288 static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi)
1289 {
1290         unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
1291         unsigned long flags;
1292         int n_pending;
1293         int i;
1294
1295         spin_lock_irqsave (&hmidi->lock, flags);
1296         if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) {
1297                 if (hmidi->input) {
1298                         if (n_pending > (int)sizeof (buf))
1299                                 n_pending = sizeof (buf);
1300                         for (i = 0; i < n_pending; ++i)
1301                                 buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1302                         if (n_pending)
1303                                 snd_rawmidi_receive (hmidi->input, buf, n_pending);
1304                 } else {
1305                         /* flush the MIDI input FIFO */
1306                         while (--n_pending)
1307                                 snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1308                 }
1309         }
1310         hmidi->pending = 0;
1311         if (hmidi->id)
1312                 hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable;
1313         else
1314                 hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable;
1315         hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
1316         spin_unlock_irqrestore (&hmidi->lock, flags);
1317         return snd_hdsp_midi_output_write (hmidi);
1318 }
1319
1320 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1321 {
1322         struct hdsp *hdsp;
1323         struct hdsp_midi *hmidi;
1324         unsigned long flags;
1325         u32 ie;
1326
1327         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1328         hdsp = hmidi->hdsp;
1329         ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
1330         spin_lock_irqsave (&hdsp->lock, flags);
1331         if (up) {
1332                 if (!(hdsp->control_register & ie)) {
1333                         snd_hdsp_flush_midi_input (hdsp, hmidi->id);
1334                         hdsp->control_register |= ie;
1335                 }
1336         } else {
1337                 hdsp->control_register &= ~ie;
1338                 tasklet_kill(&hdsp->midi_tasklet);
1339         }
1340
1341         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1342         spin_unlock_irqrestore (&hdsp->lock, flags);
1343 }
1344
1345 static void snd_hdsp_midi_output_timer(unsigned long data)
1346 {
1347         struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
1348         unsigned long flags;
1349
1350         snd_hdsp_midi_output_write(hmidi);
1351         spin_lock_irqsave (&hmidi->lock, flags);
1352
1353         /* this does not bump hmidi->istimer, because the
1354            kernel automatically removed the timer when it
1355            expired, and we are now adding it back, thus
1356            leaving istimer wherever it was set before.
1357         */
1358
1359         if (hmidi->istimer) {
1360                 hmidi->timer.expires = 1 + jiffies;
1361                 add_timer(&hmidi->timer);
1362         }
1363
1364         spin_unlock_irqrestore (&hmidi->lock, flags);
1365 }
1366
1367 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1368 {
1369         struct hdsp_midi *hmidi;
1370         unsigned long flags;
1371
1372         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1373         spin_lock_irqsave (&hmidi->lock, flags);
1374         if (up) {
1375                 if (!hmidi->istimer) {
1376                         init_timer(&hmidi->timer);
1377                         hmidi->timer.function = snd_hdsp_midi_output_timer;
1378                         hmidi->timer.data = (unsigned long) hmidi;
1379                         hmidi->timer.expires = 1 + jiffies;
1380                         add_timer(&hmidi->timer);
1381                         hmidi->istimer++;
1382                 }
1383         } else {
1384                 if (hmidi->istimer && --hmidi->istimer <= 0)
1385                         del_timer (&hmidi->timer);
1386         }
1387         spin_unlock_irqrestore (&hmidi->lock, flags);
1388         if (up)
1389                 snd_hdsp_midi_output_write(hmidi);
1390 }
1391
1392 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream)
1393 {
1394         struct hdsp_midi *hmidi;
1395
1396         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1397         spin_lock_irq (&hmidi->lock);
1398         snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id);
1399         hmidi->input = substream;
1400         spin_unlock_irq (&hmidi->lock);
1401
1402         return 0;
1403 }
1404
1405 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream)
1406 {
1407         struct hdsp_midi *hmidi;
1408
1409         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1410         spin_lock_irq (&hmidi->lock);
1411         hmidi->output = substream;
1412         spin_unlock_irq (&hmidi->lock);
1413
1414         return 0;
1415 }
1416
1417 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream)
1418 {
1419         struct hdsp_midi *hmidi;
1420
1421         snd_hdsp_midi_input_trigger (substream, 0);
1422
1423         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1424         spin_lock_irq (&hmidi->lock);
1425         hmidi->input = NULL;
1426         spin_unlock_irq (&hmidi->lock);
1427
1428         return 0;
1429 }
1430
1431 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream)
1432 {
1433         struct hdsp_midi *hmidi;
1434
1435         snd_hdsp_midi_output_trigger (substream, 0);
1436
1437         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1438         spin_lock_irq (&hmidi->lock);
1439         hmidi->output = NULL;
1440         spin_unlock_irq (&hmidi->lock);
1441
1442         return 0;
1443 }
1444
1445 static struct snd_rawmidi_ops snd_hdsp_midi_output =
1446 {
1447         .open =         snd_hdsp_midi_output_open,
1448         .close =        snd_hdsp_midi_output_close,
1449         .trigger =      snd_hdsp_midi_output_trigger,
1450 };
1451
1452 static struct snd_rawmidi_ops snd_hdsp_midi_input =
1453 {
1454         .open =         snd_hdsp_midi_input_open,
1455         .close =        snd_hdsp_midi_input_close,
1456         .trigger =      snd_hdsp_midi_input_trigger,
1457 };
1458
1459 static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id)
1460 {
1461         char buf[32];
1462
1463         hdsp->midi[id].id = id;
1464         hdsp->midi[id].rmidi = NULL;
1465         hdsp->midi[id].input = NULL;
1466         hdsp->midi[id].output = NULL;
1467         hdsp->midi[id].hdsp = hdsp;
1468         hdsp->midi[id].istimer = 0;
1469         hdsp->midi[id].pending = 0;
1470         spin_lock_init (&hdsp->midi[id].lock);
1471
1472         sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1473         if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1474                 return -1;
1475
1476         sprintf(hdsp->midi[id].rmidi->name, "HDSP MIDI %d", id+1);
1477         hdsp->midi[id].rmidi->private_data = &hdsp->midi[id];
1478
1479         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output);
1480         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input);
1481
1482         hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1483                 SNDRV_RAWMIDI_INFO_INPUT |
1484                 SNDRV_RAWMIDI_INFO_DUPLEX;
1485
1486         return 0;
1487 }
1488
1489 /*-----------------------------------------------------------------------------
1490   Control Interface
1491   ----------------------------------------------------------------------------*/
1492
1493 static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes)
1494 {
1495         u32 val = 0;
1496         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1497         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1498         if (val & HDSP_SPDIFProfessional)
1499                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1500         else
1501                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1502         return val;
1503 }
1504
1505 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
1506 {
1507         aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1508                          ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1509         if (val & HDSP_SPDIFProfessional)
1510                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1511         else
1512                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1513 }
1514
1515 static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1516 {
1517         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1518         uinfo->count = 1;
1519         return 0;
1520 }
1521
1522 static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1523 {
1524         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1525
1526         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
1527         return 0;
1528 }
1529
1530 static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1531 {
1532         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1533         int change;
1534         u32 val;
1535
1536         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1537         spin_lock_irq(&hdsp->lock);
1538         change = val != hdsp->creg_spdif;
1539         hdsp->creg_spdif = val;
1540         spin_unlock_irq(&hdsp->lock);
1541         return change;
1542 }
1543
1544 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1545 {
1546         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1547         uinfo->count = 1;
1548         return 0;
1549 }
1550
1551 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1552 {
1553         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1554
1555         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
1556         return 0;
1557 }
1558
1559 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1560 {
1561         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1562         int change;
1563         u32 val;
1564
1565         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1566         spin_lock_irq(&hdsp->lock);
1567         change = val != hdsp->creg_spdif_stream;
1568         hdsp->creg_spdif_stream = val;
1569         hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
1570         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
1571         spin_unlock_irq(&hdsp->lock);
1572         return change;
1573 }
1574
1575 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1576 {
1577         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1578         uinfo->count = 1;
1579         return 0;
1580 }
1581
1582 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1583 {
1584         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1585         return 0;
1586 }
1587
1588 #define HDSP_SPDIF_IN(xname, xindex) \
1589 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1590   .name = xname, \
1591   .index = xindex, \
1592   .info = snd_hdsp_info_spdif_in, \
1593   .get = snd_hdsp_get_spdif_in, \
1594   .put = snd_hdsp_put_spdif_in }
1595
1596 static unsigned int hdsp_spdif_in(struct hdsp *hdsp)
1597 {
1598         return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask);
1599 }
1600
1601 static int hdsp_set_spdif_input(struct hdsp *hdsp, int in)
1602 {
1603         hdsp->control_register &= ~HDSP_SPDIFInputMask;
1604         hdsp->control_register |= hdsp_encode_spdif_in(in);
1605         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1606         return 0;
1607 }
1608
1609 static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1610 {
1611         static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"};
1612         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1613
1614         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1615         uinfo->count = 1;
1616         uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3);
1617         if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2))
1618                 uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2);
1619         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1620         return 0;
1621 }
1622
1623 static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1624 {
1625         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1626
1627         ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1628         return 0;
1629 }
1630
1631 static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1632 {
1633         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1634         int change;
1635         unsigned int val;
1636
1637         if (!snd_hdsp_use_is_exclusive(hdsp))
1638                 return -EBUSY;
1639         val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1640         spin_lock_irq(&hdsp->lock);
1641         change = val != hdsp_spdif_in(hdsp);
1642         if (change)
1643                 hdsp_set_spdif_input(hdsp, val);
1644         spin_unlock_irq(&hdsp->lock);
1645         return change;
1646 }
1647
1648 #define HDSP_SPDIF_OUT(xname, xindex) \
1649 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1650   .info = snd_hdsp_info_spdif_bits, \
1651   .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1652
1653 static int hdsp_spdif_out(struct hdsp *hdsp)
1654 {
1655         return (hdsp->control_register & HDSP_SPDIFOpticalOut) ? 1 : 0;
1656 }
1657
1658 static int hdsp_set_spdif_output(struct hdsp *hdsp, int out)
1659 {
1660         if (out)
1661                 hdsp->control_register |= HDSP_SPDIFOpticalOut;
1662         else
1663                 hdsp->control_register &= ~HDSP_SPDIFOpticalOut;
1664         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1665         return 0;
1666 }
1667
1668 #define snd_hdsp_info_spdif_bits        snd_ctl_boolean_mono_info
1669
1670 static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1671 {
1672         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1673
1674         ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp);
1675         return 0;
1676 }
1677
1678 static int snd_hdsp_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1679 {
1680         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1681         int change;
1682         unsigned int val;
1683
1684         if (!snd_hdsp_use_is_exclusive(hdsp))
1685                 return -EBUSY;
1686         val = ucontrol->value.integer.value[0] & 1;
1687         spin_lock_irq(&hdsp->lock);
1688         change = (int)val != hdsp_spdif_out(hdsp);
1689         hdsp_set_spdif_output(hdsp, val);
1690         spin_unlock_irq(&hdsp->lock);
1691         return change;
1692 }
1693
1694 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1695 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1696   .info = snd_hdsp_info_spdif_bits, \
1697   .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1698
1699 static int hdsp_spdif_professional(struct hdsp *hdsp)
1700 {
1701         return (hdsp->control_register & HDSP_SPDIFProfessional) ? 1 : 0;
1702 }
1703
1704 static int hdsp_set_spdif_professional(struct hdsp *hdsp, int val)
1705 {
1706         if (val)
1707                 hdsp->control_register |= HDSP_SPDIFProfessional;
1708         else
1709                 hdsp->control_register &= ~HDSP_SPDIFProfessional;
1710         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1711         return 0;
1712 }
1713
1714 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1715 {
1716         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1717
1718         ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp);
1719         return 0;
1720 }
1721
1722 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1723 {
1724         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1725         int change;
1726         unsigned int val;
1727
1728         if (!snd_hdsp_use_is_exclusive(hdsp))
1729                 return -EBUSY;
1730         val = ucontrol->value.integer.value[0] & 1;
1731         spin_lock_irq(&hdsp->lock);
1732         change = (int)val != hdsp_spdif_professional(hdsp);
1733         hdsp_set_spdif_professional(hdsp, val);
1734         spin_unlock_irq(&hdsp->lock);
1735         return change;
1736 }
1737
1738 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1739 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1740   .info = snd_hdsp_info_spdif_bits, \
1741   .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1742
1743 static int hdsp_spdif_emphasis(struct hdsp *hdsp)
1744 {
1745         return (hdsp->control_register & HDSP_SPDIFEmphasis) ? 1 : 0;
1746 }
1747
1748 static int hdsp_set_spdif_emphasis(struct hdsp *hdsp, int val)
1749 {
1750         if (val)
1751                 hdsp->control_register |= HDSP_SPDIFEmphasis;
1752         else
1753                 hdsp->control_register &= ~HDSP_SPDIFEmphasis;
1754         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1755         return 0;
1756 }
1757
1758 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1759 {
1760         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1761
1762         ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp);
1763         return 0;
1764 }
1765
1766 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1767 {
1768         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1769         int change;
1770         unsigned int val;
1771
1772         if (!snd_hdsp_use_is_exclusive(hdsp))
1773                 return -EBUSY;
1774         val = ucontrol->value.integer.value[0] & 1;
1775         spin_lock_irq(&hdsp->lock);
1776         change = (int)val != hdsp_spdif_emphasis(hdsp);
1777         hdsp_set_spdif_emphasis(hdsp, val);
1778         spin_unlock_irq(&hdsp->lock);
1779         return change;
1780 }
1781
1782 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1783 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1784   .info = snd_hdsp_info_spdif_bits, \
1785   .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1786
1787 static int hdsp_spdif_nonaudio(struct hdsp *hdsp)
1788 {
1789         return (hdsp->control_register & HDSP_SPDIFNonAudio) ? 1 : 0;
1790 }
1791
1792 static int hdsp_set_spdif_nonaudio(struct hdsp *hdsp, int val)
1793 {
1794         if (val)
1795                 hdsp->control_register |= HDSP_SPDIFNonAudio;
1796         else
1797                 hdsp->control_register &= ~HDSP_SPDIFNonAudio;
1798         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1799         return 0;
1800 }
1801
1802 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1803 {
1804         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1805
1806         ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp);
1807         return 0;
1808 }
1809
1810 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1811 {
1812         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1813         int change;
1814         unsigned int val;
1815
1816         if (!snd_hdsp_use_is_exclusive(hdsp))
1817                 return -EBUSY;
1818         val = ucontrol->value.integer.value[0] & 1;
1819         spin_lock_irq(&hdsp->lock);
1820         change = (int)val != hdsp_spdif_nonaudio(hdsp);
1821         hdsp_set_spdif_nonaudio(hdsp, val);
1822         spin_unlock_irq(&hdsp->lock);
1823         return change;
1824 }
1825
1826 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1827 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1828   .name = xname, \
1829   .index = xindex, \
1830   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1831   .info = snd_hdsp_info_spdif_sample_rate, \
1832   .get = snd_hdsp_get_spdif_sample_rate \
1833 }
1834
1835 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1836 {
1837         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1838         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1839
1840         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1841         uinfo->count = 1;
1842         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7;
1843         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1844                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1845         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1846         return 0;
1847 }
1848
1849 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1850 {
1851         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1852
1853         switch (hdsp_spdif_sample_rate(hdsp)) {
1854         case 32000:
1855                 ucontrol->value.enumerated.item[0] = 0;
1856                 break;
1857         case 44100:
1858                 ucontrol->value.enumerated.item[0] = 1;
1859                 break;
1860         case 48000:
1861                 ucontrol->value.enumerated.item[0] = 2;
1862                 break;
1863         case 64000:
1864                 ucontrol->value.enumerated.item[0] = 3;
1865                 break;
1866         case 88200:
1867                 ucontrol->value.enumerated.item[0] = 4;
1868                 break;
1869         case 96000:
1870                 ucontrol->value.enumerated.item[0] = 5;
1871                 break;
1872         case 128000:
1873                 ucontrol->value.enumerated.item[0] = 7;
1874                 break;
1875         case 176400:
1876                 ucontrol->value.enumerated.item[0] = 8;
1877                 break;
1878         case 192000:
1879                 ucontrol->value.enumerated.item[0] = 9;
1880                 break;
1881         default:
1882                 ucontrol->value.enumerated.item[0] = 6;
1883         }
1884         return 0;
1885 }
1886
1887 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1888 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1889   .name = xname, \
1890   .index = xindex, \
1891   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1892   .info = snd_hdsp_info_system_sample_rate, \
1893   .get = snd_hdsp_get_system_sample_rate \
1894 }
1895
1896 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1897 {
1898         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1899         uinfo->count = 1;
1900         return 0;
1901 }
1902
1903 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1904 {
1905         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1906
1907         ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1908         return 0;
1909 }
1910
1911 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1912 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1913   .name = xname, \
1914   .index = xindex, \
1915   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1916   .info = snd_hdsp_info_autosync_sample_rate, \
1917   .get = snd_hdsp_get_autosync_sample_rate \
1918 }
1919
1920 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1921 {
1922         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1923         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1924         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1925         uinfo->count = 1;
1926         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
1927         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1928                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1929         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1930         return 0;
1931 }
1932
1933 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1934 {
1935         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1936
1937         switch (hdsp_external_sample_rate(hdsp)) {
1938         case 32000:
1939                 ucontrol->value.enumerated.item[0] = 0;
1940                 break;
1941         case 44100:
1942                 ucontrol->value.enumerated.item[0] = 1;
1943                 break;
1944         case 48000:
1945                 ucontrol->value.enumerated.item[0] = 2;
1946                 break;
1947         case 64000:
1948                 ucontrol->value.enumerated.item[0] = 3;
1949                 break;
1950         case 88200:
1951                 ucontrol->value.enumerated.item[0] = 4;
1952                 break;
1953         case 96000:
1954                 ucontrol->value.enumerated.item[0] = 5;
1955                 break;
1956         case 128000:
1957                 ucontrol->value.enumerated.item[0] = 7;
1958                 break;
1959         case 176400:
1960                 ucontrol->value.enumerated.item[0] = 8;
1961                 break;
1962         case 192000:
1963                 ucontrol->value.enumerated.item[0] = 9;
1964                 break;
1965         default:
1966                 ucontrol->value.enumerated.item[0] = 6;
1967         }
1968         return 0;
1969 }
1970
1971 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1972 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1973   .name = xname, \
1974   .index = xindex, \
1975   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1976   .info = snd_hdsp_info_system_clock_mode, \
1977   .get = snd_hdsp_get_system_clock_mode \
1978 }
1979
1980 static int hdsp_system_clock_mode(struct hdsp *hdsp)
1981 {
1982         if (hdsp->control_register & HDSP_ClockModeMaster)
1983                 return 0;
1984         else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate)
1985                         return 0;
1986         return 1;
1987 }
1988
1989 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1990 {
1991         static char *texts[] = {"Master", "Slave" };
1992
1993         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1994         uinfo->count = 1;
1995         uinfo->value.enumerated.items = 2;
1996         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1997                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1998         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1999         return 0;
2000 }
2001
2002 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2003 {
2004         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2005
2006         ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
2007         return 0;
2008 }
2009
2010 #define HDSP_CLOCK_SOURCE(xname, xindex) \
2011 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2012   .name = xname, \
2013   .index = xindex, \
2014   .info = snd_hdsp_info_clock_source, \
2015   .get = snd_hdsp_get_clock_source, \
2016   .put = snd_hdsp_put_clock_source \
2017 }
2018
2019 static int hdsp_clock_source(struct hdsp *hdsp)
2020 {
2021         if (hdsp->control_register & HDSP_ClockModeMaster) {
2022                 switch (hdsp->system_sample_rate) {
2023                 case 32000:
2024                         return 1;
2025                 case 44100:
2026                         return 2;
2027                 case 48000:
2028                         return 3;
2029                 case 64000:
2030                         return 4;
2031                 case 88200:
2032                         return 5;
2033                 case 96000:
2034                         return 6;
2035                 case 128000:
2036                         return 7;
2037                 case 176400:
2038                         return 8;
2039                 case 192000:
2040                         return 9;
2041                 default:
2042                         return 3;
2043                 }
2044         } else {
2045                 return 0;
2046         }
2047 }
2048
2049 static int hdsp_set_clock_source(struct hdsp *hdsp, int mode)
2050 {
2051         int rate;
2052         switch (mode) {
2053         case HDSP_CLOCK_SOURCE_AUTOSYNC:
2054                 if (hdsp_external_sample_rate(hdsp) != 0) {
2055                     if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
2056                         hdsp->control_register &= ~HDSP_ClockModeMaster;
2057                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2058                         return 0;
2059                     }
2060                 }
2061                 return -1;
2062         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
2063                 rate = 32000;
2064                 break;
2065         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2066                 rate = 44100;
2067                 break;
2068         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
2069                 rate = 48000;
2070                 break;
2071         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
2072                 rate = 64000;
2073                 break;
2074         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2075                 rate = 88200;
2076                 break;
2077         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
2078                 rate = 96000;
2079                 break;
2080         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
2081                 rate = 128000;
2082                 break;
2083         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
2084                 rate = 176400;
2085                 break;
2086         case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
2087                 rate = 192000;
2088                 break;
2089         default:
2090                 rate = 48000;
2091         }
2092         hdsp->control_register |= HDSP_ClockModeMaster;
2093         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2094         hdsp_set_rate(hdsp, rate, 1);
2095         return 0;
2096 }
2097
2098 static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2099 {
2100         static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2101         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2102
2103         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2104         uinfo->count = 1;
2105         if (hdsp->io_type == H9632)
2106             uinfo->value.enumerated.items = 10;
2107         else
2108             uinfo->value.enumerated.items = 7;
2109         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2110                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2111         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2112         return 0;
2113 }
2114
2115 static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2116 {
2117         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2118
2119         ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2120         return 0;
2121 }
2122
2123 static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2124 {
2125         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2126         int change;
2127         int val;
2128
2129         if (!snd_hdsp_use_is_exclusive(hdsp))
2130                 return -EBUSY;
2131         val = ucontrol->value.enumerated.item[0];
2132         if (val < 0) val = 0;
2133         if (hdsp->io_type == H9632) {
2134                 if (val > 9)
2135                         val = 9;
2136         } else {
2137                 if (val > 6)
2138                         val = 6;
2139         }
2140         spin_lock_irq(&hdsp->lock);
2141         if (val != hdsp_clock_source(hdsp))
2142                 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2143         else
2144                 change = 0;
2145         spin_unlock_irq(&hdsp->lock);
2146         return change;
2147 }
2148
2149 #define snd_hdsp_info_clock_source_lock         snd_ctl_boolean_mono_info
2150
2151 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2152 {
2153         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2154
2155         ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2156         return 0;
2157 }
2158
2159 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2160 {
2161         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2162         int change;
2163
2164         change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2165         if (change)
2166                 hdsp->clock_source_locked = !!ucontrol->value.integer.value[0];
2167         return change;
2168 }
2169
2170 #define HDSP_DA_GAIN(xname, xindex) \
2171 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2172   .name = xname, \
2173   .index = xindex, \
2174   .info = snd_hdsp_info_da_gain, \
2175   .get = snd_hdsp_get_da_gain, \
2176   .put = snd_hdsp_put_da_gain \
2177 }
2178
2179 static int hdsp_da_gain(struct hdsp *hdsp)
2180 {
2181         switch (hdsp->control_register & HDSP_DAGainMask) {
2182         case HDSP_DAGainHighGain:
2183                 return 0;
2184         case HDSP_DAGainPlus4dBu:
2185                 return 1;
2186         case HDSP_DAGainMinus10dBV:
2187                 return 2;
2188         default:
2189                 return 1;
2190         }
2191 }
2192
2193 static int hdsp_set_da_gain(struct hdsp *hdsp, int mode)
2194 {
2195         hdsp->control_register &= ~HDSP_DAGainMask;
2196         switch (mode) {
2197         case 0:
2198                 hdsp->control_register |= HDSP_DAGainHighGain;
2199                 break;
2200         case 1:
2201                 hdsp->control_register |= HDSP_DAGainPlus4dBu;
2202                 break;
2203         case 2:
2204                 hdsp->control_register |= HDSP_DAGainMinus10dBV;
2205                 break;
2206         default:
2207                 return -1;
2208
2209         }
2210         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2211         return 0;
2212 }
2213
2214 static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2215 {
2216         static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2217
2218         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2219         uinfo->count = 1;
2220         uinfo->value.enumerated.items = 3;
2221         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2222                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2223         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2224         return 0;
2225 }
2226
2227 static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2228 {
2229         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2230
2231         ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2232         return 0;
2233 }
2234
2235 static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2236 {
2237         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2238         int change;
2239         int val;
2240
2241         if (!snd_hdsp_use_is_exclusive(hdsp))
2242                 return -EBUSY;
2243         val = ucontrol->value.enumerated.item[0];
2244         if (val < 0) val = 0;
2245         if (val > 2) val = 2;
2246         spin_lock_irq(&hdsp->lock);
2247         if (val != hdsp_da_gain(hdsp))
2248                 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2249         else
2250                 change = 0;
2251         spin_unlock_irq(&hdsp->lock);
2252         return change;
2253 }
2254
2255 #define HDSP_AD_GAIN(xname, xindex) \
2256 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2257   .name = xname, \
2258   .index = xindex, \
2259   .info = snd_hdsp_info_ad_gain, \
2260   .get = snd_hdsp_get_ad_gain, \
2261   .put = snd_hdsp_put_ad_gain \
2262 }
2263
2264 static int hdsp_ad_gain(struct hdsp *hdsp)
2265 {
2266         switch (hdsp->control_register & HDSP_ADGainMask) {
2267         case HDSP_ADGainMinus10dBV:
2268                 return 0;
2269         case HDSP_ADGainPlus4dBu:
2270                 return 1;
2271         case HDSP_ADGainLowGain:
2272                 return 2;
2273         default:
2274                 return 1;
2275         }
2276 }
2277
2278 static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode)
2279 {
2280         hdsp->control_register &= ~HDSP_ADGainMask;
2281         switch (mode) {
2282         case 0:
2283                 hdsp->control_register |= HDSP_ADGainMinus10dBV;
2284                 break;
2285         case 1:
2286                 hdsp->control_register |= HDSP_ADGainPlus4dBu;
2287                 break;
2288         case 2:
2289                 hdsp->control_register |= HDSP_ADGainLowGain;
2290                 break;
2291         default:
2292                 return -1;
2293
2294         }
2295         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2296         return 0;
2297 }
2298
2299 static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2300 {
2301         static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2302
2303         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2304         uinfo->count = 1;
2305         uinfo->value.enumerated.items = 3;
2306         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2307                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2308         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2309         return 0;
2310 }
2311
2312 static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2313 {
2314         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2315
2316         ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2317         return 0;
2318 }
2319
2320 static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2321 {
2322         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2323         int change;
2324         int val;
2325
2326         if (!snd_hdsp_use_is_exclusive(hdsp))
2327                 return -EBUSY;
2328         val = ucontrol->value.enumerated.item[0];
2329         if (val < 0) val = 0;
2330         if (val > 2) val = 2;
2331         spin_lock_irq(&hdsp->lock);
2332         if (val != hdsp_ad_gain(hdsp))
2333                 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2334         else
2335                 change = 0;
2336         spin_unlock_irq(&hdsp->lock);
2337         return change;
2338 }
2339
2340 #define HDSP_PHONE_GAIN(xname, xindex) \
2341 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2342   .name = xname, \
2343   .index = xindex, \
2344   .info = snd_hdsp_info_phone_gain, \
2345   .get = snd_hdsp_get_phone_gain, \
2346   .put = snd_hdsp_put_phone_gain \
2347 }
2348
2349 static int hdsp_phone_gain(struct hdsp *hdsp)
2350 {
2351         switch (hdsp->control_register & HDSP_PhoneGainMask) {
2352         case HDSP_PhoneGain0dB:
2353                 return 0;
2354         case HDSP_PhoneGainMinus6dB:
2355                 return 1;
2356         case HDSP_PhoneGainMinus12dB:
2357                 return 2;
2358         default:
2359                 return 0;
2360         }
2361 }
2362
2363 static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode)
2364 {
2365         hdsp->control_register &= ~HDSP_PhoneGainMask;
2366         switch (mode) {
2367         case 0:
2368                 hdsp->control_register |= HDSP_PhoneGain0dB;
2369                 break;
2370         case 1:
2371                 hdsp->control_register |= HDSP_PhoneGainMinus6dB;
2372                 break;
2373         case 2:
2374                 hdsp->control_register |= HDSP_PhoneGainMinus12dB;
2375                 break;
2376         default:
2377                 return -1;
2378
2379         }
2380         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2381         return 0;
2382 }
2383
2384 static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2385 {
2386         static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
2387
2388         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2389         uinfo->count = 1;
2390         uinfo->value.enumerated.items = 3;
2391         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2392                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2393         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2394         return 0;
2395 }
2396
2397 static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2398 {
2399         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2400
2401         ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2402         return 0;
2403 }
2404
2405 static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2406 {
2407         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2408         int change;
2409         int val;
2410
2411         if (!snd_hdsp_use_is_exclusive(hdsp))
2412                 return -EBUSY;
2413         val = ucontrol->value.enumerated.item[0];
2414         if (val < 0) val = 0;
2415         if (val > 2) val = 2;
2416         spin_lock_irq(&hdsp->lock);
2417         if (val != hdsp_phone_gain(hdsp))
2418                 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2419         else
2420                 change = 0;
2421         spin_unlock_irq(&hdsp->lock);
2422         return change;
2423 }
2424
2425 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2426 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2427   .name = xname, \
2428   .index = xindex, \
2429   .info = snd_hdsp_info_xlr_breakout_cable, \
2430   .get = snd_hdsp_get_xlr_breakout_cable, \
2431   .put = snd_hdsp_put_xlr_breakout_cable \
2432 }
2433
2434 static int hdsp_xlr_breakout_cable(struct hdsp *hdsp)
2435 {
2436         if (hdsp->control_register & HDSP_XLRBreakoutCable)
2437                 return 1;
2438         return 0;
2439 }
2440
2441 static int hdsp_set_xlr_breakout_cable(struct hdsp *hdsp, int mode)
2442 {
2443         if (mode)
2444                 hdsp->control_register |= HDSP_XLRBreakoutCable;
2445         else
2446                 hdsp->control_register &= ~HDSP_XLRBreakoutCable;
2447         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2448         return 0;
2449 }
2450
2451 #define snd_hdsp_info_xlr_breakout_cable        snd_ctl_boolean_mono_info
2452
2453 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2454 {
2455         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2456
2457         ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp);
2458         return 0;
2459 }
2460
2461 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2462 {
2463         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2464         int change;
2465         int val;
2466
2467         if (!snd_hdsp_use_is_exclusive(hdsp))
2468                 return -EBUSY;
2469         val = ucontrol->value.integer.value[0] & 1;
2470         spin_lock_irq(&hdsp->lock);
2471         change = (int)val != hdsp_xlr_breakout_cable(hdsp);
2472         hdsp_set_xlr_breakout_cable(hdsp, val);
2473         spin_unlock_irq(&hdsp->lock);
2474         return change;
2475 }
2476
2477 /* (De)activates old RME Analog Extension Board
2478    These are connected to the internal ADAT connector
2479    Switching this on desactivates external ADAT
2480 */
2481 #define HDSP_AEB(xname, xindex) \
2482 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2483   .name = xname, \
2484   .index = xindex, \
2485   .info = snd_hdsp_info_aeb, \
2486   .get = snd_hdsp_get_aeb, \
2487   .put = snd_hdsp_put_aeb \
2488 }
2489
2490 static int hdsp_aeb(struct hdsp *hdsp)
2491 {
2492         if (hdsp->control_register & HDSP_AnalogExtensionBoard)
2493                 return 1;
2494         return 0;
2495 }
2496
2497 static int hdsp_set_aeb(struct hdsp *hdsp, int mode)
2498 {
2499         if (mode)
2500                 hdsp->control_register |= HDSP_AnalogExtensionBoard;
2501         else
2502                 hdsp->control_register &= ~HDSP_AnalogExtensionBoard;
2503         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2504         return 0;
2505 }
2506
2507 #define snd_hdsp_info_aeb               snd_ctl_boolean_mono_info
2508
2509 static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2510 {
2511         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2512
2513         ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp);
2514         return 0;
2515 }
2516
2517 static int snd_hdsp_put_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2518 {
2519         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2520         int change;
2521         int val;
2522
2523         if (!snd_hdsp_use_is_exclusive(hdsp))
2524                 return -EBUSY;
2525         val = ucontrol->value.integer.value[0] & 1;
2526         spin_lock_irq(&hdsp->lock);
2527         change = (int)val != hdsp_aeb(hdsp);
2528         hdsp_set_aeb(hdsp, val);
2529         spin_unlock_irq(&hdsp->lock);
2530         return change;
2531 }
2532
2533 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2534 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2535   .name = xname, \
2536   .index = xindex, \
2537   .info = snd_hdsp_info_pref_sync_ref, \
2538   .get = snd_hdsp_get_pref_sync_ref, \
2539   .put = snd_hdsp_put_pref_sync_ref \
2540 }
2541
2542 static int hdsp_pref_sync_ref(struct hdsp *hdsp)
2543 {
2544         /* Notice that this looks at the requested sync source,
2545            not the one actually in use.
2546         */
2547
2548         switch (hdsp->control_register & HDSP_SyncRefMask) {
2549         case HDSP_SyncRef_ADAT1:
2550                 return HDSP_SYNC_FROM_ADAT1;
2551         case HDSP_SyncRef_ADAT2:
2552                 return HDSP_SYNC_FROM_ADAT2;
2553         case HDSP_SyncRef_ADAT3:
2554                 return HDSP_SYNC_FROM_ADAT3;
2555         case HDSP_SyncRef_SPDIF:
2556                 return HDSP_SYNC_FROM_SPDIF;
2557         case HDSP_SyncRef_WORD:
2558                 return HDSP_SYNC_FROM_WORD;
2559         case HDSP_SyncRef_ADAT_SYNC:
2560                 return HDSP_SYNC_FROM_ADAT_SYNC;
2561         default:
2562                 return HDSP_SYNC_FROM_WORD;
2563         }
2564         return 0;
2565 }
2566
2567 static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref)
2568 {
2569         hdsp->control_register &= ~HDSP_SyncRefMask;
2570         switch (pref) {
2571         case HDSP_SYNC_FROM_ADAT1:
2572                 hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */
2573                 break;
2574         case HDSP_SYNC_FROM_ADAT2:
2575                 hdsp->control_register |= HDSP_SyncRef_ADAT2;
2576                 break;
2577         case HDSP_SYNC_FROM_ADAT3:
2578                 hdsp->control_register |= HDSP_SyncRef_ADAT3;
2579                 break;
2580         case HDSP_SYNC_FROM_SPDIF:
2581                 hdsp->control_register |= HDSP_SyncRef_SPDIF;
2582                 break;
2583         case HDSP_SYNC_FROM_WORD:
2584                 hdsp->control_register |= HDSP_SyncRef_WORD;
2585                 break;
2586         case HDSP_SYNC_FROM_ADAT_SYNC:
2587                 hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC;
2588                 break;
2589         default:
2590                 return -1;
2591         }
2592         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2593         return 0;
2594 }
2595
2596 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2597 {
2598         static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2599         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2600
2601         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2602         uinfo->count = 1;
2603
2604         switch (hdsp->io_type) {
2605         case Digiface:
2606         case H9652:
2607                 uinfo->value.enumerated.items = 6;
2608                 break;
2609         case Multiface:
2610                 uinfo->value.enumerated.items = 4;
2611                 break;
2612         case H9632:
2613                 uinfo->value.enumerated.items = 3;
2614                 break;
2615         default:
2616                 uinfo->value.enumerated.items = 0;
2617                 break;
2618         }
2619
2620         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2621                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2622         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2623         return 0;
2624 }
2625
2626 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2627 {
2628         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2629
2630         ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2631         return 0;
2632 }
2633
2634 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2635 {
2636         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2637         int change, max;
2638         unsigned int val;
2639
2640         if (!snd_hdsp_use_is_exclusive(hdsp))
2641                 return -EBUSY;
2642
2643         switch (hdsp->io_type) {
2644         case Digiface:
2645         case H9652:
2646                 max = 6;
2647                 break;
2648         case Multiface:
2649                 max = 4;
2650                 break;
2651         case H9632:
2652                 max = 3;
2653                 break;
2654         default:
2655                 return -EIO;
2656         }
2657
2658         val = ucontrol->value.enumerated.item[0] % max;
2659         spin_lock_irq(&hdsp->lock);
2660         change = (int)val != hdsp_pref_sync_ref(hdsp);
2661         hdsp_set_pref_sync_ref(hdsp, val);
2662         spin_unlock_irq(&hdsp->lock);
2663         return change;
2664 }
2665
2666 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2667 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2668   .name = xname, \
2669   .index = xindex, \
2670   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2671   .info = snd_hdsp_info_autosync_ref, \
2672   .get = snd_hdsp_get_autosync_ref, \
2673 }
2674
2675 static int hdsp_autosync_ref(struct hdsp *hdsp)
2676 {
2677         /* This looks at the autosync selected sync reference */
2678         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
2679
2680         switch (status2 & HDSP_SelSyncRefMask) {
2681         case HDSP_SelSyncRef_WORD:
2682                 return HDSP_AUTOSYNC_FROM_WORD;
2683         case HDSP_SelSyncRef_ADAT_SYNC:
2684                 return HDSP_AUTOSYNC_FROM_ADAT_SYNC;
2685         case HDSP_SelSyncRef_SPDIF:
2686                 return HDSP_AUTOSYNC_FROM_SPDIF;
2687         case HDSP_SelSyncRefMask:
2688                 return HDSP_AUTOSYNC_FROM_NONE;
2689         case HDSP_SelSyncRef_ADAT1:
2690                 return HDSP_AUTOSYNC_FROM_ADAT1;
2691         case HDSP_SelSyncRef_ADAT2:
2692                 return HDSP_AUTOSYNC_FROM_ADAT2;
2693         case HDSP_SelSyncRef_ADAT3:
2694                 return HDSP_AUTOSYNC_FROM_ADAT3;
2695         default:
2696                 return HDSP_AUTOSYNC_FROM_WORD;
2697         }
2698         return 0;
2699 }
2700
2701 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2702 {
2703         static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2704
2705         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2706         uinfo->count = 1;
2707         uinfo->value.enumerated.items = 7;
2708         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2709                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2710         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2711         return 0;
2712 }
2713
2714 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2715 {
2716         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2717
2718         ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2719         return 0;
2720 }
2721
2722 #define HDSP_LINE_OUT(xname, xindex) \
2723 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2724   .name = xname, \
2725   .index = xindex, \
2726   .info = snd_hdsp_info_line_out, \
2727   .get = snd_hdsp_get_line_out, \
2728   .put = snd_hdsp_put_line_out \
2729 }
2730
2731 static int hdsp_line_out(struct hdsp *hdsp)
2732 {
2733         return (hdsp->control_register & HDSP_LineOut) ? 1 : 0;
2734 }
2735
2736 static int hdsp_set_line_output(struct hdsp *hdsp, int out)
2737 {
2738         if (out)
2739                 hdsp->control_register |= HDSP_LineOut;
2740         else
2741                 hdsp->control_register &= ~HDSP_LineOut;
2742         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2743         return 0;
2744 }
2745
2746 #define snd_hdsp_info_line_out          snd_ctl_boolean_mono_info
2747
2748 static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2749 {
2750         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2751
2752         spin_lock_irq(&hdsp->lock);
2753         ucontrol->value.integer.value[0] = hdsp_line_out(hdsp);
2754         spin_unlock_irq(&hdsp->lock);
2755         return 0;
2756 }
2757
2758 static int snd_hdsp_put_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2759 {
2760         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2761         int change;
2762         unsigned int val;
2763
2764         if (!snd_hdsp_use_is_exclusive(hdsp))
2765                 return -EBUSY;
2766         val = ucontrol->value.integer.value[0] & 1;
2767         spin_lock_irq(&hdsp->lock);
2768         change = (int)val != hdsp_line_out(hdsp);
2769         hdsp_set_line_output(hdsp, val);
2770         spin_unlock_irq(&hdsp->lock);
2771         return change;
2772 }
2773
2774 #define HDSP_PRECISE_POINTER(xname, xindex) \
2775 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2776   .name = xname, \
2777   .index = xindex, \
2778   .info = snd_hdsp_info_precise_pointer, \
2779   .get = snd_hdsp_get_precise_pointer, \
2780   .put = snd_hdsp_put_precise_pointer \
2781 }
2782
2783 static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise)
2784 {
2785         if (precise)
2786                 hdsp->precise_ptr = 1;
2787         else
2788                 hdsp->precise_ptr = 0;
2789         return 0;
2790 }
2791
2792 #define snd_hdsp_info_precise_pointer           snd_ctl_boolean_mono_info
2793
2794 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2795 {
2796         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2797
2798         spin_lock_irq(&hdsp->lock);
2799         ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2800         spin_unlock_irq(&hdsp->lock);
2801         return 0;
2802 }
2803
2804 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2805 {
2806         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2807         int change;
2808         unsigned int val;
2809
2810         if (!snd_hdsp_use_is_exclusive(hdsp))
2811                 return -EBUSY;
2812         val = ucontrol->value.integer.value[0] & 1;
2813         spin_lock_irq(&hdsp->lock);
2814         change = (int)val != hdsp->precise_ptr;
2815         hdsp_set_precise_pointer(hdsp, val);
2816         spin_unlock_irq(&hdsp->lock);
2817         return change;
2818 }
2819
2820 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2821 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2822   .name = xname, \
2823   .index = xindex, \
2824   .info = snd_hdsp_info_use_midi_tasklet, \
2825   .get = snd_hdsp_get_use_midi_tasklet, \
2826   .put = snd_hdsp_put_use_midi_tasklet \
2827 }
2828
2829 static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet)
2830 {
2831         if (use_tasklet)
2832                 hdsp->use_midi_tasklet = 1;
2833         else
2834                 hdsp->use_midi_tasklet = 0;
2835         return 0;
2836 }
2837
2838 #define snd_hdsp_info_use_midi_tasklet          snd_ctl_boolean_mono_info
2839
2840 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2841 {
2842         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2843
2844         spin_lock_irq(&hdsp->lock);
2845         ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
2846         spin_unlock_irq(&hdsp->lock);
2847         return 0;
2848 }
2849
2850 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2851 {
2852         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2853         int change;
2854         unsigned int val;
2855
2856         if (!snd_hdsp_use_is_exclusive(hdsp))
2857                 return -EBUSY;
2858         val = ucontrol->value.integer.value[0] & 1;
2859         spin_lock_irq(&hdsp->lock);
2860         change = (int)val != hdsp->use_midi_tasklet;
2861         hdsp_set_use_midi_tasklet(hdsp, val);
2862         spin_unlock_irq(&hdsp->lock);
2863         return change;
2864 }
2865
2866 #define HDSP_MIXER(xname, xindex) \
2867 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2868   .name = xname, \
2869   .index = xindex, \
2870   .device = 0, \
2871   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2872                  SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2873   .info = snd_hdsp_info_mixer, \
2874   .get = snd_hdsp_get_mixer, \
2875   .put = snd_hdsp_put_mixer \
2876 }
2877
2878 static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2879 {
2880         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2881         uinfo->count = 3;
2882         uinfo->value.integer.min = 0;
2883         uinfo->value.integer.max = 65536;
2884         uinfo->value.integer.step = 1;
2885         return 0;
2886 }
2887
2888 static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2889 {
2890         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2891         int source;
2892         int destination;
2893         int addr;
2894
2895         source = ucontrol->value.integer.value[0];
2896         destination = ucontrol->value.integer.value[1];
2897
2898         if (source >= hdsp->max_channels)
2899                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
2900         else
2901                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2902
2903         spin_lock_irq(&hdsp->lock);
2904         ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
2905         spin_unlock_irq(&hdsp->lock);
2906         return 0;
2907 }
2908
2909 static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2910 {
2911         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2912         int change;
2913         int source;
2914         int destination;
2915         int gain;
2916         int addr;
2917
2918         if (!snd_hdsp_use_is_exclusive(hdsp))
2919                 return -EBUSY;
2920
2921         source = ucontrol->value.integer.value[0];
2922         destination = ucontrol->value.integer.value[1];
2923
2924         if (source >= hdsp->max_channels)
2925                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination);
2926         else
2927                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2928
2929         gain = ucontrol->value.integer.value[2];
2930
2931         spin_lock_irq(&hdsp->lock);
2932         change = gain != hdsp_read_gain(hdsp, addr);
2933         if (change)
2934                 hdsp_write_gain(hdsp, addr, gain);
2935         spin_unlock_irq(&hdsp->lock);
2936         return change;
2937 }
2938
2939 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2940 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2941   .name = xname, \
2942   .index = xindex, \
2943   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2944   .info = snd_hdsp_info_sync_check, \
2945   .get = snd_hdsp_get_wc_sync_check \
2946 }
2947
2948 static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2949 {
2950         static char *texts[] = {"No Lock", "Lock", "Sync" };
2951         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2952         uinfo->count = 1;
2953         uinfo->value.enumerated.items = 3;
2954         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2955                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2956         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2957         return 0;
2958 }
2959
2960 static int hdsp_wc_sync_check(struct hdsp *hdsp)
2961 {
2962         int status2 = hdsp_read(hdsp, HDSP_status2Register);
2963         if (status2 & HDSP_wc_lock) {
2964                 if (status2 & HDSP_wc_sync)
2965                         return 2;
2966                 else
2967                          return 1;
2968         } else
2969                 return 0;
2970         return 0;
2971 }
2972
2973 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2974 {
2975         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2976
2977         ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
2978         return 0;
2979 }
2980
2981 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
2982 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2983   .name = xname, \
2984   .index = xindex, \
2985   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2986   .info = snd_hdsp_info_sync_check, \
2987   .get = snd_hdsp_get_spdif_sync_check \
2988 }
2989
2990 static int hdsp_spdif_sync_check(struct hdsp *hdsp)
2991 {
2992         int status = hdsp_read(hdsp, HDSP_statusRegister);
2993         if (status & HDSP_SPDIFErrorFlag)
2994                 return 0;
2995         else {
2996                 if (status & HDSP_SPDIFSync)
2997                         return 2;
2998                 else
2999                         return 1;
3000         }
3001         return 0;
3002 }
3003
3004 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3005 {
3006         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3007
3008         ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
3009         return 0;
3010 }
3011
3012 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
3013 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3014   .name = xname, \
3015   .index = xindex, \
3016   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3017   .info = snd_hdsp_info_sync_check, \
3018   .get = snd_hdsp_get_adatsync_sync_check \
3019 }
3020
3021 static int hdsp_adatsync_sync_check(struct hdsp *hdsp)
3022 {
3023         int status = hdsp_read(hdsp, HDSP_statusRegister);
3024         if (status & HDSP_TimecodeLock) {
3025                 if (status & HDSP_TimecodeSync)
3026                         return 2;
3027                 else
3028                         return 1;
3029         } else
3030                 return 0;
3031 }
3032
3033 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3034 {
3035         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3036
3037         ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
3038         return 0;
3039 }
3040
3041 #define HDSP_ADAT_SYNC_CHECK \
3042 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3043   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3044   .info = snd_hdsp_info_sync_check, \
3045   .get = snd_hdsp_get_adat_sync_check \
3046 }
3047
3048 static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
3049 {
3050         int status = hdsp_read(hdsp, HDSP_statusRegister);
3051
3052         if (status & (HDSP_Lock0>>idx)) {
3053                 if (status & (HDSP_Sync0>>idx))
3054                         return 2;
3055                 else
3056                         return 1;
3057         } else
3058                 return 0;
3059 }
3060
3061 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3062 {
3063         int offset;
3064         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3065
3066         offset = ucontrol->id.index - 1;
3067         snd_BUG_ON(offset < 0);
3068
3069         switch (hdsp->io_type) {
3070         case Digiface:
3071         case H9652:
3072                 if (offset >= 3)
3073                         return -EINVAL;
3074                 break;
3075         case Multiface:
3076         case H9632:
3077                 if (offset >= 1)
3078                         return -EINVAL;
3079                 break;
3080         default:
3081                 return -EIO;
3082         }
3083
3084         ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
3085         return 0;
3086 }
3087
3088 #define HDSP_DDS_OFFSET(xname, xindex) \
3089 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3090   .name = xname, \
3091   .index = xindex, \
3092   .info = snd_hdsp_info_dds_offset, \
3093   .get = snd_hdsp_get_dds_offset, \
3094   .put = snd_hdsp_put_dds_offset \
3095 }
3096
3097 static int hdsp_dds_offset(struct hdsp *hdsp)
3098 {
3099         u64 n;
3100         u32 r;
3101         unsigned int dds_value = hdsp->dds_value;
3102         int system_sample_rate = hdsp->system_sample_rate;
3103
3104         if (!dds_value)
3105                 return 0;
3106
3107         n = DDS_NUMERATOR;
3108         /*
3109          * dds_value = n / rate
3110          * rate = n / dds_value
3111          */
3112         div64_32(&n, dds_value, &r);
3113         if (system_sample_rate >= 112000)
3114                 n *= 4;
3115         else if (system_sample_rate >= 56000)
3116                 n *= 2;
3117         return ((int)n) - system_sample_rate;
3118 }
3119
3120 static int hdsp_set_dds_offset(struct hdsp *hdsp, int offset_hz)
3121 {
3122         int rate = hdsp->system_sample_rate + offset_hz;
3123         hdsp_set_dds_value(hdsp, rate);
3124         return 0;
3125 }
3126
3127 static int snd_hdsp_info_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3128 {
3129         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3130         uinfo->count = 1;
3131         uinfo->value.integer.min = -5000;
3132         uinfo->value.integer.max = 5000;
3133         return 0;
3134 }
3135
3136 static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3137 {
3138         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3139
3140         ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp);
3141         return 0;
3142 }
3143
3144 static int snd_hdsp_put_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3145 {
3146         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3147         int change;
3148         int val;
3149
3150         if (!snd_hdsp_use_is_exclusive(hdsp))
3151                 return -EBUSY;
3152         val = ucontrol->value.enumerated.item[0];
3153         spin_lock_irq(&hdsp->lock);
3154         if (val != hdsp_dds_offset(hdsp))
3155                 change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0;
3156         else
3157                 change = 0;
3158         spin_unlock_irq(&hdsp->lock);
3159         return change;
3160 }
3161
3162 static struct snd_kcontrol_new snd_hdsp_9632_controls[] = {
3163 HDSP_DA_GAIN("DA Gain", 0),
3164 HDSP_AD_GAIN("AD Gain", 0),
3165 HDSP_PHONE_GAIN("Phones Gain", 0),
3166 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0),
3167 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
3168 };
3169
3170 static struct snd_kcontrol_new snd_hdsp_controls[] = {
3171 {
3172         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3173         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
3174         .info =         snd_hdsp_control_spdif_info,
3175         .get =          snd_hdsp_control_spdif_get,
3176         .put =          snd_hdsp_control_spdif_put,
3177 },
3178 {
3179         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
3180         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3181         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
3182         .info =         snd_hdsp_control_spdif_stream_info,
3183         .get =          snd_hdsp_control_spdif_stream_get,
3184         .put =          snd_hdsp_control_spdif_stream_put,
3185 },
3186 {
3187         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3188         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3189         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
3190         .info =         snd_hdsp_control_spdif_mask_info,
3191         .get =          snd_hdsp_control_spdif_mask_get,
3192         .private_value = IEC958_AES0_NONAUDIO |
3193                          IEC958_AES0_PROFESSIONAL |
3194                          IEC958_AES0_CON_EMPHASIS,
3195 },
3196 {
3197         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3198         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3199         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
3200         .info =         snd_hdsp_control_spdif_mask_info,
3201         .get =          snd_hdsp_control_spdif_mask_get,
3202         .private_value = IEC958_AES0_NONAUDIO |
3203                          IEC958_AES0_PROFESSIONAL |
3204                          IEC958_AES0_PRO_EMPHASIS,
3205 },
3206 HDSP_MIXER("Mixer", 0),
3207 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3208 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3209 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3210 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3211 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3212 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3213 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3214 {
3215         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3216         .name = "Sample Clock Source Locking",
3217         .info = snd_hdsp_info_clock_source_lock,
3218         .get = snd_hdsp_get_clock_source_lock,
3219         .put = snd_hdsp_put_clock_source_lock,
3220 },
3221 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3222 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3223 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3224 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3225 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3226 /* 'External Rate' complies with the alsa control naming scheme */
3227 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3228 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3229 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3230 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3231 HDSP_LINE_OUT("Line Out", 0),
3232 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3233 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3234 };
3235
3236 static struct snd_kcontrol_new snd_hdsp_96xx_aeb = HDSP_AEB("Analog Extension Board", 0);
3237 static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK;
3238
3239 static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp)
3240 {
3241         unsigned int idx;
3242         int err;
3243         struct snd_kcontrol *kctl;
3244
3245         for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3246                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
3247                         return err;
3248                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
3249                         hdsp->spdif_ctl = kctl;
3250         }
3251
3252         /* ADAT SyncCheck status */
3253         snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
3254         snd_hdsp_adat_sync_check.index = 1;
3255         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3256                 return err;
3257         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
3258                 for (idx = 1; idx < 3; ++idx) {
3259                         snd_hdsp_adat_sync_check.index = idx+1;
3260                         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3261                                 return err;
3262                 }
3263         }
3264
3265         /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3266         if (hdsp->io_type == H9632) {
3267                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3268                         if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0)
3269                                 return err;
3270                 }
3271         }
3272
3273         /* AEB control for H96xx card */
3274         if (hdsp->io_type == H9632 || hdsp->io_type == H9652) {
3275                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0)
3276                                 return err;
3277         }
3278
3279         return 0;
3280 }
3281
3282 /*------------------------------------------------------------
3283    /proc interface
3284  ------------------------------------------------------------*/
3285
3286 static void
3287 snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
3288 {
3289         struct hdsp *hdsp = (struct hdsp *) entry->private_data;
3290         unsigned int status;
3291         unsigned int status2;
3292         char *pref_sync_ref;
3293         char *autosync_ref;
3294         char *system_clock_mode;
3295         char *clock_source;
3296         int x;
3297
3298         if (hdsp_check_for_iobox (hdsp)) {
3299                 snd_iprintf(buffer, "No I/O box connected.\nPlease connect one and upload firmware.\n");
3300                 return;
3301         }
3302
3303         if (hdsp_check_for_firmware(hdsp, 0)) {
3304                 if (hdsp->state & HDSP_FirmwareCached) {
3305                         if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3306                                 snd_iprintf(buffer, "Firmware loading from cache failed, please upload manually.\n");
3307                                 return;
3308                         }
3309                 } else {
3310                         int err = -EINVAL;
3311 #ifdef HDSP_FW_LOADER
3312                         err = hdsp_request_fw_loader(hdsp);
3313 #endif
3314                         if (err < 0) {
3315                                 snd_iprintf(buffer,
3316                                             "No firmware loaded nor cached, "
3317                                             "please upload firmware.\n");
3318                                 return;
3319                         }
3320                 }
3321         }
3322
3323         status = hdsp_read(hdsp, HDSP_statusRegister);
3324         status2 = hdsp_read(hdsp, HDSP_status2Register);
3325
3326         snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name, hdsp->card->number + 1);
3327         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
3328                     hdsp->capture_buffer, hdsp->playback_buffer);
3329         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3330                     hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase);
3331         snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3332         snd_iprintf(buffer, "Control2 register: 0x%x\n", hdsp->control2_register);
3333         snd_iprintf(buffer, "Status register: 0x%x\n", status);
3334         snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3335         snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3336         snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3337         snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3338         snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3339         snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3340         snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off");
3341
3342         snd_iprintf(buffer, "\n");
3343
3344         x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask));
3345
3346         snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes);
3347         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp));
3348         snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off");
3349         snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off");
3350
3351         snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2);
3352
3353         snd_iprintf(buffer, "\n");
3354
3355
3356         switch (hdsp_clock_source(hdsp)) {
3357         case HDSP_CLOCK_SOURCE_AUTOSYNC:
3358                 clock_source = "AutoSync";
3359                 break;
3360         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
3361                 clock_source = "Internal 32 kHz";
3362                 break;
3363         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3364                 clock_source = "Internal 44.1 kHz";
3365                 break;
3366         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
3367                 clock_source = "Internal 48 kHz";
3368                 break;
3369         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
3370                 clock_source = "Internal 64 kHz";
3371                 break;
3372         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3373                 clock_source = "Internal 88.2 kHz";
3374                 break;
3375         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
3376                 clock_source = "Internal 96 kHz";
3377                 break;
3378         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
3379                 clock_source = "Internal 128 kHz";
3380                 break;
3381         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3382                 clock_source = "Internal 176.4 kHz";
3383                 break;
3384                 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
3385                 clock_source = "Internal 192 kHz";
3386                 break;
3387         default:
3388                 clock_source = "Error";
3389         }
3390         snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
3391
3392         if (hdsp_system_clock_mode(hdsp))
3393                 system_clock_mode = "Slave";
3394         else
3395                 system_clock_mode = "Master";
3396
3397         switch (hdsp_pref_sync_ref (hdsp)) {
3398         case HDSP_SYNC_FROM_WORD:
3399                 pref_sync_ref = "Word Clock";
3400                 break;
3401         case HDSP_SYNC_FROM_ADAT_SYNC:
3402                 pref_sync_ref = "ADAT Sync";
3403                 break;
3404         case HDSP_SYNC_FROM_SPDIF:
3405                 pref_sync_ref = "SPDIF";
3406                 break;
3407         case HDSP_SYNC_FROM_ADAT1:
3408                 pref_sync_ref = "ADAT1";
3409                 break;
3410         case HDSP_SYNC_FROM_ADAT2:
3411                 pref_sync_ref = "ADAT2";
3412                 break;
3413         case HDSP_SYNC_FROM_ADAT3:
3414                 pref_sync_ref = "ADAT3";
3415                 break;
3416         default:
3417                 pref_sync_ref = "Word Clock";
3418                 break;
3419         }
3420         snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
3421
3422         switch (hdsp_autosync_ref (hdsp)) {
3423         case HDSP_AUTOSYNC_FROM_WORD:
3424                 autosync_ref = "Word Clock";
3425                 break;
3426         case HDSP_AUTOSYNC_FROM_ADAT_SYNC:
3427                 autosync_ref = "ADAT Sync";
3428                 break;
3429         case HDSP_AUTOSYNC_FROM_SPDIF:
3430                 autosync_ref = "SPDIF";
3431                 break;
3432         case HDSP_AUTOSYNC_FROM_NONE:
3433                 autosync_ref = "None";
3434                 break;
3435         case HDSP_AUTOSYNC_FROM_ADAT1:
3436                 autosync_ref = "ADAT1";
3437                 break;
3438         case HDSP_AUTOSYNC_FROM_ADAT2:
3439                 autosync_ref = "ADAT2";
3440                 break;
3441         case HDSP_AUTOSYNC_FROM_ADAT3:
3442                 autosync_ref = "ADAT3";
3443                 break;
3444         default:
3445                 autosync_ref = "---";
3446                 break;
3447         }
3448         snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
3449
3450         snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
3451
3452         snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
3453
3454         snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
3455         snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
3456
3457         snd_iprintf(buffer, "\n");
3458
3459         switch (hdsp_spdif_in(hdsp)) {
3460         case HDSP_SPDIFIN_OPTICAL:
3461                 snd_iprintf(buffer, "IEC958 input: Optical\n");
3462                 break;
3463         case HDSP_SPDIFIN_COAXIAL:
3464                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
3465                 break;
3466         case HDSP_SPDIFIN_INTERNAL:
3467                 snd_iprintf(buffer, "IEC958 input: Internal\n");
3468                 break;
3469         case HDSP_SPDIFIN_AES:
3470                 snd_iprintf(buffer, "IEC958 input: AES\n");
3471                 break;
3472         default:
3473                 snd_iprintf(buffer, "IEC958 input: ???\n");
3474                 break;
3475         }
3476
3477         if (hdsp->control_register & HDSP_SPDIFOpticalOut)
3478                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
3479         else
3480                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
3481
3482         if (hdsp->control_register & HDSP_SPDIFProfessional)
3483                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
3484         else
3485                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
3486
3487         if (hdsp->control_register & HDSP_SPDIFEmphasis)
3488                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
3489         else
3490                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
3491
3492         if (hdsp->control_register & HDSP_SPDIFNonAudio)
3493                 snd_iprintf(buffer, "IEC958 NonAudio: on\n");
3494         else
3495                 snd_iprintf(buffer, "IEC958 NonAudio: off\n");
3496         if ((x = hdsp_spdif_sample_rate (hdsp)) != 0)
3497                 snd_iprintf (buffer, "IEC958 sample rate: %d\n", x);
3498         else
3499                 snd_iprintf (buffer, "IEC958 sample rate: Error flag set\n");
3500
3501         snd_iprintf(buffer, "\n");
3502
3503         /* Sync Check */
3504         x = status & HDSP_Sync0;
3505         if (status & HDSP_Lock0)
3506                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
3507         else
3508                 snd_iprintf(buffer, "ADAT1: No Lock\n");
3509
3510         switch (hdsp->io_type) {
3511         case Digiface:
3512         case H9652:
3513                 x = status & HDSP_Sync1;
3514                 if (status & HDSP_Lock1)
3515                         snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
3516                 else
3517                         snd_iprintf(buffer, "ADAT2: No Lock\n");
3518                 x = status & HDSP_Sync2;
3519                 if (status & HDSP_Lock2)
3520                         snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
3521                 else
3522                         snd_iprintf(buffer, "ADAT3: No Lock\n");
3523                 break;
3524         default:
3525                 /* relax */
3526                 break;
3527         }
3528
3529         x = status & HDSP_SPDIFSync;
3530         if (status & HDSP_SPDIFErrorFlag)
3531                 snd_iprintf (buffer, "SPDIF: No Lock\n");
3532         else
3533                 snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
3534
3535         x = status2 & HDSP_wc_sync;
3536         if (status2 & HDSP_wc_lock)
3537                 snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
3538         else
3539                 snd_iprintf (buffer, "Word Clock: No Lock\n");
3540
3541         x = status & HDSP_TimecodeSync;
3542         if (status & HDSP_TimecodeLock)
3543                 snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
3544         else
3545                 snd_iprintf(buffer, "ADAT Sync: No Lock\n");
3546
3547         snd_iprintf(buffer, "\n");
3548
3549         /* Informations about H9632 specific controls */
3550         if (hdsp->io_type == H9632) {
3551                 char *tmp;
3552
3553                 switch (hdsp_ad_gain(hdsp)) {
3554                 case 0:
3555                         tmp = "-10 dBV";
3556                         break;
3557                 case 1:
3558                         tmp = "+4 dBu";
3559                         break;
3560                 default:
3561                         tmp = "Lo Gain";
3562                         break;
3563                 }
3564                 snd_iprintf(buffer, "AD Gain : %s\n", tmp);
3565
3566                 switch (hdsp_da_gain(hdsp)) {
3567                 case 0:
3568                         tmp = "Hi Gain";
3569                         break;
3570                 case 1:
3571                         tmp = "+4 dBu";
3572                         break;
3573                 default:
3574                         tmp = "-10 dBV";
3575                         break;
3576                 }
3577                 snd_iprintf(buffer, "DA Gain : %s\n", tmp);
3578
3579                 switch (hdsp_phone_gain(hdsp)) {
3580                 case 0:
3581                         tmp = "0 dB";
3582                         break;
3583                 case 1:
3584                         tmp = "-6 dB";
3585                         break;
3586                 default:
3587                         tmp = "-12 dB";
3588                         break;
3589                 }
3590                 snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
3591
3592                 snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
3593
3594                 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
3595                         snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
3596                 else
3597                         snd_iprintf(buffer, "AEB : off (ADAT1 external)\n");
3598                 snd_iprintf(buffer, "\n");
3599         }
3600
3601 }
3602
3603 static void snd_hdsp_proc_init(struct hdsp *hdsp)
3604 {
3605         struct snd_info_entry *entry;
3606
3607         if (! snd_card_proc_new(hdsp->card, "hdsp", &entry))
3608                 snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read);
3609 }
3610
3611 static void snd_hdsp_free_buffers(struct hdsp *hdsp)
3612 {
3613         snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci);
3614         snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci);
3615 }
3616
3617 static int __devinit snd_hdsp_initialize_memory(struct hdsp *hdsp)
3618 {
3619         unsigned long pb_bus, cb_bus;
3620
3621         if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 ||
3622             snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) {
3623                 if (hdsp->capture_dma_buf.area)
3624                         snd_dma_free_pages(&hdsp->capture_dma_buf);
3625                 printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
3626                 return -ENOMEM;
3627         }
3628
3629         /* Align to bus-space 64K boundary */
3630
3631         cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul);
3632         pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul);
3633
3634         /* Tell the card where it is */
3635
3636         hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus);
3637         hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus);
3638
3639         hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr);
3640         hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr);
3641
3642         return 0;
3643 }
3644
3645 static int snd_hdsp_set_defaults(struct hdsp *hdsp)
3646 {
3647         unsigned int i;
3648
3649         /* ASSUMPTION: hdsp->lock is either held, or
3650            there is no need to hold it (e.g. during module
3651            initialization).
3652          */
3653
3654         /* set defaults:
3655
3656            SPDIF Input via Coax
3657            Master clock mode
3658            maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
3659                             which implies 2 4096 sample, 32Kbyte periods).
3660            Enable line out.
3661          */
3662
3663         hdsp->control_register = HDSP_ClockModeMaster |
3664                                  HDSP_SPDIFInputCoaxial |
3665                                  hdsp_encode_latency(7) |
3666                                  HDSP_LineOut;
3667
3668
3669         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3670
3671 #ifdef SNDRV_BIG_ENDIAN
3672         hdsp->control2_register = HDSP_BIGENDIAN_MODE;
3673 #else
3674         hdsp->control2_register = 0;
3675 #endif
3676         if (hdsp->io_type == H9652)
3677                 snd_hdsp_9652_enable_mixer (hdsp);
3678         else
3679                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
3680
3681         hdsp_reset_hw_pointer(hdsp);
3682         hdsp_compute_period_size(hdsp);
3683
3684         /* silence everything */
3685
3686         for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
3687                 hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
3688
3689         for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
3690                 if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
3691                         return -EIO;
3692         }
3693
3694         /* H9632 specific defaults */
3695         if (hdsp->io_type == H9632) {
3696                 hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
3697                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3698         }
3699
3700         /* set a default rate so that the channel map is set up.
3701          */
3702
3703         hdsp_set_rate(hdsp, 48000, 1);
3704
3705         return 0;
3706 }
3707
3708 static void hdsp_midi_tasklet(unsigned long arg)
3709 {
3710         struct hdsp *hdsp = (struct hdsp *)arg;
3711
3712         if (hdsp->midi[0].pending)
3713                 snd_hdsp_midi_input_read (&hdsp->midi[0]);
3714         if (hdsp->midi[1].pending)
3715                 snd_hdsp_midi_input_read (&hdsp->midi[1]);
3716 }
3717
3718 static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
3719 {
3720         struct hdsp *hdsp = (struct hdsp *) dev_id;
3721         unsigned int status;
3722         int audio;
3723         int midi0;
3724         int midi1;
3725         unsigned int midi0status;
3726         unsigned int midi1status;
3727         int schedule = 0;
3728
3729         status = hdsp_read(hdsp, HDSP_statusRegister);
3730
3731         audio = status & HDSP_audioIRQPending;
3732         midi0 = status & HDSP_midi0IRQPending;
3733         midi1 = status & HDSP_midi1IRQPending;
3734
3735         if (!audio && !midi0 && !midi1)
3736                 return IRQ_NONE;
3737
3738         hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
3739
3740         midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
3741         midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
3742
3743         if (!(hdsp->state & HDSP_InitializationComplete))
3744                 return IRQ_HANDLED;
3745
3746         if (audio) {
3747                 if (hdsp->capture_substream)
3748                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
3749
3750                 if (hdsp->playback_substream)
3751                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
3752         }
3753
3754         if (midi0 && midi0status) {
3755                 if (hdsp->use_midi_tasklet) {
3756                         /* we disable interrupts for this input until processing is done */
3757                         hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
3758                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3759                         hdsp->midi[0].pending = 1;
3760                         schedule = 1;
3761                 } else {
3762                         snd_hdsp_midi_input_read (&hdsp->midi[0]);
3763                 }
3764         }
3765         if (hdsp->io_type != Multiface && hdsp->io_type != H9632 && midi1 && midi1status) {
3766                 if (hdsp->use_midi_tasklet) {
3767                         /* we disable interrupts for this input until processing is done */
3768                         hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
3769                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3770                         hdsp->midi[1].pending = 1;
3771                         schedule = 1;
3772                 } else {
3773                         snd_hdsp_midi_input_read (&hdsp->midi[1]);
3774                 }
3775         }
3776         if (hdsp->use_midi_tasklet && schedule)
3777                 tasklet_schedule(&hdsp->midi_tasklet);
3778         return IRQ_HANDLED;
3779 }
3780
3781 static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream)
3782 {
3783         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3784         return hdsp_hw_pointer(hdsp);
3785 }
3786
3787 static char *hdsp_channel_buffer_location(struct hdsp *hdsp,
3788                                              int stream,
3789                                              int channel)
3790
3791 {
3792         int mapped_channel;
3793
3794         if (snd_BUG_ON(channel < 0 || channel >= hdsp->max_channels))
3795                 return NULL;
3796
3797         if ((mapped_channel = hdsp->channel_map[channel]) < 0)
3798                 return NULL;
3799
3800         if (stream == SNDRV_PCM_STREAM_CAPTURE)
3801                 return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3802         else
3803                 return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3804 }
3805
3806 static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel,
3807                                   snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
3808 {
3809         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3810         char *channel_buf;
3811
3812         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
3813                 return -EINVAL;
3814
3815         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3816         if (snd_BUG_ON(!channel_buf))
3817                 return -EIO;
3818         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
3819                 return -EFAULT;
3820         return count;
3821 }
3822
3823 static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel,
3824                                  snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
3825 {
3826         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3827         char *channel_buf;
3828
3829         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
3830                 return -EINVAL;
3831
3832         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3833         if (snd_BUG_ON(!channel_buf))
3834                 return -EIO;
3835         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
3836                 return -EFAULT;
3837         return count;
3838 }
3839
3840 static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel,
3841                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
3842 {
3843         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3844         char *channel_buf;
3845
3846         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3847         if (snd_BUG_ON(!channel_buf))
3848                 return -EIO;
3849         memset(channel_buf + pos * 4, 0, count * 4);
3850         return count;
3851 }
3852
3853 static int snd_hdsp_reset(struct snd_pcm_substream *substream)
3854 {
3855         struct snd_pcm_runtime *runtime = substream->runtime;
3856         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3857         struct snd_pcm_substream *other;
3858         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3859                 other = hdsp->capture_substream;
3860         else
3861                 other = hdsp->playback_substream;
3862         if (hdsp->running)
3863                 runtime->status->hw_ptr = hdsp_hw_pointer(hdsp);
3864         else
3865                 runtime->status->hw_ptr = 0;
3866         if (other) {
3867                 struct snd_pcm_substream *s;
3868                 struct snd_pcm_runtime *oruntime = other->runtime;
3869                 snd_pcm_group_for_each_entry(s, substream) {
3870                         if (s == other) {
3871                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
3872                                 break;
3873                         }
3874                 }
3875         }
3876         return 0;
3877 }
3878
3879 static int snd_hdsp_hw_params(struct snd_pcm_substream *substream,
3880                                  struct snd_pcm_hw_params *params)
3881 {
3882         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3883         int err;
3884         pid_t this_pid;
3885         pid_t other_pid;
3886
3887         if (hdsp_check_for_iobox (hdsp))
3888                 return -EIO;
3889
3890         if (hdsp_check_for_firmware(hdsp, 1))
3891                 return -EIO;
3892
3893         spin_lock_irq(&hdsp->lock);
3894
3895         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3896                 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
3897                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
3898                 this_pid = hdsp->playback_pid;
3899                 other_pid = hdsp->capture_pid;
3900         } else {
3901                 this_pid = hdsp->capture_pid;
3902                 other_pid = hdsp->playback_pid;
3903         }
3904
3905         if ((other_pid > 0) && (this_pid != other_pid)) {
3906
3907                 /* The other stream is open, and not by the same
3908                    task as this one. Make sure that the parameters
3909                    that matter are the same.
3910                  */
3911
3912                 if (params_rate(params) != hdsp->system_sample_rate) {
3913                         spin_unlock_irq(&hdsp->lock);
3914                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3915                         return -EBUSY;
3916                 }
3917
3918                 if (params_period_size(params) != hdsp->period_bytes / 4) {
3919                         spin_unlock_irq(&hdsp->lock);
3920                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3921                         return -EBUSY;
3922                 }
3923
3924                 /* We're fine. */
3925
3926                 spin_unlock_irq(&hdsp->lock);
3927                 return 0;
3928
3929         } else {
3930                 spin_unlock_irq(&hdsp->lock);
3931         }
3932
3933         /* how to make sure that the rate matches an externally-set one ?
3934          */
3935
3936         spin_lock_irq(&hdsp->lock);
3937         if (! hdsp->clock_source_locked) {
3938                 if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
3939                         spin_unlock_irq(&hdsp->lock);
3940                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3941                         return err;
3942                 }
3943         }
3944         spin_unlock_irq(&hdsp->lock);
3945
3946         if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
3947                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3948                 return err;
3949         }
3950
3951         return 0;
3952 }
3953
3954 static int snd_hdsp_channel_info(struct snd_pcm_substream *substream,
3955                                     struct snd_pcm_channel_info *info)
3956 {
3957         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3958         int mapped_channel;
3959
3960         if (snd_BUG_ON(info->channel >= hdsp->max_channels))
3961                 return -EINVAL;
3962
3963         if ((mapped_channel = hdsp->channel_map[info->channel]) < 0)
3964                 return -EINVAL;
3965
3966         info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES;
3967         info->first = 0;
3968         info->step = 32;
3969         return 0;
3970 }
3971
3972 static int snd_hdsp_ioctl(struct snd_pcm_substream *substream,
3973                              unsigned int cmd, void *arg)
3974 {
3975         switch (cmd) {
3976         case SNDRV_PCM_IOCTL1_RESET:
3977                 return snd_hdsp_reset(substream);
3978         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
3979                 return snd_hdsp_channel_info(substream, arg);
3980         default:
3981                 break;
3982         }
3983
3984         return snd_pcm_lib_ioctl(substream, cmd, arg);
3985 }
3986
3987 static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd)
3988 {
3989         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3990         struct snd_pcm_substream *other;
3991         int running;
3992
3993         if (hdsp_check_for_iobox (hdsp))
3994                 return -EIO;
3995
3996         if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
3997                 return -EIO;
3998
3999         spin_lock(&hdsp->lock);
4000         running = hdsp->running;
4001         switch (cmd) {
4002         case SNDRV_PCM_TRIGGER_START:
4003                 running |= 1 << substream->stream;
4004                 break;
4005         case SNDRV_PCM_TRIGGER_STOP:
4006                 running &= ~(1 << substream->stream);
4007                 break;
4008         default:
4009                 snd_BUG();
4010                 spin_unlock(&hdsp->lock);
4011                 return -EINVAL;
4012         }
4013         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4014                 other = hdsp->capture_substream;
4015         else
4016                 other = hdsp->playback_substream;
4017
4018         if (other) {
4019                 struct snd_pcm_substream *s;
4020                 snd_pcm_group_for_each_entry(s, substream) {
4021                         if (s == other) {
4022                                 snd_pcm_trigger_done(s, substream);
4023                                 if (cmd == SNDRV_PCM_TRIGGER_START)
4024                                         running |= 1 << s->stream;
4025                                 else
4026                                         running &= ~(1 << s->stream);
4027                                 goto _ok;
4028                         }
4029                 }
4030                 if (cmd == SNDRV_PCM_TRIGGER_START) {
4031                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
4032                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4033                                 hdsp_silence_playback(hdsp);
4034                 } else {
4035                         if (running &&
4036                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4037                                 hdsp_silence_playback(hdsp);
4038                 }
4039         } else {
4040                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4041                                 hdsp_silence_playback(hdsp);
4042         }
4043  _ok:
4044         snd_pcm_trigger_done(substream, substream);
4045         if (!hdsp->running && running)
4046                 hdsp_start_audio(hdsp);
4047         else if (hdsp->running && !running)
4048                 hdsp_stop_audio(hdsp);
4049         hdsp->running = running;
4050         spin_unlock(&hdsp->lock);
4051
4052         return 0;
4053 }
4054
4055 static int snd_hdsp_prepare(struct snd_pcm_substream *substream)
4056 {
4057         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4058         int result = 0;
4059
4060         if (hdsp_check_for_iobox (hdsp))
4061                 return -EIO;
4062
4063         if (hdsp_check_for_firmware(hdsp, 1))
4064                 return -EIO;
4065
4066         spin_lock_irq(&hdsp->lock);
4067         if (!hdsp->running)
4068                 hdsp_reset_hw_pointer(hdsp);
4069         spin_unlock_irq(&hdsp->lock);
4070         return result;
4071 }
4072
4073 static struct snd_pcm_hardware snd_hdsp_playback_subinfo =
4074 {
4075         .info =                 (SNDRV_PCM_INFO_MMAP |
4076                                  SNDRV_PCM_INFO_MMAP_VALID |
4077                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4078                                  SNDRV_PCM_INFO_SYNC_START |
4079                                  SNDRV_PCM_INFO_DOUBLE),
4080 #ifdef SNDRV_BIG_ENDIAN
4081         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4082 #else
4083         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4084 #endif
4085         .rates =                (SNDRV_PCM_RATE_32000 |
4086                                  SNDRV_PCM_RATE_44100 |
4087                                  SNDRV_PCM_RATE_48000 |
4088                                  SNDRV_PCM_RATE_64000 |
4089                                  SNDRV_PCM_RATE_88200 |
4090                                  SNDRV_PCM_RATE_96000),
4091         .rate_min =             32000,
4092         .rate_max =             96000,
4093         .channels_min =         14,
4094         .channels_max =         HDSP_MAX_CHANNELS,
4095         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4096         .period_bytes_min =     (64 * 4) * 10,
4097         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4098         .periods_min =          2,
4099         .periods_max =          2,
4100         .fifo_size =            0
4101 };
4102
4103 static struct snd_pcm_hardware snd_hdsp_capture_subinfo =
4104 {
4105         .info =                 (SNDRV_PCM_INFO_MMAP |
4106                                  SNDRV_PCM_INFO_MMAP_VALID |
4107                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4108                                  SNDRV_PCM_INFO_SYNC_START),
4109 #ifdef SNDRV_BIG_ENDIAN
4110         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4111 #else
4112         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4113 #endif
4114         .rates =                (SNDRV_PCM_RATE_32000 |
4115                                  SNDRV_PCM_RATE_44100 |
4116                                  SNDRV_PCM_RATE_48000 |
4117                                  SNDRV_PCM_RATE_64000 |
4118                                  SNDRV_PCM_RATE_88200 |
4119                                  SNDRV_PCM_RATE_96000),
4120         .rate_min =             32000,
4121         .rate_max =             96000,
4122         .channels_min =         14,
4123         .channels_max =         HDSP_MAX_CHANNELS,
4124         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4125         .period_bytes_min =     (64 * 4) * 10,
4126         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4127         .periods_min =          2,
4128         .periods_max =          2,
4129         .fifo_size =            0
4130 };
4131
4132 static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4133
4134 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = {
4135         .count = ARRAY_SIZE(hdsp_period_sizes),
4136         .list = hdsp_period_sizes,
4137         .mask = 0
4138 };
4139
4140 static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4141
4142 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = {
4143         .count = ARRAY_SIZE(hdsp_9632_sample_rates),
4144         .list = hdsp_9632_sample_rates,
4145         .mask = 0
4146 };
4147
4148 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params,
4149                                         struct snd_pcm_hw_rule *rule)
4150 {
4151         struct hdsp *hdsp = rule->private;
4152         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4153         if (hdsp->io_type == H9632) {
4154                 unsigned int list[3];
4155                 list[0] = hdsp->qs_in_channels;
4156                 list[1] = hdsp->ds_in_channels;
4157                 list[2] = hdsp->ss_in_channels;
4158                 return snd_interval_list(c, 3, list, 0);
4159         } else {
4160                 unsigned int list[2];
4161                 list[0] = hdsp->ds_in_channels;
4162                 list[1] = hdsp->ss_in_channels;
4163                 return snd_interval_list(c, 2, list, 0);
4164         }
4165 }
4166
4167 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params,
4168                                         struct snd_pcm_hw_rule *rule)
4169 {
4170         unsigned int list[3];
4171         struct hdsp *hdsp = rule->private;
4172         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4173         if (hdsp->io_type == H9632) {
4174                 list[0] = hdsp->qs_out_channels;
4175                 list[1] = hdsp->ds_out_channels;
4176                 list[2] = hdsp->ss_out_channels;
4177                 return snd_interval_list(c, 3, list, 0);
4178         } else {
4179                 list[0] = hdsp->ds_out_channels;
4180                 list[1] = hdsp->ss_out_channels;
4181         }
4182         return snd_interval_list(c, 2, list, 0);
4183 }
4184
4185 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
4186                                              struct snd_pcm_hw_rule *rule)
4187 {
4188         struct hdsp *hdsp = rule->private;
4189         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4190         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4191         if (r->min > 96000 && hdsp->io_type == H9632) {
4192                 struct snd_interval t = {
4193                         .min = hdsp->qs_in_channels,
4194                         .max = hdsp->qs_in_channels,
4195                         .integer = 1,
4196                 };
4197                 return snd_interval_refine(c, &t);
4198         } else if (r->min > 48000 && r->max <= 96000) {
4199                 struct snd_interval t = {
4200                         .min = hdsp->ds_in_channels,
4201                         .max = hdsp->ds_in_channels,
4202                         .integer = 1,
4203                 };
4204                 return snd_interval_refine(c, &t);
4205         } else if (r->max < 64000) {
4206                 struct snd_interval t = {
4207                         .min = hdsp->ss_in_channels,
4208                         .max = hdsp->ss_in_channels,
4209                         .integer = 1,
4210                 };
4211                 return snd_interval_refine(c, &t);
4212         }
4213         return 0;
4214 }
4215
4216 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
4217                                              struct snd_pcm_hw_rule *rule)
4218 {
4219         struct hdsp *hdsp = rule->private;
4220         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4221         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4222         if (r->min > 96000 && hdsp->io_type == H9632) {
4223                 struct snd_interval t = {
4224                         .min = hdsp->qs_out_channels,
4225                         .max = hdsp->qs_out_channels,
4226                         .integer = 1,
4227                 };
4228                 return snd_interval_refine(c, &t);
4229         } else if (r->min > 48000 && r->max <= 96000) {
4230                 struct snd_interval t = {
4231                         .min = hdsp->ds_out_channels,
4232                         .max = hdsp->ds_out_channels,
4233                         .integer = 1,
4234                 };
4235                 return snd_interval_refine(c, &t);
4236         } else if (r->max < 64000) {
4237                 struct snd_interval t = {
4238                         .min = hdsp->ss_out_channels,
4239                         .max = hdsp->ss_out_channels,
4240                         .integer = 1,
4241                 };
4242                 return snd_interval_refine(c, &t);
4243         }
4244         return 0;
4245 }
4246
4247 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
4248                                              struct snd_pcm_hw_rule *rule)
4249 {
4250         struct hdsp *hdsp = rule->private;
4251         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4252         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4253         if (c->min >= hdsp->ss_out_channels) {
4254                 struct snd_interval t = {
4255                         .min = 32000,
4256                         .max = 48000,
4257                         .integer = 1,
4258                 };
4259                 return snd_interval_refine(r, &t);
4260         } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) {
4261                 struct snd_interval t = {
4262                         .min = 128000,
4263                         .max = 192000,
4264                         .integer = 1,
4265                 };
4266                 return snd_interval_refine(r, &t);
4267         } else if (c->max <= hdsp->ds_out_channels) {
4268                 struct snd_interval t = {
4269                         .min = 64000,
4270                         .max = 96000,
4271                         .integer = 1,
4272                 };
4273                 return snd_interval_refine(r, &t);
4274         }
4275         return 0;
4276 }
4277
4278 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
4279                                              struct snd_pcm_hw_rule *rule)
4280 {
4281         struct hdsp *hdsp = rule->private;
4282         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4283         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4284         if (c->min >= hdsp->ss_in_channels) {
4285                 struct snd_interval t = {
4286                         .min = 32000,
4287                         .max = 48000,
4288                         .integer = 1,
4289                 };
4290                 return snd_interval_refine(r, &t);
4291         } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) {
4292                 struct snd_interval t = {
4293                         .min = 128000,
4294                         .max = 192000,
4295                         .integer = 1,
4296                 };
4297                 return snd_interval_refine(r, &t);
4298         } else if (c->max <= hdsp->ds_in_channels) {
4299                 struct snd_interval t = {
4300                         .min = 64000,
4301                         .max = 96000,
4302                         .integer = 1,
4303                 };
4304                 return snd_interval_refine(r, &t);
4305         }
4306         return 0;
4307 }
4308
4309 static int snd_hdsp_playback_open(struct snd_pcm_substream *substream)
4310 {
4311         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4312         struct snd_pcm_runtime *runtime = substream->runtime;
4313
4314         if (hdsp_check_for_iobox (hdsp))
4315                 return -EIO;
4316
4317         if (hdsp_check_for_firmware(hdsp, 1))
4318                 return -EIO;
4319
4320         spin_lock_irq(&hdsp->lock);
4321
4322         snd_pcm_set_sync(substream);
4323
4324         runtime->hw = snd_hdsp_playback_subinfo;
4325         runtime->dma_area = hdsp->playback_buffer;
4326         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4327
4328         hdsp->playback_pid = current->pid;
4329         hdsp->playback_substream = substream;
4330
4331         spin_unlock_irq(&hdsp->lock);
4332
4333         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4334         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4335         if (hdsp->clock_source_locked) {
4336                 runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate;
4337         } else if (hdsp->io_type == H9632) {
4338                 runtime->hw.rate_max = 192000;
4339                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4340                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4341         }
4342         if (hdsp->io_type == H9632) {
4343                 runtime->hw.channels_min = hdsp->qs_out_channels;
4344                 runtime->hw.channels_max = hdsp->ss_out_channels;
4345         }
4346
4347         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4348                              snd_hdsp_hw_rule_out_channels, hdsp,
4349                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4350         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4351                              snd_hdsp_hw_rule_out_channels_rate, hdsp,
4352                              SNDRV_PCM_HW_PARAM_RATE, -1);
4353         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4354                              snd_hdsp_hw_rule_rate_out_channels, hdsp,
4355                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4356
4357         hdsp->creg_spdif_stream = hdsp->creg_spdif;
4358         hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4359         snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4360                        SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4361         return 0;
4362 }
4363
4364 static int snd_hdsp_playback_release(struct snd_pcm_substream *substream)
4365 {
4366         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4367
4368         spin_lock_irq(&hdsp->lock);
4369
4370         hdsp->playback_pid = -1;
4371         hdsp->playback_substream = NULL;
4372
4373         spin_unlock_irq(&hdsp->lock);
4374
4375         hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4376         snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4377                        SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4378         return 0;
4379 }
4380
4381
4382 static int snd_hdsp_capture_open(struct snd_pcm_substream *substream)
4383 {
4384         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4385         struct snd_pcm_runtime *runtime = substream->runtime;
4386
4387         if (hdsp_check_for_iobox (hdsp))
4388                 return -EIO;
4389
4390         if (hdsp_check_for_firmware(hdsp, 1))
4391                 return -EIO;
4392
4393         spin_lock_irq(&hdsp->lock);
4394
4395         snd_pcm_set_sync(substream);
4396
4397         runtime->hw = snd_hdsp_capture_subinfo;
4398         runtime->dma_area = hdsp->capture_buffer;
4399         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4400
4401         hdsp->capture_pid = current->pid;
4402         hdsp->capture_substream = substream;
4403
4404         spin_unlock_irq(&hdsp->lock);
4405
4406         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4407         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4408         if (hdsp->io_type == H9632) {
4409                 runtime->hw.channels_min = hdsp->qs_in_channels;
4410                 runtime->hw.channels_max = hdsp->ss_in_channels;
4411                 runtime->hw.rate_max = 192000;
4412                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4413                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4414         }
4415         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4416                              snd_hdsp_hw_rule_in_channels, hdsp,
4417                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4418         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4419                              snd_hdsp_hw_rule_in_channels_rate, hdsp,
4420                              SNDRV_PCM_HW_PARAM_RATE, -1);
4421         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4422                              snd_hdsp_hw_rule_rate_in_channels, hdsp,
4423                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4424         return 0;
4425 }
4426
4427 static int snd_hdsp_capture_release(struct snd_pcm_substream *substream)
4428 {
4429         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4430
4431         spin_lock_irq(&hdsp->lock);
4432
4433         hdsp->capture_pid = -1;
4434         hdsp->capture_substream = NULL;
4435
4436         spin_unlock_irq(&hdsp->lock);
4437         return 0;
4438 }
4439
4440 /* helper functions for copying meter values */
4441 static inline int copy_u32_le(void __user *dest, void __iomem *src)
4442 {
4443         u32 val = readl(src);
4444         return copy_to_user(dest, &val, 4);
4445 }
4446
4447 static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4448 {
4449         u32 rms_low, rms_high;
4450         u64 rms;
4451         rms_low = readl(src_low);
4452         rms_high = readl(src_high);
4453         rms = ((u64)rms_high << 32) | rms_low;
4454         return copy_to_user(dest, &rms, 8);
4455 }
4456
4457 static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4458 {
4459         u32 rms_low, rms_high;
4460         u64 rms;
4461         rms_low = readl(src_low) & 0xffffff00;
4462         rms_high = readl(src_high) & 0xffffff00;
4463         rms = ((u64)rms_high << 32) | rms_low;
4464         return copy_to_user(dest, &rms, 8);
4465 }
4466
4467 static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4468 {
4469         int doublespeed = 0;
4470         int i, j, channels, ofs;
4471
4472         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4473                 doublespeed = 1;
4474         channels = doublespeed ? 14 : 26;
4475         for (i = 0, j = 0; i < 26; ++i) {
4476                 if (doublespeed && (i & 4))
4477                         continue;
4478                 ofs = HDSP_9652_peakBase - j * 4;
4479                 if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs))
4480                         return -EFAULT;
4481                 ofs -= channels * 4;
4482                 if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs))
4483                         return -EFAULT;
4484                 ofs -= channels * 4;
4485                 if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs))
4486                         return -EFAULT;
4487                 ofs = HDSP_9652_rmsBase + j * 8;
4488                 if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs,
4489                                 hdsp->iobase + ofs + 4))
4490                         return -EFAULT;
4491                 ofs += channels * 8;
4492                 if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs,
4493                                 hdsp->iobase + ofs + 4))
4494                         return -EFAULT;
4495                 ofs += channels * 8;
4496                 if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs,
4497                                 hdsp->iobase + ofs + 4))
4498                         return -EFAULT;
4499                 j++;
4500         }
4501         return 0;
4502 }
4503
4504 static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4505 {
4506         int i, j;
4507         struct hdsp_9632_meters __iomem *m;
4508         int doublespeed = 0;
4509
4510         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4511                 doublespeed = 1;
4512         m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase);
4513         for (i = 0, j = 0; i < 16; ++i, ++j) {
4514                 if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j]))
4515                         return -EFAULT;
4516                 if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j]))
4517                         return -EFAULT;
4518                 if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j]))
4519                         return -EFAULT;
4520                 if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j],
4521                                 &m->input_rms_high[j]))
4522                         return -EFAULT;
4523                 if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j],
4524                                 &m->playback_rms_high[j]))
4525                         return -EFAULT;
4526                 if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j],
4527                                 &m->output_rms_high[j]))
4528                         return -EFAULT;
4529                 if (doublespeed && i == 3) i += 4;
4530         }
4531         return 0;
4532 }
4533
4534 static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4535 {
4536         int i;
4537
4538         for (i = 0; i < 26; i++) {
4539                 if (copy_u32_le(&peak_rms->playback_peaks[i],
4540                                 hdsp->iobase + HDSP_playbackPeakLevel + i * 4))
4541                         return -EFAULT;
4542                 if (copy_u32_le(&peak_rms->input_peaks[i],
4543                                 hdsp->iobase + HDSP_inputPeakLevel + i * 4))
4544                         return -EFAULT;
4545         }
4546         for (i = 0; i < 28; i++) {
4547                 if (copy_u32_le(&peak_rms->output_peaks[i],
4548                                 hdsp->iobase + HDSP_outputPeakLevel + i * 4))
4549                         return -EFAULT;
4550         }
4551         for (i = 0; i < 26; ++i) {
4552                 if (copy_u64_le(&peak_rms->playback_rms[i],
4553                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
4554                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
4555                         return -EFAULT;
4556                 if (copy_u64_le(&peak_rms->input_rms[i],
4557                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
4558                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8))
4559                         return -EFAULT;
4560         }
4561         return 0;
4562 }
4563
4564 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
4565 {
4566         struct hdsp *hdsp = (struct hdsp *)hw->private_data;
4567         void __user *argp = (void __user *)arg;
4568         int err;
4569
4570         switch (cmd) {
4571         case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: {
4572                 struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg;
4573
4574                 err = hdsp_check_for_iobox(hdsp);
4575                 if (err < 0)
4576                         return err;
4577
4578                 err = hdsp_check_for_firmware(hdsp, 1);
4579                 if (err < 0)
4580                         return err;
4581
4582                 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4583                         snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4584                         return -EINVAL;
4585                 }
4586
4587                 switch (hdsp->io_type) {
4588                 case H9652:
4589                         return hdsp_9652_get_peak(hdsp, peak_rms);
4590                 case H9632:
4591                         return hdsp_9632_get_peak(hdsp, peak_rms);
4592                 default:
4593                         return hdsp_get_peak(hdsp, peak_rms);
4594                 }
4595         }
4596         case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: {
4597                 struct hdsp_config_info info;
4598                 unsigned long flags;
4599                 int i;
4600
4601                 err = hdsp_check_for_iobox(hdsp);
4602                 if (err < 0)
4603                         return err;
4604
4605                 err = hdsp_check_for_firmware(hdsp, 1);
4606                 if (err < 0)
4607                         return err;
4608
4609                 spin_lock_irqsave(&hdsp->lock, flags);
4610                 info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
4611                 info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
4612                 if (hdsp->io_type != H9632)
4613                     info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp);
4614                 info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp);
4615                 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != H9632) ? 3 : 1); ++i)
4616                         info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i);
4617                 info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp);
4618                 info.spdif_out = (unsigned char)hdsp_spdif_out(hdsp);
4619                 info.spdif_professional = (unsigned char)hdsp_spdif_professional(hdsp);
4620                 info.spdif_emphasis = (unsigned char)hdsp_spdif_emphasis(hdsp);
4621                 info.spdif_nonaudio = (unsigned char)hdsp_spdif_nonaudio(hdsp);
4622                 info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp);
4623                 info.system_sample_rate = hdsp->system_sample_rate;
4624                 info.autosync_sample_rate = hdsp_external_sample_rate(hdsp);
4625                 info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp);
4626                 info.clock_source = (unsigned char)hdsp_clock_source(hdsp);
4627                 info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp);
4628                 info.line_out = (unsigned char)hdsp_line_out(hdsp);
4629                 if (hdsp->io_type == H9632) {
4630                         info.da_gain = (unsigned char)hdsp_da_gain(hdsp);
4631                         info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
4632                         info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
4633                         info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp);
4634
4635                 }
4636                 if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
4637                         info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp);
4638                 spin_unlock_irqrestore(&hdsp->lock, flags);
4639                 if (copy_to_user(argp, &info, sizeof(info)))
4640                         return -EFAULT;
4641                 break;
4642         }
4643         case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
4644                 struct hdsp_9632_aeb h9632_aeb;
4645
4646                 if (hdsp->io_type != H9632) return -EINVAL;
4647                 h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
4648                 h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
4649                 if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb)))
4650                         return -EFAULT;
4651                 break;
4652         }
4653         case SNDRV_HDSP_IOCTL_GET_VERSION: {
4654                 struct hdsp_version hdsp_version;
4655                 int err;
4656
4657                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4658                 if (hdsp->io_type == Undefined) {
4659                         if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4660                                 return err;
4661                 }
4662                 hdsp_version.io_type = hdsp->io_type;
4663                 hdsp_version.firmware_rev = hdsp->firmware_rev;
4664                 if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version))))
4665                         return -EFAULT;
4666                 break;
4667         }
4668         case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: {
4669                 struct hdsp_firmware __user *firmware;
4670                 u32 __user *firmware_data;
4671                 int err;
4672
4673                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4674                 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
4675                 if (hdsp->io_type == Undefined) return -EINVAL;
4676
4677                 if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded))
4678                         return -EBUSY;
4679
4680                 snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n");
4681                 firmware = (struct hdsp_firmware __user *)argp;
4682
4683                 if (get_user(firmware_data, &firmware->firmware_data))
4684                         return -EFAULT;
4685
4686                 if (hdsp_check_for_iobox (hdsp))
4687                         return -EIO;
4688
4689                 if (copy_from_user(hdsp->firmware_cache, firmware_data, sizeof(hdsp->firmware_cache)) != 0)
4690                         return -EFAULT;
4691
4692                 hdsp->state |= HDSP_FirmwareCached;
4693
4694                 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4695                         return err;
4696
4697                 if (!(hdsp->state & HDSP_InitializationComplete)) {
4698                         if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4699                                 return err;
4700
4701                         snd_hdsp_initialize_channels(hdsp);
4702                         snd_hdsp_initialize_midi_flush(hdsp);
4703
4704                         if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4705                                 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4706                                 return err;
4707                         }
4708                 }
4709                 break;
4710         }
4711         case SNDRV_HDSP_IOCTL_GET_MIXER: {
4712                 struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp;
4713                 if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE))
4714                         return -EFAULT;
4715                 break;
4716         }
4717         default:
4718                 return -EINVAL;
4719         }
4720         return 0;
4721 }
4722
4723 static struct snd_pcm_ops snd_hdsp_playback_ops = {
4724         .open =         snd_hdsp_playback_open,
4725         .close =        snd_hdsp_playback_release,
4726         .ioctl =        snd_hdsp_ioctl,
4727         .hw_params =    snd_hdsp_hw_params,
4728         .prepare =      snd_hdsp_prepare,
4729         .trigger =      snd_hdsp_trigger,
4730         .pointer =      snd_hdsp_hw_pointer,
4731         .copy =         snd_hdsp_playback_copy,
4732         .silence =      snd_hdsp_hw_silence,
4733 };
4734
4735 static struct snd_pcm_ops snd_hdsp_capture_ops = {
4736         .open =         snd_hdsp_capture_open,
4737         .close =        snd_hdsp_capture_release,
4738         .ioctl =        snd_hdsp_ioctl,
4739         .hw_params =    snd_hdsp_hw_params,
4740         .prepare =      snd_hdsp_prepare,
4741         .trigger =      snd_hdsp_trigger,
4742         .pointer =      snd_hdsp_hw_pointer,
4743         .copy =         snd_hdsp_capture_copy,
4744 };
4745
4746 static int snd_hdsp_create_hwdep(struct snd_card *card, struct hdsp *hdsp)
4747 {
4748         struct snd_hwdep *hw;
4749         int err;
4750
4751         if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
4752                 return err;
4753
4754         hdsp->hwdep = hw;
4755         hw->private_data = hdsp;
4756         strcpy(hw->name, "HDSP hwdep interface");
4757
4758         hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
4759
4760         return 0;
4761 }
4762
4763 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp)
4764 {
4765         struct snd_pcm *pcm;
4766         int err;
4767
4768         if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0)
4769                 return err;
4770
4771         hdsp->pcm = pcm;
4772         pcm->private_data = hdsp;
4773         strcpy(pcm->name, hdsp->card_name);
4774
4775         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops);
4776         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops);
4777
4778         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
4779
4780         return 0;
4781 }
4782
4783 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp)
4784 {
4785         hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
4786         hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
4787 }
4788
4789 static int snd_hdsp_enable_io (struct hdsp *hdsp)
4790 {
4791         int i;
4792
4793         if (hdsp_fifo_wait (hdsp, 0, 100)) {
4794                 snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
4795                 return -EIO;
4796         }
4797
4798         for (i = 0; i < hdsp->max_channels; ++i) {
4799                 hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
4800                 hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
4801         }
4802
4803         return 0;
4804 }
4805
4806 static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
4807 {
4808         int status, aebi_channels, aebo_channels;
4809
4810         switch (hdsp->io_type) {
4811         case Digiface:
4812                 hdsp->card_name = "RME Hammerfall DSP + Digiface";
4813                 hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS;
4814                 hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS;
4815                 break;
4816
4817         case H9652:
4818                 hdsp->card_name = "RME Hammerfall HDSP 9652";
4819                 hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
4820                 hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
4821                 break;
4822
4823         case H9632:
4824                 status = hdsp_read(hdsp, HDSP_statusRegister);
4825                 /* HDSP_AEBx bits are low when AEB are connected */
4826                 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
4827                 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
4828                 hdsp->card_name = "RME Hammerfall HDSP 9632";
4829                 hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels;
4830                 hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels;
4831                 hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels;
4832                 hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels;
4833                 hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels;
4834                 hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels;
4835                 break;
4836
4837         case Multiface:
4838                 hdsp->card_name = "RME Hammerfall DSP + Multiface";
4839                 hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
4840                 hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
4841                 break;
4842
4843         default:
4844                 /* should never get here */
4845                 break;
4846         }
4847 }
4848
4849 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp)
4850 {
4851         snd_hdsp_flush_midi_input (hdsp, 0);
4852         snd_hdsp_flush_midi_input (hdsp, 1);
4853 }
4854
4855 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
4856 {
4857         int err;
4858
4859         if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
4860                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
4861                 return err;
4862         }
4863
4864
4865         if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
4866                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
4867                 return err;
4868         }
4869
4870         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
4871                 if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) {
4872                         snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n");
4873                         return err;
4874                 }
4875         }
4876
4877         if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) {
4878                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n");
4879                 return err;
4880         }
4881
4882         snd_hdsp_proc_init(hdsp);
4883
4884         hdsp->system_sample_rate = -1;
4885         hdsp->playback_pid = -1;
4886         hdsp->capture_pid = -1;
4887         hdsp->capture_substream = NULL;
4888         hdsp->playback_substream = NULL;
4889
4890         if ((err = snd_hdsp_set_defaults(hdsp)) < 0) {
4891                 snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
4892                 return err;
4893         }
4894
4895         if (!(hdsp->state & HDSP_InitializationComplete)) {
4896                 strcpy(card->shortname, "Hammerfall DSP");
4897                 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
4898                         hdsp->port, hdsp->irq);
4899
4900                 if ((err = snd_card_register(card)) < 0) {
4901                         snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
4902                         return err;
4903                 }
4904                 hdsp->state |= HDSP_InitializationComplete;
4905         }
4906
4907         return 0;
4908 }
4909
4910 #ifdef HDSP_FW_LOADER
4911 /* load firmware via hotplug fw loader */
4912 static int hdsp_request_fw_loader(struct hdsp *hdsp)
4913 {
4914         const char *fwfile;
4915         const struct firmware *fw;
4916         int err;
4917
4918         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4919                 return 0;
4920         if (hdsp->io_type == Undefined) {
4921                 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4922                         return err;
4923                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4924                         return 0;
4925         }
4926
4927         /* caution: max length of firmware filename is 30! */
4928         switch (hdsp->io_type) {
4929         case Multiface:
4930                 if (hdsp->firmware_rev == 0xa)
4931                         fwfile = "multiface_firmware.bin";
4932                 else
4933                         fwfile = "multiface_firmware_rev11.bin";
4934                 break;
4935         case Digiface:
4936                 if (hdsp->firmware_rev == 0xa)
4937                         fwfile = "digiface_firmware.bin";
4938                 else
4939                         fwfile = "digiface_firmware_rev11.bin";
4940                 break;
4941         default:
4942                 snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type);
4943                 return -EINVAL;
4944         }
4945
4946         if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) {
4947                 snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile);
4948                 return -ENOENT;
4949         }
4950         if (fw->size < sizeof(hdsp->firmware_cache)) {
4951                 snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n",
4952                            (int)fw->size, (int)sizeof(hdsp->firmware_cache));
4953                 release_firmware(fw);
4954                 return -EINVAL;
4955         }
4956
4957         memcpy(hdsp->firmware_cache, fw->data, sizeof(hdsp->firmware_cache));
4958
4959         release_firmware(fw);
4960
4961         hdsp->state |= HDSP_FirmwareCached;
4962
4963         if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4964                 return err;
4965
4966         if (!(hdsp->state & HDSP_InitializationComplete)) {
4967                 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4968                         return err;
4969
4970                 if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) {
4971                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n");
4972                         return err;
4973                 }
4974                 snd_hdsp_initialize_channels(hdsp);
4975                 snd_hdsp_initialize_midi_flush(hdsp);
4976                 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4977                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4978                         return err;
4979                 }
4980         }
4981         return 0;
4982 }
4983 #endif
4984
4985 static int __devinit snd_hdsp_create(struct snd_card *card,
4986                                      struct hdsp *hdsp)
4987 {
4988         struct pci_dev *pci = hdsp->pci;
4989         int err;
4990         int is_9652 = 0;
4991         int is_9632 = 0;
4992
4993         hdsp->irq = -1;
4994         hdsp->state = 0;
4995         hdsp->midi[0].rmidi = NULL;
4996         hdsp->midi[1].rmidi = NULL;
4997         hdsp->midi[0].input = NULL;
4998         hdsp->midi[1].input = NULL;
4999         hdsp->midi[0].output = NULL;
5000         hdsp->midi[1].output = NULL;
5001         hdsp->midi[0].pending = 0;
5002         hdsp->midi[1].pending = 0;
5003         spin_lock_init(&hdsp->midi[0].lock);
5004         spin_lock_init(&hdsp->midi[1].lock);
5005         hdsp->iobase = NULL;
5006         hdsp->control_register = 0;
5007         hdsp->control2_register = 0;
5008         hdsp->io_type = Undefined;
5009         hdsp->max_channels = 26;
5010
5011         hdsp->card = card;
5012
5013         spin_lock_init(&hdsp->lock);
5014
5015         tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
5016
5017         pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
5018         hdsp->firmware_rev &= 0xff;
5019
5020         /* From Martin Bjoernsen :
5021             "It is important that the card's latency timer register in
5022             the PCI configuration space is set to a value much larger
5023             than 0 by the computer's BIOS or the driver.
5024             The windows driver always sets this 8 bit register [...]
5025             to its maximum 255 to avoid problems with some computers."
5026         */
5027         pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
5028
5029         strcpy(card->driver, "H-DSP");
5030         strcpy(card->mixername, "Xilinx FPGA");
5031
5032         if (hdsp->firmware_rev < 0xa)
5033                 return -ENODEV;
5034         else if (hdsp->firmware_rev < 0x64)
5035                 hdsp->card_name = "RME Hammerfall DSP";
5036         else if (hdsp->firmware_rev < 0x96) {
5037                 hdsp->card_name = "RME HDSP 9652";
5038                 is_9652 = 1;
5039         } else {
5040                 hdsp->card_name = "RME HDSP 9632";
5041                 hdsp->max_channels = 16;
5042                 is_9632 = 1;
5043         }
5044
5045         if ((err = pci_enable_device(pci)) < 0)
5046                 return err;
5047
5048         pci_set_master(hdsp->pci);
5049
5050         if ((err = pci_request_regions(pci, "hdsp")) < 0)
5051                 return err;
5052         hdsp->port = pci_resource_start(pci, 0);
5053         if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) {
5054                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1);
5055                 return -EBUSY;
5056         }
5057
5058         if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED,
5059                         "hdsp", hdsp)) {
5060                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq);
5061                 return -EBUSY;
5062         }
5063
5064         hdsp->irq = pci->irq;
5065         hdsp->precise_ptr = 0;
5066         hdsp->use_midi_tasklet = 1;
5067         hdsp->dds_value = 0;
5068
5069         if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
5070                 return err;
5071
5072         if (!is_9652 && !is_9632) {
5073                 /* we wait a maximum of 10 seconds to let freshly
5074                  * inserted cardbus cards do their hardware init */
5075                 err = hdsp_wait_for_iobox(hdsp, 1000, 10);
5076
5077                 if (err < 0)
5078                         return err;
5079
5080                 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
5081 #ifdef HDSP_FW_LOADER
5082                         if ((err = hdsp_request_fw_loader(hdsp)) < 0)
5083                                 /* we don't fail as this can happen
5084                                    if userspace is not ready for
5085                                    firmware upload
5086                                 */
5087                                 snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
5088                         else
5089                                 /* init is complete, we return */
5090                                 return 0;
5091 #endif
5092                         /* we defer initialization */
5093                         snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5094                         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5095                                 return err;
5096                         return 0;
5097                 } else {
5098                         snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
5099                         if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
5100                                 hdsp->io_type = Multiface;
5101                         else
5102                                 hdsp->io_type = Digiface;
5103                 }
5104         }
5105
5106         if ((err = snd_hdsp_enable_io(hdsp)) != 0)
5107                 return err;
5108
5109         if (is_9652)
5110                 hdsp->io_type = H9652;
5111
5112         if (is_9632)
5113                 hdsp->io_type = H9632;
5114
5115         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5116                 return err;
5117
5118         snd_hdsp_initialize_channels(hdsp);
5119         snd_hdsp_initialize_midi_flush(hdsp);
5120
5121         hdsp->state |= HDSP_FirmwareLoaded;
5122
5123         if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
5124                 return err;
5125
5126         return 0;
5127 }
5128
5129 static int snd_hdsp_free(struct hdsp *hdsp)
5130 {
5131         if (hdsp->port) {
5132                 /* stop the audio, and cancel all interrupts */
5133                 tasklet_kill(&hdsp->midi_tasklet);
5134                 hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable);
5135                 hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
5136         }
5137
5138         if (hdsp->irq >= 0)
5139                 free_irq(hdsp->irq, (void *)hdsp);
5140
5141         snd_hdsp_free_buffers(hdsp);
5142
5143         if (hdsp->iobase)
5144                 iounmap(hdsp->iobase);
5145
5146         if (hdsp->port)
5147                 pci_release_regions(hdsp->pci);
5148
5149         pci_disable_device(hdsp->pci);
5150         return 0;
5151 }
5152
5153 static void snd_hdsp_card_free(struct snd_card *card)
5154 {
5155         struct hdsp *hdsp = (struct hdsp *) card->private_data;
5156
5157         if (hdsp)
5158                 snd_hdsp_free(hdsp);
5159 }
5160
5161 static int __devinit snd_hdsp_probe(struct pci_dev *pci,
5162                                     const struct pci_device_id *pci_id)
5163 {
5164         static int dev;
5165         struct hdsp *hdsp;
5166         struct snd_card *card;
5167         int err;
5168
5169         if (dev >= SNDRV_CARDS)
5170                 return -ENODEV;
5171         if (!enable[dev]) {
5172                 dev++;
5173                 return -ENOENT;
5174         }
5175
5176         err = snd_card_create(index[dev], id[dev], THIS_MODULE,
5177                               sizeof(struct hdsp), &card);
5178         if (err < 0)
5179                 return err;
5180
5181         hdsp = (struct hdsp *) card->private_data;
5182         card->private_free = snd_hdsp_card_free;
5183         hdsp->dev = dev;
5184         hdsp->pci = pci;
5185         snd_card_set_dev(card, &pci->dev);
5186
5187         if ((err = snd_hdsp_create(card, hdsp)) < 0) {
5188                 snd_card_free(card);
5189                 return err;
5190         }
5191
5192         strcpy(card->shortname, "Hammerfall DSP");
5193         sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5194                 hdsp->port, hdsp->irq);
5195
5196         if ((err = snd_card_register(card)) < 0) {
5197                 snd_card_free(card);
5198                 return err;
5199         }
5200         pci_set_drvdata(pci, card);
5201         dev++;
5202         return 0;
5203 }
5204
5205 static void __devexit snd_hdsp_remove(struct pci_dev *pci)
5206 {
5207         snd_card_free(pci_get_drvdata(pci));
5208         pci_set_drvdata(pci, NULL);
5209 }
5210
5211 static struct pci_driver driver = {
5212         .name =     "RME Hammerfall DSP",
5213         .id_table = snd_hdsp_ids,
5214         .probe =    snd_hdsp_probe,
5215         .remove = __devexit_p(snd_hdsp_remove),
5216 };
5217
5218 static int __init alsa_card_hdsp_init(void)
5219 {
5220         return pci_register_driver(&driver);
5221 }
5222
5223 static void __exit alsa_card_hdsp_exit(void)
5224 {
5225         pci_unregister_driver(&driver);
5226 }
5227
5228 module_init(alsa_card_hdsp_init)
5229 module_exit(alsa_card_hdsp_exit)