sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *
  10  *  Authors:
  11  *                      Wu Fengguang <wfg@linux.intel.com>
  12  *
  13  *  Maintained by:
  14  *                      Wu Fengguang <wfg@linux.intel.com>
  15  *
  16  *  This program is free software; you can redistribute it and/or modify it
  17  *  under the terms of the GNU General Public License as published by the Free
  18  *  Software Foundation; either version 2 of the License, or (at your option)
  19  *  any later version.
  20  *
  21  *  This program is distributed in the hope that it will be useful, but
  22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  24  *  for more details.
  25  *
  26  *  You should have received a copy of the GNU General Public License
  27  *  along with this program; if not, write to the Free Software Foundation,
  28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/delay.h>
  33 #include <linux/slab.h>
  34 #include <linux/module.h>
  35 #include <sound/core.h>
  36 #include <sound/jack.h>
  37 #include "hda_codec.h"
  38 #include "hda_local.h"
  39
  40 static bool static_hdmi_pcm;
  41 module_param(static_hdmi_pcm, bool, 0644);
  42 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  43
  44 /*
  45  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  46  * could support N independent pipes, each of them can be connected to one or
  47  * more ports (DVI, HDMI or DisplayPort).
  48  *
  49  * The HDA correspondence of pipes/ports are converter/pin nodes.
  50  */
  51 #define MAX_HDMI_CVTS   4
  52 #define MAX_HDMI_PINS   4
  53
  54 struct hdmi_spec_per_cvt {
  55         hda_nid_t cvt_nid;
  56         int assigned;
  57         unsigned int channels_min;
  58         unsigned int channels_max;
  59         u32 rates;
  60         u64 formats;
  61         unsigned int maxbps;
  62 };
  63
  64 struct hdmi_spec_per_pin {
  65         hda_nid_t pin_nid;
  66         int num_mux_nids;
  67         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  68
  69         struct hda_codec *codec;
  70         struct hdmi_eld sink_eld;
  71         struct delayed_work work;
  72         int repoll_count;
  73 };
  74
  75 struct hdmi_spec {
  76         int num_cvts;
  77         struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
  78
  79         int num_pins;
  80         struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
  81         struct hda_pcm pcm_rec[MAX_HDMI_PINS];
  82
  83         /*
  84          * Non-generic ATI/NVIDIA specific
  85          */
  86         struct hda_multi_out multiout;
  87         const struct hda_pcm_stream *pcm_playback;
  88 };
  89
  90
  91 struct hdmi_audio_infoframe {
  92         u8 type; /* 0x84 */
  93         u8 ver;  /* 0x01 */
  94         u8 len;  /* 0x0a */
  95
  96         u8 checksum;
  97
  98         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
  99         u8 SS01_SF24;
 100         u8 CXT04;
 101         u8 CA;
 102         u8 LFEPBL01_LSV36_DM_INH7;
 103 };
 104
 105 struct dp_audio_infoframe {
 106         u8 type; /* 0x84 */
 107         u8 len;  /* 0x1b */
 108         u8 ver;  /* 0x11 << 2 */
 109
 110         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 111         u8 SS01_SF24;
 112         u8 CXT04;
 113         u8 CA;
 114         u8 LFEPBL01_LSV36_DM_INH7;
 115 };
 116
 117 union audio_infoframe {
 118         struct hdmi_audio_infoframe hdmi;
 119         struct dp_audio_infoframe dp;
 120         u8 bytes[0];
 121 };
 122
 123 /*
 124  * CEA speaker placement:
 125  *
 126  *        FLH       FCH        FRH
 127  *  FLW    FL  FLC   FC   FRC   FR   FRW
 128  *
 129  *                                  LFE
 130  *                     TC
 131  *
 132  *          RL  RLC   RC   RRC   RR
 133  *
 134  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 135  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 136  */
 137 enum cea_speaker_placement {
 138         FL  = (1 <<  0),        /* Front Left           */
 139         FC  = (1 <<  1),        /* Front Center         */
 140         FR  = (1 <<  2),        /* Front Right          */
 141         FLC = (1 <<  3),        /* Front Left Center    */
 142         FRC = (1 <<  4),        /* Front Right Center   */
 143         RL  = (1 <<  5),        /* Rear Left            */
 144         RC  = (1 <<  6),        /* Rear Center          */
 145         RR  = (1 <<  7),        /* Rear Right           */
 146         RLC = (1 <<  8),        /* Rear Left Center     */
 147         RRC = (1 <<  9),        /* Rear Right Center    */
 148         LFE = (1 << 10),        /* Low Frequency Effect */
 149         FLW = (1 << 11),        /* Front Left Wide      */
 150         FRW = (1 << 12),        /* Front Right Wide     */
 151         FLH = (1 << 13),        /* Front Left High      */
 152         FCH = (1 << 14),        /* Front Center High    */
 153         FRH = (1 << 15),        /* Front Right High     */
 154         TC  = (1 << 16),        /* Top Center           */
 155 };
 156
 157 /*
 158  * ELD SA bits in the CEA Speaker Allocation data block
 159  */
 160 static int eld_speaker_allocation_bits[] = {
 161         [0] = FL | FR,
 162         [1] = LFE,
 163         [2] = FC,
 164         [3] = RL | RR,
 165         [4] = RC,
 166         [5] = FLC | FRC,
 167         [6] = RLC | RRC,
 168         /* the following are not defined in ELD yet */
 169         [7] = FLW | FRW,
 170         [8] = FLH | FRH,
 171         [9] = TC,
 172         [10] = FCH,
 173 };
 174
 175 struct cea_channel_speaker_allocation {
 176         int ca_index;
 177         int speakers[8];
 178
 179         /* derived values, just for convenience */
 180         int channels;
 181         int spk_mask;
 182 };
 183
 184 /*
 185  * ALSA sequence is:
 186  *
 187  *       surround40   surround41   surround50   surround51   surround71
 188  * ch0   front left   =            =            =            =
 189  * ch1   front right  =            =            =            =
 190  * ch2   rear left    =            =            =            =
 191  * ch3   rear right   =            =            =            =
 192  * ch4                LFE          center       center       center
 193  * ch5                                          LFE          LFE
 194  * ch6                                                       side left
 195  * ch7                                                       side right
 196  *
 197  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 198  */
 199 static int hdmi_channel_mapping[0x32][8] = {
 200         /* stereo */
 201         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 202         /* 2.1 */
 203         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 204         /* Dolby Surround */
 205         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 206         /* surround40 */
 207         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 208         /* 4ch */
 209         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 210         /* surround41 */
 211         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 212         /* surround50 */
 213         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 214         /* surround51 */
 215         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 216         /* 7.1 */
 217         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 218 };
 219
 220 /*
 221  * This is an ordered list!
 222  *
 223  * The preceding ones have better chances to be selected by
 224  * hdmi_channel_allocation().
 225  */
 226 static struct cea_channel_speaker_allocation channel_allocations[] = {
 227 /*                        channel:   7     6    5    4    3     2    1    0  */
 228 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 229                                  /* 2.1 */
 230 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 231                                  /* Dolby Surround */
 232 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 233                                  /* surround40 */
 234 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 235                                  /* surround41 */
 236 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 237                                  /* surround50 */
 238 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 239                                  /* surround51 */
 240 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 241                                  /* 6.1 */
 242 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 243                                  /* surround71 */
 244 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 245
 246 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 247 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 248 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 249 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 250 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 251 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 252 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 253 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 254 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 255 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 256 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 257 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 258 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 259 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 260 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 261 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 262 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 263 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 264 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 265 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 266 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 267 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 268 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 269 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 270 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 271 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 272 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 273 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 274 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 275 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 276 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 277 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 278 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 279 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 280 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 281 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 282 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 283 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 284 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 285 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 286 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 287 };
 288
 289
 290 /*
 291  * HDMI routines
 292  */
 293
 294 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
 295 {
 296         int pin_idx;
 297
 298         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 299                 if (spec->pins[pin_idx].pin_nid == pin_nid)
 300                         return pin_idx;
 301
 302         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
 303         return -EINVAL;
 304 }
 305
 306 static int hinfo_to_pin_index(struct hdmi_spec *spec,
 307                               struct hda_pcm_stream *hinfo)
 308 {
 309         int pin_idx;
 310
 311         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 312                 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
 313                         return pin_idx;
 314
 315         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
 316         return -EINVAL;
 317 }
 318
 319 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
 320 {
 321         int cvt_idx;
 322
 323         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 324                 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
 325                         return cvt_idx;
 326
 327         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
 328         return -EINVAL;
 329 }
 330
 331 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 332                         struct snd_ctl_elem_info *uinfo)
 333 {
 334         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 335         struct hdmi_spec *spec;
 336         int pin_idx;
 337
 338         spec = codec->spec;
 339         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 340
 341         pin_idx = kcontrol->private_value;
 342         uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
 343
 344         return 0;
 345 }
 346
 347 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 348                         struct snd_ctl_elem_value *ucontrol)
 349 {
 350         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 351         struct hdmi_spec *spec;
 352         int pin_idx;
 353
 354         spec = codec->spec;
 355         pin_idx = kcontrol->private_value;
 356
 357         memcpy(ucontrol->value.bytes.data,
 358                 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
 359
 360         return 0;
 361 }
 362
 363 static struct snd_kcontrol_new eld_bytes_ctl = {
 364         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 365         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 366         .name = "ELD",
 367         .info = hdmi_eld_ctl_info,
 368         .get = hdmi_eld_ctl_get,
 369 };
 370
 371 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 372                         int device)
 373 {
 374         struct snd_kcontrol *kctl;
 375         struct hdmi_spec *spec = codec->spec;
 376         int err;
 377
 378         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 379         if (!kctl)
 380                 return -ENOMEM;
 381         kctl->private_value = pin_idx;
 382         kctl->id.device = device;
 383
 384         err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
 385         if (err < 0)
 386                 return err;
 387
 388         return 0;
 389 }
 390
 391 #ifdef BE_PARANOID
 392 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 393                                 int *packet_index, int *byte_index)
 394 {
 395         int val;
 396
 397         val = snd_hda_codec_read(codec, pin_nid, 0,
 398                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 399
 400         *packet_index = val >> 5;
 401         *byte_index = val & 0x1f;
 402 }
 403 #endif
 404
 405 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 406                                 int packet_index, int byte_index)
 407 {
 408         int val;
 409
 410         val = (packet_index << 5) | (byte_index & 0x1f);
 411
 412         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 413 }
 414
 415 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 416                                 unsigned char val)
 417 {
 418         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 419 }
 420
 421 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 422 {
 423         /* Unmute */
 424         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 425                 snd_hda_codec_write(codec, pin_nid, 0,
 426                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 427         /* Disable pin out until stream is active*/
 428         snd_hda_codec_write(codec, pin_nid, 0,
 429                             AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
 430 }
 431
 432 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 433 {
 434         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 435                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 436 }
 437
 438 static void hdmi_set_channel_count(struct hda_codec *codec,
 439                                    hda_nid_t cvt_nid, int chs)
 440 {
 441         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 442                 snd_hda_codec_write(codec, cvt_nid, 0,
 443                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 444 }
 445
 446
 447 /*
 448  * Channel mapping routines
 449  */
 450
 451 /*
 452  * Compute derived values in channel_allocations[].
 453  */
 454 static void init_channel_allocations(void)
 455 {
 456         int i, j;
 457         struct cea_channel_speaker_allocation *p;
 458
 459         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 460                 p = channel_allocations + i;
 461                 p->channels = 0;
 462                 p->spk_mask = 0;
 463                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 464                         if (p->speakers[j]) {
 465                                 p->channels++;
 466                                 p->spk_mask |= p->speakers[j];
 467                         }
 468         }
 469 }
 470
 471 /*
 472  * The transformation takes two steps:
 473  *
 474  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 475  *            spk_mask => (channel_allocations[])         => ai->CA
 476  *
 477  * TODO: it could select the wrong CA from multiple candidates.
 478 */
 479 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 480 {
 481         int i;
 482         int ca = 0;
 483         int spk_mask = 0;
 484         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 485
 486         /*
 487          * CA defaults to 0 for basic stereo audio
 488          */
 489         if (channels <= 2)
 490                 return 0;
 491
 492         /*
 493          * expand ELD's speaker allocation mask
 494          *
 495          * ELD tells the speaker mask in a compact(paired) form,
 496          * expand ELD's notions to match the ones used by Audio InfoFrame.
 497          */
 498         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 499                 if (eld->spk_alloc & (1 << i))
 500                         spk_mask |= eld_speaker_allocation_bits[i];
 501         }
 502
 503         /* search for the first working match in the CA table */
 504         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 505                 if (channels == channel_allocations[i].channels &&
 506                     (spk_mask & channel_allocations[i].spk_mask) ==
 507                                 channel_allocations[i].spk_mask) {
 508                         ca = channel_allocations[i].ca_index;
 509                         break;
 510                 }
 511         }
 512
 513         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
 514         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 515                     ca, channels, buf);
 516
 517         return ca;
 518 }
 519
 520 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 521                                        hda_nid_t pin_nid)
 522 {
 523 #ifdef CONFIG_SND_DEBUG_VERBOSE
 524         int i;
 525         int slot;
 526
 527         for (i = 0; i < 8; i++) {
 528                 slot = snd_hda_codec_read(codec, pin_nid, 0,
 529                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
 530                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 531                                                 slot >> 4, slot & 0xf);
 532         }
 533 #endif
 534 }
 535
 536
 537 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 538                                        hda_nid_t pin_nid,
 539                                        int ca)
 540 {
 541         int i;
 542         int err;
 543
 544         if (hdmi_channel_mapping[ca][1] == 0) {
 545                 for (i = 0; i < channel_allocations[ca].channels; i++)
 546                         hdmi_channel_mapping[ca][i] = i | (i << 4);
 547                 for (; i < 8; i++)
 548                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
 549         }
 550
 551         for (i = 0; i < 8; i++) {
 552                 err = snd_hda_codec_write(codec, pin_nid, 0,
 553                                           AC_VERB_SET_HDMI_CHAN_SLOT,
 554                                           hdmi_channel_mapping[ca][i]);
 555                 if (err) {
 556                         snd_printdd(KERN_NOTICE
 557                                     "HDMI: channel mapping failed\n");
 558                         break;
 559                 }
 560         }
 561
 562         hdmi_debug_channel_mapping(codec, pin_nid);
 563 }
 564
 565
 566 /*
 567  * Audio InfoFrame routines
 568  */
 569
 570 /*
 571  * Enable Audio InfoFrame Transmission
 572  */
 573 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 574                                        hda_nid_t pin_nid)
 575 {
 576         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 577         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 578                                                 AC_DIPXMIT_BEST);
 579 }
 580
 581 /*
 582  * Disable Audio InfoFrame Transmission
 583  */
 584 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 585                                       hda_nid_t pin_nid)
 586 {
 587         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 588         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 589                                                 AC_DIPXMIT_DISABLE);
 590 }
 591
 592 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 593 {
 594 #ifdef CONFIG_SND_DEBUG_VERBOSE
 595         int i;
 596         int size;
 597
 598         size = snd_hdmi_get_eld_size(codec, pin_nid);
 599         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 600
 601         for (i = 0; i < 8; i++) {
 602                 size = snd_hda_codec_read(codec, pin_nid, 0,
 603                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 604                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 605         }
 606 #endif
 607 }
 608
 609 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 610 {
 611 #ifdef BE_PARANOID
 612         int i, j;
 613         int size;
 614         int pi, bi;
 615         for (i = 0; i < 8; i++) {
 616                 size = snd_hda_codec_read(codec, pin_nid, 0,
 617                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 618                 if (size == 0)
 619                         continue;
 620
 621                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 622                 for (j = 1; j < 1000; j++) {
 623                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 624                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 625                         if (pi != i)
 626                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 627                                                 bi, pi, i);
 628                         if (bi == 0) /* byte index wrapped around */
 629                                 break;
 630                 }
 631                 snd_printd(KERN_INFO
 632                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 633                         i, size, j);
 634         }
 635 #endif
 636 }
 637
 638 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 639 {
 640         u8 *bytes = (u8 *)hdmi_ai;
 641         u8 sum = 0;
 642         int i;
 643
 644         hdmi_ai->checksum = 0;
 645
 646         for (i = 0; i < sizeof(*hdmi_ai); i++)
 647                 sum += bytes[i];
 648
 649         hdmi_ai->checksum = -sum;
 650 }
 651
 652 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 653                                       hda_nid_t pin_nid,
 654                                       u8 *dip, int size)
 655 {
 656         int i;
 657
 658         hdmi_debug_dip_size(codec, pin_nid);
 659         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 660
 661         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 662         for (i = 0; i < size; i++)
 663                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 664 }
 665
 666 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 667                                     u8 *dip, int size)
 668 {
 669         u8 val;
 670         int i;
 671
 672         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 673                                                             != AC_DIPXMIT_BEST)
 674                 return false;
 675
 676         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 677         for (i = 0; i < size; i++) {
 678                 val = snd_hda_codec_read(codec, pin_nid, 0,
 679                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 680                 if (val != dip[i])
 681                         return false;
 682         }
 683
 684         return true;
 685 }
 686
 687 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
 688                                         struct snd_pcm_substream *substream)
 689 {
 690         struct hdmi_spec *spec = codec->spec;
 691         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
 692         hda_nid_t pin_nid = per_pin->pin_nid;
 693         int channels = substream->runtime->channels;
 694         struct hdmi_eld *eld;
 695         int ca;
 696         union audio_infoframe ai;
 697
 698         eld = &spec->pins[pin_idx].sink_eld;
 699         if (!eld->monitor_present)
 700                 return;
 701
 702         ca = hdmi_channel_allocation(eld, channels);
 703
 704         memset(&ai, 0, sizeof(ai));
 705         if (eld->conn_type == 0) { /* HDMI */
 706                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 707
 708                 hdmi_ai->type           = 0x84;
 709                 hdmi_ai->ver            = 0x01;
 710                 hdmi_ai->len            = 0x0a;
 711                 hdmi_ai->CC02_CT47      = channels - 1;
 712                 hdmi_ai->CA             = ca;
 713                 hdmi_checksum_audio_infoframe(hdmi_ai);
 714         } else if (eld->conn_type == 1) { /* DisplayPort */
 715                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 716
 717                 dp_ai->type             = 0x84;
 718                 dp_ai->len              = 0x1b;
 719                 dp_ai->ver              = 0x11 << 2;
 720                 dp_ai->CC02_CT47        = channels - 1;
 721                 dp_ai->CA               = ca;
 722         } else {
 723                 snd_printd("HDMI: unknown connection type at pin %d\n",
 724                             pin_nid);
 725                 return;
 726         }
 727
 728         /*
 729          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 730          * sizeof(*dp_ai) to avoid partial match/update problems when
 731          * the user switches between HDMI/DP monitors.
 732          */
 733         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 734                                         sizeof(ai))) {
 735                 snd_printdd("hdmi_setup_audio_infoframe: "
 736                             "pin=%d channels=%d\n",
 737                             pin_nid,
 738                             channels);
 739                 hdmi_setup_channel_mapping(codec, pin_nid, ca);
 740                 hdmi_stop_infoframe_trans(codec, pin_nid);
 741                 hdmi_fill_audio_infoframe(codec, pin_nid,
 742                                             ai.bytes, sizeof(ai));
 743                 hdmi_start_infoframe_trans(codec, pin_nid);
 744         }
 745 }
 746
 747
 748 /*
 749  * Unsolicited events
 750  */
 751
 752 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 753
 754 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 755 {
 756         struct hdmi_spec *spec = codec->spec;
 757         int pin_nid = res >> AC_UNSOL_RES_TAG_SHIFT;
 758         int pd = !!(res & AC_UNSOL_RES_PD);
 759         int eldv = !!(res & AC_UNSOL_RES_ELDV);
 760         int pin_idx;
 761
 762         printk(KERN_INFO
 763                 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 764                 codec->addr, pin_nid, pd, eldv);
 765
 766         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
 767         if (pin_idx < 0)
 768                 return;
 769
 770         hdmi_present_sense(&spec->pins[pin_idx], 1);
 771 }
 772
 773 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 774 {
 775         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 776         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 777         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 778         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 779
 780         printk(KERN_INFO
 781                 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 782                 codec->addr,
 783                 tag,
 784                 subtag,
 785                 cp_state,
 786                 cp_ready);
 787
 788         /* TODO */
 789         if (cp_state)
 790                 ;
 791         if (cp_ready)
 792                 ;
 793 }
 794
 795
 796 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 797 {
 798         struct hdmi_spec *spec = codec->spec;
 799         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 800         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 801
 802         if (pin_nid_to_pin_index(spec, tag) < 0) {
 803                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
 804                 return;
 805         }
 806
 807         if (subtag == 0)
 808                 hdmi_intrinsic_event(codec, res);
 809         else
 810                 hdmi_non_intrinsic_event(codec, res);
 811 }
 812
 813 /*
 814  * Callbacks
 815  */
 816
 817 /* HBR should be Non-PCM, 8 channels */
 818 #define is_hbr_format(format) \
 819         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 820
 821 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 822                               hda_nid_t pin_nid, u32 stream_tag, int format)
 823 {
 824         int pinctl;
 825         int new_pinctl = 0;
 826
 827         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 828                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 829                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 830
 831                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 832                 if (is_hbr_format(format))
 833                         new_pinctl |= AC_PINCTL_EPT_HBR;
 834                 else
 835                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 836
 837                 snd_printdd("hdmi_setup_stream: "
 838                             "NID=0x%x, %spinctl=0x%x\n",
 839                             pin_nid,
 840                             pinctl == new_pinctl ? "" : "new-",
 841                             new_pinctl);
 842
 843                 if (pinctl != new_pinctl)
 844                         snd_hda_codec_write(codec, pin_nid, 0,
 845                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 846                                             new_pinctl);
 847
 848         }
 849         if (is_hbr_format(format) && !new_pinctl) {
 850                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
 851                 return -EINVAL;
 852         }
 853
 854         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 855         return 0;
 856 }
 857
 858 /*
 859  * HDA PCM callbacks
 860  */
 861 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
 862                          struct hda_codec *codec,
 863                          struct snd_pcm_substream *substream)
 864 {
 865         struct hdmi_spec *spec = codec->spec;
 866         struct snd_pcm_runtime *runtime = substream->runtime;
 867         int pin_idx, cvt_idx, mux_idx = 0;
 868         struct hdmi_spec_per_pin *per_pin;
 869         struct hdmi_eld *eld;
 870         struct hdmi_spec_per_cvt *per_cvt = NULL;
 871         int pinctl;
 872
 873         /* Validate hinfo */
 874         pin_idx = hinfo_to_pin_index(spec, hinfo);
 875         if (snd_BUG_ON(pin_idx < 0))
 876                 return -EINVAL;
 877         per_pin = &spec->pins[pin_idx];
 878         eld = &per_pin->sink_eld;
 879
 880         /* Dynamically assign converter to stream */
 881         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 882                 per_cvt = &spec->cvts[cvt_idx];
 883
 884                 /* Must not already be assigned */
 885                 if (per_cvt->assigned)
 886                         continue;
 887                 /* Must be in pin's mux's list of converters */
 888                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 889                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 890                                 break;
 891                 /* Not in mux list */
 892                 if (mux_idx == per_pin->num_mux_nids)
 893                         continue;
 894                 break;
 895         }
 896         /* No free converters */
 897         if (cvt_idx == spec->num_cvts)
 898                 return -ENODEV;
 899
 900         /* Claim converter */
 901         per_cvt->assigned = 1;
 902         hinfo->nid = per_cvt->cvt_nid;
 903
 904         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
 905                             AC_VERB_SET_CONNECT_SEL,
 906                             mux_idx);
 907         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
 908                                     AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 909         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
 910                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 911                             pinctl | PIN_OUT);
 912         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
 913
 914         /* Initially set the converter's capabilities */
 915         hinfo->channels_min = per_cvt->channels_min;
 916         hinfo->channels_max = per_cvt->channels_max;
 917         hinfo->rates = per_cvt->rates;
 918         hinfo->formats = per_cvt->formats;
 919         hinfo->maxbps = per_cvt->maxbps;
 920
 921         /* Restrict capabilities by ELD if this isn't disabled */
 922         if (!static_hdmi_pcm && eld->eld_valid) {
 923                 snd_hdmi_eld_update_pcm_info(eld, hinfo);
 924                 if (hinfo->channels_min > hinfo->channels_max ||
 925                     !hinfo->rates || !hinfo->formats)
 926                         return -ENODEV;
 927         }
 928
 929         /* Store the updated parameters */
 930         runtime->hw.channels_min = hinfo->channels_min;
 931         runtime->hw.channels_max = hinfo->channels_max;
 932         runtime->hw.formats = hinfo->formats;
 933         runtime->hw.rates = hinfo->rates;
 934
 935         snd_pcm_hw_constraint_step(substream->runtime, 0,
 936                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
 937         return 0;
 938 }
 939
 940 /*
 941  * HDA/HDMI auto parsing
 942  */
 943 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
 944 {
 945         struct hdmi_spec *spec = codec->spec;
 946         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
 947         hda_nid_t pin_nid = per_pin->pin_nid;
 948
 949         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
 950                 snd_printk(KERN_WARNING
 951                            "HDMI: pin %d wcaps %#x "
 952                            "does not support connection list\n",
 953                            pin_nid, get_wcaps(codec, pin_nid));
 954                 return -EINVAL;
 955         }
 956
 957         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
 958                                                         per_pin->mux_nids,
 959                                                         HDA_MAX_CONNECTIONS);
 960
 961         return 0;
 962 }
 963
 964 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
 965 {
 966         struct hda_codec *codec = per_pin->codec;
 967         struct hdmi_eld *eld = &per_pin->sink_eld;
 968         hda_nid_t pin_nid = per_pin->pin_nid;
 969         /*
 970          * Always execute a GetPinSense verb here, even when called from
 971          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
 972          * response's PD bit is not the real PD value, but indicates that
 973          * the real PD value changed. An older version of the HD-audio
 974          * specification worked this way. Hence, we just ignore the data in
 975          * the unsolicited response to avoid custom WARs.
 976          */
 977         int present = snd_hda_pin_sense(codec, pin_nid);
 978         bool eld_valid = false;
 979
 980         memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
 981
 982         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
 983         if (eld->monitor_present)
 984                 eld_valid       = !!(present & AC_PINSENSE_ELDV);
 985
 986         printk(KERN_INFO
 987                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 988                 codec->addr, pin_nid, eld->monitor_present, eld_valid);
 989
 990         if (eld_valid) {
 991                 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
 992                         snd_hdmi_show_eld(eld);
 993                 else if (repoll) {
 994                         queue_delayed_work(codec->bus->workq,
 995                                            &per_pin->work,
 996                                            msecs_to_jiffies(300));
 997                 }
 998         }
 999
1000         snd_hda_input_jack_report(codec, pin_nid);
1001 }
1002
1003 static void hdmi_repoll_eld(struct work_struct *work)
1004 {
1005         struct hdmi_spec_per_pin *per_pin =
1006         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1007
1008         if (per_pin->repoll_count++ > 6)
1009                 per_pin->repoll_count = 0;
1010
1011         hdmi_present_sense(per_pin, per_pin->repoll_count);
1012 }
1013
1014 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1015 {
1016         struct hdmi_spec *spec = codec->spec;
1017         unsigned int caps, config;
1018         int pin_idx;
1019         struct hdmi_spec_per_pin *per_pin;
1020         int err;
1021
1022         caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1023         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1024                 return 0;
1025
1026         config = snd_hda_codec_read(codec, pin_nid, 0,
1027                                 AC_VERB_GET_CONFIG_DEFAULT, 0);
1028         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1029                 return 0;
1030
1031         if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1032                 return -E2BIG;
1033
1034         pin_idx = spec->num_pins;
1035         per_pin = &spec->pins[pin_idx];
1036
1037         per_pin->pin_nid = pin_nid;
1038
1039         err = hdmi_read_pin_conn(codec, pin_idx);
1040         if (err < 0)
1041                 return err;
1042
1043         spec->num_pins++;
1044
1045         return 0;
1046 }
1047
1048 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1049 {
1050         struct hdmi_spec *spec = codec->spec;
1051         int cvt_idx;
1052         struct hdmi_spec_per_cvt *per_cvt;
1053         unsigned int chans;
1054         int err;
1055
1056         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1057                 return -E2BIG;
1058
1059         chans = get_wcaps(codec, cvt_nid);
1060         chans = get_wcaps_channels(chans);
1061
1062         cvt_idx = spec->num_cvts;
1063         per_cvt = &spec->cvts[cvt_idx];
1064
1065         per_cvt->cvt_nid = cvt_nid;
1066         per_cvt->channels_min = 2;
1067         if (chans <= 16)
1068                 per_cvt->channels_max = chans;
1069
1070         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1071                                           &per_cvt->rates,
1072                                           &per_cvt->formats,
1073                                           &per_cvt->maxbps);
1074         if (err < 0)
1075                 return err;
1076
1077         spec->num_cvts++;
1078
1079         return 0;
1080 }
1081
1082 static int hdmi_parse_codec(struct hda_codec *codec)
1083 {
1084         hda_nid_t nid;
1085         int i, nodes;
1086
1087         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1088         if (!nid || nodes < 0) {
1089                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1090                 return -EINVAL;
1091         }
1092
1093         for (i = 0; i < nodes; i++, nid++) {
1094                 unsigned int caps;
1095                 unsigned int type;
1096
1097                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1098                 type = get_wcaps_type(caps);
1099
1100                 if (!(caps & AC_WCAP_DIGITAL))
1101                         continue;
1102
1103                 switch (type) {
1104                 case AC_WID_AUD_OUT:
1105                         hdmi_add_cvt(codec, nid);
1106                         break;
1107                 case AC_WID_PIN:
1108                         hdmi_add_pin(codec, nid);
1109                         break;
1110                 }
1111         }
1112
1113         /*
1114          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1115          * can be lost and presence sense verb will become inaccurate if the
1116          * HDA link is powered off at hot plug or hw initialization time.
1117          */
1118 #ifdef CONFIG_SND_HDA_POWER_SAVE
1119         if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1120               AC_PWRST_EPSS))
1121                 codec->bus->power_keep_link_on = 1;
1122 #endif
1123
1124         return 0;
1125 }
1126
1127 /*
1128  */
1129 static char *generic_hdmi_pcm_names[MAX_HDMI_PINS] = {
1130         "HDMI 0",
1131         "HDMI 1",
1132         "HDMI 2",
1133         "HDMI 3",
1134 };
1135
1136 /*
1137  * HDMI callbacks
1138  */
1139
1140 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1141                                            struct hda_codec *codec,
1142                                            unsigned int stream_tag,
1143                                            unsigned int format,
1144                                            struct snd_pcm_substream *substream)
1145 {
1146         hda_nid_t cvt_nid = hinfo->nid;
1147         struct hdmi_spec *spec = codec->spec;
1148         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1149         hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1150
1151         hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1152
1153         hdmi_setup_audio_infoframe(codec, pin_idx, substream);
1154
1155         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1156 }
1157
1158 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1159                                              struct hda_codec *codec,
1160                                              struct snd_pcm_substream *substream)
1161 {
1162         struct hdmi_spec *spec = codec->spec;
1163         int cvt_idx, pin_idx;
1164         struct hdmi_spec_per_cvt *per_cvt;
1165         struct hdmi_spec_per_pin *per_pin;
1166         int pinctl;
1167
1168         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1169
1170         if (hinfo->nid) {
1171                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1172                 if (snd_BUG_ON(cvt_idx < 0))
1173                         return -EINVAL;
1174                 per_cvt = &spec->cvts[cvt_idx];
1175
1176                 snd_BUG_ON(!per_cvt->assigned);
1177                 per_cvt->assigned = 0;
1178                 hinfo->nid = 0;
1179
1180                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1181                 if (snd_BUG_ON(pin_idx < 0))
1182                         return -EINVAL;
1183                 per_pin = &spec->pins[pin_idx];
1184
1185                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1186                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1187                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1188                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1189                                     pinctl & ~PIN_OUT);
1190                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1191         }
1192
1193         return 0;
1194 }
1195
1196 static const struct hda_pcm_ops generic_ops = {
1197         .open = hdmi_pcm_open,
1198         .prepare = generic_hdmi_playback_pcm_prepare,
1199         .cleanup = generic_hdmi_playback_pcm_cleanup,
1200 };
1201
1202 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1203 {
1204         struct hdmi_spec *spec = codec->spec;
1205         int pin_idx;
1206
1207         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1208                 struct hda_pcm *info;
1209                 struct hda_pcm_stream *pstr;
1210
1211                 info = &spec->pcm_rec[pin_idx];
1212                 info->name = generic_hdmi_pcm_names[pin_idx];
1213                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1214
1215                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1216                 pstr->substreams = 1;
1217                 pstr->ops = generic_ops;
1218                 /* other pstr fields are set in open */
1219         }
1220
1221         codec->num_pcms = spec->num_pins;
1222         codec->pcm_info = spec->pcm_rec;
1223
1224         return 0;
1225 }
1226
1227 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1228 {
1229         int err;
1230         char hdmi_str[32];
1231         struct hdmi_spec *spec = codec->spec;
1232         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1233         int pcmdev = spec->pcm_rec[pin_idx].device;
1234
1235         snprintf(hdmi_str, sizeof(hdmi_str), "HDMI/DP,pcm=%d", pcmdev);
1236
1237         err = snd_hda_input_jack_add(codec, per_pin->pin_nid,
1238                              SND_JACK_VIDEOOUT, pcmdev > 0 ? hdmi_str : NULL);
1239         if (err < 0)
1240                 return err;
1241
1242         hdmi_present_sense(per_pin, 0);
1243         return 0;
1244 }
1245
1246 static int generic_hdmi_build_controls(struct hda_codec *codec)
1247 {
1248         struct hdmi_spec *spec = codec->spec;
1249         int err;
1250         int pin_idx;
1251
1252         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1253                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1254
1255                 err = generic_hdmi_build_jack(codec, pin_idx);
1256                 if (err < 0)
1257                         return err;
1258
1259                 err = snd_hda_create_spdif_out_ctls(codec,
1260                                                     per_pin->pin_nid,
1261                                                     per_pin->mux_nids[0]);
1262                 if (err < 0)
1263                         return err;
1264                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1265
1266                 /* add control for ELD Bytes */
1267                 err = hdmi_create_eld_ctl(codec,
1268                                         pin_idx,
1269                                         spec->pcm_rec[pin_idx].device);
1270
1271                 if (err < 0)
1272                         return err;
1273         }
1274
1275         return 0;
1276 }
1277
1278 static int generic_hdmi_init(struct hda_codec *codec)
1279 {
1280         struct hdmi_spec *spec = codec->spec;
1281         int pin_idx;
1282
1283         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1284                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1285                 hda_nid_t pin_nid = per_pin->pin_nid;
1286                 struct hdmi_eld *eld = &per_pin->sink_eld;
1287
1288                 hdmi_init_pin(codec, pin_nid);
1289                 snd_hda_codec_write(codec, pin_nid, 0,
1290                                     AC_VERB_SET_UNSOLICITED_ENABLE,
1291                                     AC_USRSP_EN | pin_nid);
1292
1293                 per_pin->codec = codec;
1294                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1295                 snd_hda_eld_proc_new(codec, eld, pin_idx);
1296         }
1297         return 0;
1298 }
1299
1300 static void generic_hdmi_free(struct hda_codec *codec)
1301 {
1302         struct hdmi_spec *spec = codec->spec;
1303         int pin_idx;
1304
1305         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1306                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1307                 struct hdmi_eld *eld = &per_pin->sink_eld;
1308
1309                 cancel_delayed_work(&per_pin->work);
1310                 snd_hda_eld_proc_free(codec, eld);
1311         }
1312         snd_hda_input_jack_free(codec);
1313
1314         flush_workqueue(codec->bus->workq);
1315         kfree(spec);
1316 }
1317
1318 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1319         .init                   = generic_hdmi_init,
1320         .free                   = generic_hdmi_free,
1321         .build_pcms             = generic_hdmi_build_pcms,
1322         .build_controls         = generic_hdmi_build_controls,
1323         .unsol_event            = hdmi_unsol_event,
1324 };
1325
1326 static int patch_generic_hdmi(struct hda_codec *codec)
1327 {
1328         struct hdmi_spec *spec;
1329
1330         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1331         if (spec == NULL)
1332                 return -ENOMEM;
1333
1334         codec->spec = spec;
1335         if (hdmi_parse_codec(codec) < 0) {
1336                 codec->spec = NULL;
1337                 kfree(spec);
1338                 return -EINVAL;
1339         }
1340         codec->patch_ops = generic_hdmi_patch_ops;
1341
1342         init_channel_allocations();
1343
1344         return 0;
1345 }
1346
1347 /*
1348  * Shared non-generic implementations
1349  */
1350
1351 static int simple_playback_build_pcms(struct hda_codec *codec)
1352 {
1353         struct hdmi_spec *spec = codec->spec;
1354         struct hda_pcm *info = spec->pcm_rec;
1355         int i;
1356
1357         codec->num_pcms = spec->num_cvts;
1358         codec->pcm_info = info;
1359
1360         for (i = 0; i < codec->num_pcms; i++, info++) {
1361                 unsigned int chans;
1362                 struct hda_pcm_stream *pstr;
1363
1364                 chans = get_wcaps(codec, spec->cvts[i].cvt_nid);
1365                 chans = get_wcaps_channels(chans);
1366
1367                 info->name = generic_hdmi_pcm_names[i];
1368                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1369                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1370                 snd_BUG_ON(!spec->pcm_playback);
1371                 *pstr = *spec->pcm_playback;
1372                 pstr->nid = spec->cvts[i].cvt_nid;
1373                 if (pstr->channels_max <= 2 && chans && chans <= 16)
1374                         pstr->channels_max = chans;
1375         }
1376
1377         return 0;
1378 }
1379
1380 static int simple_playback_build_controls(struct hda_codec *codec)
1381 {
1382         struct hdmi_spec *spec = codec->spec;
1383         int err;
1384         int i;
1385
1386         for (i = 0; i < codec->num_pcms; i++) {
1387                 err = snd_hda_create_spdif_out_ctls(codec,
1388                                                     spec->cvts[i].cvt_nid,
1389                                                     spec->cvts[i].cvt_nid);
1390                 if (err < 0)
1391                         return err;
1392         }
1393
1394         return 0;
1395 }
1396
1397 static void simple_playback_free(struct hda_codec *codec)
1398 {
1399         struct hdmi_spec *spec = codec->spec;
1400
1401         kfree(spec);
1402 }
1403
1404 /*
1405  * Nvidia specific implementations
1406  */
1407
1408 #define Nv_VERB_SET_Channel_Allocation          0xF79
1409 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1410 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1411 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1412
1413 #define nvhdmi_master_con_nid_7x        0x04
1414 #define nvhdmi_master_pin_nid_7x        0x05
1415
1416 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1417         /*front, rear, clfe, rear_surr */
1418         0x6, 0x8, 0xa, 0xc,
1419 };
1420
1421 static const struct hda_verb nvhdmi_basic_init_7x[] = {
1422         /* set audio protect on */
1423         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1424         /* enable digital output on pin widget */
1425         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1426         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1427         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1428         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1429         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1430         {} /* terminator */
1431 };
1432
1433 #ifdef LIMITED_RATE_FMT_SUPPORT
1434 /* support only the safe format and rate */
1435 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1436 #define SUPPORTED_MAXBPS        16
1437 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1438 #else
1439 /* support all rates and formats */
1440 #define SUPPORTED_RATES \
1441         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1442         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1443          SNDRV_PCM_RATE_192000)
1444 #define SUPPORTED_MAXBPS        24
1445 #define SUPPORTED_FORMATS \
1446         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1447 #endif
1448
1449 static int nvhdmi_7x_init(struct hda_codec *codec)
1450 {
1451         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1452         return 0;
1453 }
1454
1455 static unsigned int channels_2_6_8[] = {
1456         2, 6, 8
1457 };
1458
1459 static unsigned int channels_2_8[] = {
1460         2, 8
1461 };
1462
1463 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1464         .count = ARRAY_SIZE(channels_2_6_8),
1465         .list = channels_2_6_8,
1466         .mask = 0,
1467 };
1468
1469 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1470         .count = ARRAY_SIZE(channels_2_8),
1471         .list = channels_2_8,
1472         .mask = 0,
1473 };
1474
1475 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1476                                     struct hda_codec *codec,
1477                                     struct snd_pcm_substream *substream)
1478 {
1479         struct hdmi_spec *spec = codec->spec;
1480         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1481
1482         switch (codec->preset->id) {
1483         case 0x10de0002:
1484         case 0x10de0003:
1485         case 0x10de0005:
1486         case 0x10de0006:
1487                 hw_constraints_channels = &hw_constraints_2_8_channels;
1488                 break;
1489         case 0x10de0007:
1490                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1491                 break;
1492         default:
1493                 break;
1494         }
1495
1496         if (hw_constraints_channels != NULL) {
1497                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1498                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1499                                 hw_constraints_channels);
1500         } else {
1501                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1502                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1503         }
1504
1505         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1506 }
1507
1508 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1509                                      struct hda_codec *codec,
1510                                      struct snd_pcm_substream *substream)
1511 {
1512         struct hdmi_spec *spec = codec->spec;
1513         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1514 }
1515
1516 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1517                                        struct hda_codec *codec,
1518                                        unsigned int stream_tag,
1519                                        unsigned int format,
1520                                        struct snd_pcm_substream *substream)
1521 {
1522         struct hdmi_spec *spec = codec->spec;
1523         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1524                                              stream_tag, format, substream);
1525 }
1526
1527 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1528                                                     int channels)
1529 {
1530         unsigned int chanmask;
1531         int chan = channels ? (channels - 1) : 1;
1532
1533         switch (channels) {
1534         default:
1535         case 0:
1536         case 2:
1537                 chanmask = 0x00;
1538                 break;
1539         case 4:
1540                 chanmask = 0x08;
1541                 break;
1542         case 6:
1543                 chanmask = 0x0b;
1544                 break;
1545         case 8:
1546                 chanmask = 0x13;
1547                 break;
1548         }
1549
1550         /* Set the audio infoframe channel allocation and checksum fields.  The
1551          * channel count is computed implicitly by the hardware. */
1552         snd_hda_codec_write(codec, 0x1, 0,
1553                         Nv_VERB_SET_Channel_Allocation, chanmask);
1554
1555         snd_hda_codec_write(codec, 0x1, 0,
1556                         Nv_VERB_SET_Info_Frame_Checksum,
1557                         (0x71 - chan - chanmask));
1558 }
1559
1560 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1561                                    struct hda_codec *codec,
1562                                    struct snd_pcm_substream *substream)
1563 {
1564         struct hdmi_spec *spec = codec->spec;
1565         int i;
1566
1567         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1568                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1569         for (i = 0; i < 4; i++) {
1570                 /* set the stream id */
1571                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1572                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1573                 /* set the stream format */
1574                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1575                                 AC_VERB_SET_STREAM_FORMAT, 0);
1576         }
1577
1578         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1579          * streams are disabled. */
1580         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1581
1582         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1583 }
1584
1585 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1586                                      struct hda_codec *codec,
1587                                      unsigned int stream_tag,
1588                                      unsigned int format,
1589                                      struct snd_pcm_substream *substream)
1590 {
1591         int chs;
1592         unsigned int dataDCC2, channel_id;
1593         int i;
1594         struct hdmi_spec *spec = codec->spec;
1595         struct hda_spdif_out *spdif =
1596                 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1597
1598         mutex_lock(&codec->spdif_mutex);
1599
1600         chs = substream->runtime->channels;
1601
1602         dataDCC2 = 0x2;
1603
1604         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1605         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1606                 snd_hda_codec_write(codec,
1607                                 nvhdmi_master_con_nid_7x,
1608                                 0,
1609                                 AC_VERB_SET_DIGI_CONVERT_1,
1610                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1611
1612         /* set the stream id */
1613         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1614                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1615
1616         /* set the stream format */
1617         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1618                         AC_VERB_SET_STREAM_FORMAT, format);
1619
1620         /* turn on again (if needed) */
1621         /* enable and set the channel status audio/data flag */
1622         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1623                 snd_hda_codec_write(codec,
1624                                 nvhdmi_master_con_nid_7x,
1625                                 0,
1626                                 AC_VERB_SET_DIGI_CONVERT_1,
1627                                 spdif->ctls & 0xff);
1628                 snd_hda_codec_write(codec,
1629                                 nvhdmi_master_con_nid_7x,
1630                                 0,
1631                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1632         }
1633
1634         for (i = 0; i < 4; i++) {
1635                 if (chs == 2)
1636                         channel_id = 0;
1637                 else
1638                         channel_id = i * 2;
1639
1640                 /* turn off SPDIF once;
1641                  *otherwise the IEC958 bits won't be updated
1642                  */
1643                 if (codec->spdif_status_reset &&
1644                 (spdif->ctls & AC_DIG1_ENABLE))
1645                         snd_hda_codec_write(codec,
1646                                 nvhdmi_con_nids_7x[i],
1647                                 0,
1648                                 AC_VERB_SET_DIGI_CONVERT_1,
1649                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1650                 /* set the stream id */
1651                 snd_hda_codec_write(codec,
1652                                 nvhdmi_con_nids_7x[i],
1653                                 0,
1654                                 AC_VERB_SET_CHANNEL_STREAMID,
1655                                 (stream_tag << 4) | channel_id);
1656                 /* set the stream format */
1657                 snd_hda_codec_write(codec,
1658                                 nvhdmi_con_nids_7x[i],
1659                                 0,
1660                                 AC_VERB_SET_STREAM_FORMAT,
1661                                 format);
1662                 /* turn on again (if needed) */
1663                 /* enable and set the channel status audio/data flag */
1664                 if (codec->spdif_status_reset &&
1665                 (spdif->ctls & AC_DIG1_ENABLE)) {
1666                         snd_hda_codec_write(codec,
1667                                         nvhdmi_con_nids_7x[i],
1668                                         0,
1669                                         AC_VERB_SET_DIGI_CONVERT_1,
1670                                         spdif->ctls & 0xff);
1671                         snd_hda_codec_write(codec,
1672                                         nvhdmi_con_nids_7x[i],
1673                                         0,
1674                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1675                 }
1676         }
1677
1678         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1679
1680         mutex_unlock(&codec->spdif_mutex);
1681         return 0;
1682 }
1683
1684 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1685         .substreams = 1,
1686         .channels_min = 2,
1687         .channels_max = 8,
1688         .nid = nvhdmi_master_con_nid_7x,
1689         .rates = SUPPORTED_RATES,
1690         .maxbps = SUPPORTED_MAXBPS,
1691         .formats = SUPPORTED_FORMATS,
1692         .ops = {
1693                 .open = simple_playback_pcm_open,
1694                 .close = nvhdmi_8ch_7x_pcm_close,
1695                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1696         },
1697 };
1698
1699 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1700         .substreams = 1,
1701         .channels_min = 2,
1702         .channels_max = 2,
1703         .nid = nvhdmi_master_con_nid_7x,
1704         .rates = SUPPORTED_RATES,
1705         .maxbps = SUPPORTED_MAXBPS,
1706         .formats = SUPPORTED_FORMATS,
1707         .ops = {
1708                 .open = simple_playback_pcm_open,
1709                 .close = simple_playback_pcm_close,
1710                 .prepare = simple_playback_pcm_prepare
1711         },
1712 };
1713
1714 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1715         .build_controls = simple_playback_build_controls,
1716         .build_pcms = simple_playback_build_pcms,
1717         .init = nvhdmi_7x_init,
1718         .free = simple_playback_free,
1719 };
1720
1721 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1722         .build_controls = simple_playback_build_controls,
1723         .build_pcms = simple_playback_build_pcms,
1724         .init = nvhdmi_7x_init,
1725         .free = simple_playback_free,
1726 };
1727
1728 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1729 {
1730         struct hdmi_spec *spec;
1731
1732         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1733         if (spec == NULL)
1734                 return -ENOMEM;
1735
1736         codec->spec = spec;
1737
1738         spec->multiout.num_dacs = 0;  /* no analog */
1739         spec->multiout.max_channels = 2;
1740         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1741         spec->num_cvts = 1;
1742         spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x;
1743         spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1744
1745         codec->patch_ops = nvhdmi_patch_ops_2ch;
1746
1747         return 0;
1748 }
1749
1750 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1751 {
1752         struct hdmi_spec *spec;
1753         int err = patch_nvhdmi_2ch(codec);
1754
1755         if (err < 0)
1756                 return err;
1757         spec = codec->spec;
1758         spec->multiout.max_channels = 8;
1759         spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1760         codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1761
1762         /* Initialize the audio infoframe channel mask and checksum to something
1763          * valid */
1764         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1765
1766         return 0;
1767 }
1768
1769 /*
1770  * ATI-specific implementations
1771  *
1772  * FIXME: we may omit the whole this and use the generic code once after
1773  * it's confirmed to work.
1774  */
1775
1776 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1777 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1778
1779 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1780                                         struct hda_codec *codec,
1781                                         unsigned int stream_tag,
1782                                         unsigned int format,
1783                                         struct snd_pcm_substream *substream)
1784 {
1785         struct hdmi_spec *spec = codec->spec;
1786         int chans = substream->runtime->channels;
1787         int i, err;
1788
1789         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1790                                           substream);
1791         if (err < 0)
1792                 return err;
1793         snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1794                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1795         /* FIXME: XXX */
1796         for (i = 0; i < chans; i++) {
1797                 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1798                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1799                                     (i << 4) | i);
1800         }
1801         return 0;
1802 }
1803
1804 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1805         .substreams = 1,
1806         .channels_min = 2,
1807         .channels_max = 2,
1808         .nid = ATIHDMI_CVT_NID,
1809         .ops = {
1810                 .open = simple_playback_pcm_open,
1811                 .close = simple_playback_pcm_close,
1812                 .prepare = atihdmi_playback_pcm_prepare
1813         },
1814 };
1815
1816 static const struct hda_verb atihdmi_basic_init[] = {
1817         /* enable digital output on pin widget */
1818         { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1819         {} /* terminator */
1820 };
1821
1822 static int atihdmi_init(struct hda_codec *codec)
1823 {
1824         struct hdmi_spec *spec = codec->spec;
1825
1826         snd_hda_sequence_write(codec, atihdmi_basic_init);
1827         /* SI codec requires to unmute the pin */
1828         if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP)
1829                 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0,
1830                                     AC_VERB_SET_AMP_GAIN_MUTE,
1831                                     AMP_OUT_UNMUTE);
1832         return 0;
1833 }
1834
1835 static const struct hda_codec_ops atihdmi_patch_ops = {
1836         .build_controls = simple_playback_build_controls,
1837         .build_pcms = simple_playback_build_pcms,
1838         .init = atihdmi_init,
1839         .free = simple_playback_free,
1840 };
1841
1842
1843 static int patch_atihdmi(struct hda_codec *codec)
1844 {
1845         struct hdmi_spec *spec;
1846
1847         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1848         if (spec == NULL)
1849                 return -ENOMEM;
1850
1851         codec->spec = spec;
1852
1853         spec->multiout.num_dacs = 0;      /* no analog */
1854         spec->multiout.max_channels = 2;
1855         spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1856         spec->num_cvts = 1;
1857         spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID;
1858         spec->pins[0].pin_nid = ATIHDMI_PIN_NID;
1859         spec->pcm_playback = &atihdmi_pcm_digital_playback;
1860
1861         codec->patch_ops = atihdmi_patch_ops;
1862
1863         return 0;
1864 }
1865
1866
1867 /*
1868  * patch entries
1869  */
1870 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1871 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1872 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1873 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1874 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1875 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1876 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1877 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1878 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1879 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1880 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1881 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1882 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1883 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
1884 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
1885 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
1886 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
1887 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
1888 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
1889 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
1890 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
1891 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
1892 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
1893 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
1894 /* 17 is known to be absent */
1895 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
1896 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
1897 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
1898 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
1899 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
1900 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
1901 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
1902 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
1903 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
1904 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
1905 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1906 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1907 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1908 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1909 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1910 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1911 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1912 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1913 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1914 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1915 {} /* terminator */
1916 };
1917
1918 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1919 MODULE_ALIAS("snd-hda-codec-id:10027919");
1920 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1921 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1922 MODULE_ALIAS("snd-hda-codec-id:10951390");
1923 MODULE_ALIAS("snd-hda-codec-id:10951392");
1924 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1925 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1926 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1927 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1928 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1929 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1930 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1931 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1932 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1933 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1934 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1935 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1936 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1937 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1938 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1939 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1940 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1941 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1942 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1943 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1944 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1945 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1946 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1947 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1948 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1949 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1950 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1951 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1952 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1953 MODULE_ALIAS("snd-hda-codec-id:80860054");
1954 MODULE_ALIAS("snd-hda-codec-id:80862801");
1955 MODULE_ALIAS("snd-hda-codec-id:80862802");
1956 MODULE_ALIAS("snd-hda-codec-id:80862803");
1957 MODULE_ALIAS("snd-hda-codec-id:80862804");
1958 MODULE_ALIAS("snd-hda-codec-id:80862805");
1959 MODULE_ALIAS("snd-hda-codec-id:80862806");
1960 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1961
1962 MODULE_LICENSE("GPL");
1963 MODULE_DESCRIPTION("HDMI HD-audio codec");
1964 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1965 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1966 MODULE_ALIAS("snd-hda-codec-atihdmi");
1967
1968 static struct hda_codec_preset_list intel_list = {
1969         .preset = snd_hda_preset_hdmi,
1970         .owner = THIS_MODULE,
1971 };
1972
1973 static int __init patch_hdmi_init(void)
1974 {
1975         return snd_hda_add_codec_preset(&intel_list);
1976 }
1977
1978 static void __exit patch_hdmi_exit(void)
1979 {
1980         snd_hda_delete_codec_preset(&intel_list);
1981 }
1982
1983 module_init(patch_hdmi_init)
1984 module_exit(patch_hdmi_exit)