sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *
  10  *  Authors:
  11  *                      Wu Fengguang <wfg@linux.intel.com>
  12  *
  13  *  Maintained by:
  14  *                      Wu Fengguang <wfg@linux.intel.com>
  15  *
  16  *  This program is free software; you can redistribute it and/or modify it
  17  *  under the terms of the GNU General Public License as published by the Free
  18  *  Software Foundation; either version 2 of the License, or (at your option)
  19  *  any later version.
  20  *
  21  *  This program is distributed in the hope that it will be useful, but
  22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  24  *  for more details.
  25  *
  26  *  You should have received a copy of the GNU General Public License
  27  *  along with this program; if not, write to the Free Software Foundation,
  28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/delay.h>
  33 #include <linux/slab.h>
  34 #include <linux/module.h>
  35 #include <sound/core.h>
  36 #include <sound/jack.h>
  37 #include "hda_codec.h"
  38 #include "hda_local.h"
  39
  40 static bool static_hdmi_pcm;
  41 module_param(static_hdmi_pcm, bool, 0644);
  42 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  43
  44 /*
  45  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  46  * could support N independent pipes, each of them can be connected to one or
  47  * more ports (DVI, HDMI or DisplayPort).
  48  *
  49  * The HDA correspondence of pipes/ports are converter/pin nodes.
  50  */
  51 #define MAX_HDMI_CVTS   4
  52 #define MAX_HDMI_PINS   4
  53
  54 struct hdmi_spec_per_cvt {
  55         hda_nid_t cvt_nid;
  56         int assigned;
  57         unsigned int channels_min;
  58         unsigned int channels_max;
  59         u32 rates;
  60         u64 formats;
  61         unsigned int maxbps;
  62 };
  63
  64 struct hdmi_spec_per_pin {
  65         hda_nid_t pin_nid;
  66         int num_mux_nids;
  67         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  68
  69         struct hda_codec *codec;
  70         struct hdmi_eld sink_eld;
  71         struct delayed_work work;
  72         int repoll_count;
  73 };
  74
  75 struct hdmi_spec {
  76         int num_cvts;
  77         struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
  78
  79         int num_pins;
  80         struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
  81         struct hda_pcm pcm_rec[MAX_HDMI_PINS];
  82
  83         /*
  84          * Non-generic ATI/NVIDIA specific
  85          */
  86         struct hda_multi_out multiout;
  87         const struct hda_pcm_stream *pcm_playback;
  88 };
  89
  90
  91 struct hdmi_audio_infoframe {
  92         u8 type; /* 0x84 */
  93         u8 ver;  /* 0x01 */
  94         u8 len;  /* 0x0a */
  95
  96         u8 checksum;
  97
  98         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
  99         u8 SS01_SF24;
 100         u8 CXT04;
 101         u8 CA;
 102         u8 LFEPBL01_LSV36_DM_INH7;
 103 };
 104
 105 struct dp_audio_infoframe {
 106         u8 type; /* 0x84 */
 107         u8 len;  /* 0x1b */
 108         u8 ver;  /* 0x11 << 2 */
 109
 110         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 111         u8 SS01_SF24;
 112         u8 CXT04;
 113         u8 CA;
 114         u8 LFEPBL01_LSV36_DM_INH7;
 115 };
 116
 117 union audio_infoframe {
 118         struct hdmi_audio_infoframe hdmi;
 119         struct dp_audio_infoframe dp;
 120         u8 bytes[0];
 121 };
 122
 123 /*
 124  * CEA speaker placement:
 125  *
 126  *        FLH       FCH        FRH
 127  *  FLW    FL  FLC   FC   FRC   FR   FRW
 128  *
 129  *                                  LFE
 130  *                     TC
 131  *
 132  *          RL  RLC   RC   RRC   RR
 133  *
 134  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 135  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 136  */
 137 enum cea_speaker_placement {
 138         FL  = (1 <<  0),        /* Front Left           */
 139         FC  = (1 <<  1),        /* Front Center         */
 140         FR  = (1 <<  2),        /* Front Right          */
 141         FLC = (1 <<  3),        /* Front Left Center    */
 142         FRC = (1 <<  4),        /* Front Right Center   */
 143         RL  = (1 <<  5),        /* Rear Left            */
 144         RC  = (1 <<  6),        /* Rear Center          */
 145         RR  = (1 <<  7),        /* Rear Right           */
 146         RLC = (1 <<  8),        /* Rear Left Center     */
 147         RRC = (1 <<  9),        /* Rear Right Center    */
 148         LFE = (1 << 10),        /* Low Frequency Effect */
 149         FLW = (1 << 11),        /* Front Left Wide      */
 150         FRW = (1 << 12),        /* Front Right Wide     */
 151         FLH = (1 << 13),        /* Front Left High      */
 152         FCH = (1 << 14),        /* Front Center High    */
 153         FRH = (1 << 15),        /* Front Right High     */
 154         TC  = (1 << 16),        /* Top Center           */
 155 };
 156
 157 /*
 158  * ELD SA bits in the CEA Speaker Allocation data block
 159  */
 160 static int eld_speaker_allocation_bits[] = {
 161         [0] = FL | FR,
 162         [1] = LFE,
 163         [2] = FC,
 164         [3] = RL | RR,
 165         [4] = RC,
 166         [5] = FLC | FRC,
 167         [6] = RLC | RRC,
 168         /* the following are not defined in ELD yet */
 169         [7] = FLW | FRW,
 170         [8] = FLH | FRH,
 171         [9] = TC,
 172         [10] = FCH,
 173 };
 174
 175 struct cea_channel_speaker_allocation {
 176         int ca_index;
 177         int speakers[8];
 178
 179         /* derived values, just for convenience */
 180         int channels;
 181         int spk_mask;
 182 };
 183
 184 /*
 185  * ALSA sequence is:
 186  *
 187  *       surround40   surround41   surround50   surround51   surround71
 188  * ch0   front left   =            =            =            =
 189  * ch1   front right  =            =            =            =
 190  * ch2   rear left    =            =            =            =
 191  * ch3   rear right   =            =            =            =
 192  * ch4                LFE          center       center       center
 193  * ch5                                          LFE          LFE
 194  * ch6                                                       side left
 195  * ch7                                                       side right
 196  *
 197  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 198  */
 199 static int hdmi_channel_mapping[0x32][8] = {
 200         /* stereo */
 201         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 202         /* 2.1 */
 203         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 204         /* Dolby Surround */
 205         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 206         /* surround40 */
 207         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 208         /* 4ch */
 209         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 210         /* surround41 */
 211         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 212         /* surround50 */
 213         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 214         /* surround51 */
 215         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 216         /* 7.1 */
 217         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 218 };
 219
 220 /*
 221  * This is an ordered list!
 222  *
 223  * The preceding ones have better chances to be selected by
 224  * hdmi_channel_allocation().
 225  */
 226 static struct cea_channel_speaker_allocation channel_allocations[] = {
 227 /*                        channel:   7     6    5    4    3     2    1    0  */
 228 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 229                                  /* 2.1 */
 230 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 231                                  /* Dolby Surround */
 232 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 233                                  /* surround40 */
 234 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 235                                  /* surround41 */
 236 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 237                                  /* surround50 */
 238 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 239                                  /* surround51 */
 240 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 241                                  /* 6.1 */
 242 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 243                                  /* surround71 */
 244 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 245
 246 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 247 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 248 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 249 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 250 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 251 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 252 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 253 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 254 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 255 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 256 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 257 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 258 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 259 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 260 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 261 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 262 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 263 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 264 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 265 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 266 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 267 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 268 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 269 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 270 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 271 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 272 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 273 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 274 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 275 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 276 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 277 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 278 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 279 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 280 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 281 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 282 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 283 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 284 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 285 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 286 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 287 };
 288
 289
 290 /*
 291  * HDMI routines
 292  */
 293
 294 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
 295 {
 296         int pin_idx;
 297
 298         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 299                 if (spec->pins[pin_idx].pin_nid == pin_nid)
 300                         return pin_idx;
 301
 302         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
 303         return -EINVAL;
 304 }
 305
 306 static int hinfo_to_pin_index(struct hdmi_spec *spec,
 307                               struct hda_pcm_stream *hinfo)
 308 {
 309         int pin_idx;
 310
 311         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 312                 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
 313                         return pin_idx;
 314
 315         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
 316         return -EINVAL;
 317 }
 318
 319 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
 320 {
 321         int cvt_idx;
 322
 323         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 324                 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
 325                         return cvt_idx;
 326
 327         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
 328         return -EINVAL;
 329 }
 330
 331 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 332                         struct snd_ctl_elem_info *uinfo)
 333 {
 334         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 335         struct hdmi_spec *spec;
 336         int pin_idx;
 337
 338         spec = codec->spec;
 339         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 340
 341         pin_idx = kcontrol->private_value;
 342         uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
 343
 344         return 0;
 345 }
 346
 347 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 348                         struct snd_ctl_elem_value *ucontrol)
 349 {
 350         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 351         struct hdmi_spec *spec;
 352         int pin_idx;
 353
 354         spec = codec->spec;
 355         pin_idx = kcontrol->private_value;
 356
 357         memcpy(ucontrol->value.bytes.data,
 358                 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
 359
 360         return 0;
 361 }
 362
 363 static struct snd_kcontrol_new eld_bytes_ctl = {
 364         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 365         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 366         .name = "ELD",
 367         .info = hdmi_eld_ctl_info,
 368         .get = hdmi_eld_ctl_get,
 369 };
 370
 371 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 372                         int device)
 373 {
 374         struct snd_kcontrol *kctl;
 375         struct hdmi_spec *spec = codec->spec;
 376         int err;
 377
 378         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 379         if (!kctl)
 380                 return -ENOMEM;
 381         kctl->private_value = pin_idx;
 382         kctl->id.device = device;
 383
 384         err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
 385         if (err < 0)
 386                 return err;
 387
 388         return 0;
 389 }
 390
 391 #ifdef BE_PARANOID
 392 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 393                                 int *packet_index, int *byte_index)
 394 {
 395         int val;
 396
 397         val = snd_hda_codec_read(codec, pin_nid, 0,
 398                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 399
 400         *packet_index = val >> 5;
 401         *byte_index = val & 0x1f;
 402 }
 403 #endif
 404
 405 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 406                                 int packet_index, int byte_index)
 407 {
 408         int val;
 409
 410         val = (packet_index << 5) | (byte_index & 0x1f);
 411
 412         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 413 }
 414
 415 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 416                                 unsigned char val)
 417 {
 418         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 419 }
 420
 421 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 422 {
 423         /* Unmute */
 424         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 425                 snd_hda_codec_write(codec, pin_nid, 0,
 426                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 427         /* Enable pin out: some machines with GM965 gets broken output when
 428          * the pin is disabled or changed while using with HDMI
 429          */
 430         snd_hda_codec_write(codec, pin_nid, 0,
 431                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
 432 }
 433
 434 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 435 {
 436         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 437                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 438 }
 439
 440 static void hdmi_set_channel_count(struct hda_codec *codec,
 441                                    hda_nid_t cvt_nid, int chs)
 442 {
 443         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 444                 snd_hda_codec_write(codec, cvt_nid, 0,
 445                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 446 }
 447
 448
 449 /*
 450  * Channel mapping routines
 451  */
 452
 453 /*
 454  * Compute derived values in channel_allocations[].
 455  */
 456 static void init_channel_allocations(void)
 457 {
 458         int i, j;
 459         struct cea_channel_speaker_allocation *p;
 460
 461         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 462                 p = channel_allocations + i;
 463                 p->channels = 0;
 464                 p->spk_mask = 0;
 465                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 466                         if (p->speakers[j]) {
 467                                 p->channels++;
 468                                 p->spk_mask |= p->speakers[j];
 469                         }
 470         }
 471 }
 472
 473 /*
 474  * The transformation takes two steps:
 475  *
 476  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 477  *            spk_mask => (channel_allocations[])         => ai->CA
 478  *
 479  * TODO: it could select the wrong CA from multiple candidates.
 480 */
 481 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 482 {
 483         int i;
 484         int ca = 0;
 485         int spk_mask = 0;
 486         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 487
 488         /*
 489          * CA defaults to 0 for basic stereo audio
 490          */
 491         if (channels <= 2)
 492                 return 0;
 493
 494         /*
 495          * expand ELD's speaker allocation mask
 496          *
 497          * ELD tells the speaker mask in a compact(paired) form,
 498          * expand ELD's notions to match the ones used by Audio InfoFrame.
 499          */
 500         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 501                 if (eld->spk_alloc & (1 << i))
 502                         spk_mask |= eld_speaker_allocation_bits[i];
 503         }
 504
 505         /* search for the first working match in the CA table */
 506         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 507                 if (channels == channel_allocations[i].channels &&
 508                     (spk_mask & channel_allocations[i].spk_mask) ==
 509                                 channel_allocations[i].spk_mask) {
 510                         ca = channel_allocations[i].ca_index;
 511                         break;
 512                 }
 513         }
 514
 515         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
 516         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 517                     ca, channels, buf);
 518
 519         return ca;
 520 }
 521
 522 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 523                                        hda_nid_t pin_nid)
 524 {
 525 #ifdef CONFIG_SND_DEBUG_VERBOSE
 526         int i;
 527         int slot;
 528
 529         for (i = 0; i < 8; i++) {
 530                 slot = snd_hda_codec_read(codec, pin_nid, 0,
 531                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
 532                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 533                                                 slot >> 4, slot & 0xf);
 534         }
 535 #endif
 536 }
 537
 538
 539 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 540                                        hda_nid_t pin_nid,
 541                                        int ca)
 542 {
 543         int i;
 544         int err;
 545
 546         if (hdmi_channel_mapping[ca][1] == 0) {
 547                 for (i = 0; i < channel_allocations[ca].channels; i++)
 548                         hdmi_channel_mapping[ca][i] = i | (i << 4);
 549                 for (; i < 8; i++)
 550                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
 551         }
 552
 553         for (i = 0; i < 8; i++) {
 554                 err = snd_hda_codec_write(codec, pin_nid, 0,
 555                                           AC_VERB_SET_HDMI_CHAN_SLOT,
 556                                           hdmi_channel_mapping[ca][i]);
 557                 if (err) {
 558                         snd_printdd(KERN_NOTICE
 559                                     "HDMI: channel mapping failed\n");
 560                         break;
 561                 }
 562         }
 563
 564         hdmi_debug_channel_mapping(codec, pin_nid);
 565 }
 566
 567
 568 /*
 569  * Audio InfoFrame routines
 570  */
 571
 572 /*
 573  * Enable Audio InfoFrame Transmission
 574  */
 575 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 576                                        hda_nid_t pin_nid)
 577 {
 578         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 579         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 580                                                 AC_DIPXMIT_BEST);
 581 }
 582
 583 /*
 584  * Disable Audio InfoFrame Transmission
 585  */
 586 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 587                                       hda_nid_t pin_nid)
 588 {
 589         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 590         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 591                                                 AC_DIPXMIT_DISABLE);
 592 }
 593
 594 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 595 {
 596 #ifdef CONFIG_SND_DEBUG_VERBOSE
 597         int i;
 598         int size;
 599
 600         size = snd_hdmi_get_eld_size(codec, pin_nid);
 601         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 602
 603         for (i = 0; i < 8; i++) {
 604                 size = snd_hda_codec_read(codec, pin_nid, 0,
 605                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 606                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 607         }
 608 #endif
 609 }
 610
 611 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 612 {
 613 #ifdef BE_PARANOID
 614         int i, j;
 615         int size;
 616         int pi, bi;
 617         for (i = 0; i < 8; i++) {
 618                 size = snd_hda_codec_read(codec, pin_nid, 0,
 619                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 620                 if (size == 0)
 621                         continue;
 622
 623                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 624                 for (j = 1; j < 1000; j++) {
 625                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 626                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 627                         if (pi != i)
 628                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 629                                                 bi, pi, i);
 630                         if (bi == 0) /* byte index wrapped around */
 631                                 break;
 632                 }
 633                 snd_printd(KERN_INFO
 634                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 635                         i, size, j);
 636         }
 637 #endif
 638 }
 639
 640 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 641 {
 642         u8 *bytes = (u8 *)hdmi_ai;
 643         u8 sum = 0;
 644         int i;
 645
 646         hdmi_ai->checksum = 0;
 647
 648         for (i = 0; i < sizeof(*hdmi_ai); i++)
 649                 sum += bytes[i];
 650
 651         hdmi_ai->checksum = -sum;
 652 }
 653
 654 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 655                                       hda_nid_t pin_nid,
 656                                       u8 *dip, int size)
 657 {
 658         int i;
 659
 660         hdmi_debug_dip_size(codec, pin_nid);
 661         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 662
 663         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 664         for (i = 0; i < size; i++)
 665                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 666 }
 667
 668 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 669                                     u8 *dip, int size)
 670 {
 671         u8 val;
 672         int i;
 673
 674         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 675                                                             != AC_DIPXMIT_BEST)
 676                 return false;
 677
 678         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 679         for (i = 0; i < size; i++) {
 680                 val = snd_hda_codec_read(codec, pin_nid, 0,
 681                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 682                 if (val != dip[i])
 683                         return false;
 684         }
 685
 686         return true;
 687 }
 688
 689 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
 690                                         struct snd_pcm_substream *substream)
 691 {
 692         struct hdmi_spec *spec = codec->spec;
 693         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
 694         hda_nid_t pin_nid = per_pin->pin_nid;
 695         int channels = substream->runtime->channels;
 696         struct hdmi_eld *eld;
 697         int ca;
 698         union audio_infoframe ai;
 699
 700         eld = &spec->pins[pin_idx].sink_eld;
 701         if (!eld->monitor_present)
 702                 return;
 703
 704         ca = hdmi_channel_allocation(eld, channels);
 705
 706         memset(&ai, 0, sizeof(ai));
 707         if (eld->conn_type == 0) { /* HDMI */
 708                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 709
 710                 hdmi_ai->type           = 0x84;
 711                 hdmi_ai->ver            = 0x01;
 712                 hdmi_ai->len            = 0x0a;
 713                 hdmi_ai->CC02_CT47      = channels - 1;
 714                 hdmi_ai->CA             = ca;
 715                 hdmi_checksum_audio_infoframe(hdmi_ai);
 716         } else if (eld->conn_type == 1) { /* DisplayPort */
 717                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 718
 719                 dp_ai->type             = 0x84;
 720                 dp_ai->len              = 0x1b;
 721                 dp_ai->ver              = 0x11 << 2;
 722                 dp_ai->CC02_CT47        = channels - 1;
 723                 dp_ai->CA               = ca;
 724         } else {
 725                 snd_printd("HDMI: unknown connection type at pin %d\n",
 726                             pin_nid);
 727                 return;
 728         }
 729
 730         /*
 731          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 732          * sizeof(*dp_ai) to avoid partial match/update problems when
 733          * the user switches between HDMI/DP monitors.
 734          */
 735         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 736                                         sizeof(ai))) {
 737                 snd_printdd("hdmi_setup_audio_infoframe: "
 738                             "pin=%d channels=%d\n",
 739                             pin_nid,
 740                             channels);
 741                 hdmi_setup_channel_mapping(codec, pin_nid, ca);
 742                 hdmi_stop_infoframe_trans(codec, pin_nid);
 743                 hdmi_fill_audio_infoframe(codec, pin_nid,
 744                                             ai.bytes, sizeof(ai));
 745                 hdmi_start_infoframe_trans(codec, pin_nid);
 746         }
 747 }
 748
 749
 750 /*
 751  * Unsolicited events
 752  */
 753
 754 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 755
 756 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 757 {
 758         struct hdmi_spec *spec = codec->spec;
 759         int pin_nid = res >> AC_UNSOL_RES_TAG_SHIFT;
 760         int pd = !!(res & AC_UNSOL_RES_PD);
 761         int eldv = !!(res & AC_UNSOL_RES_ELDV);
 762         int pin_idx;
 763
 764         printk(KERN_INFO
 765                 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 766                 codec->addr, pin_nid, pd, eldv);
 767
 768         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
 769         if (pin_idx < 0)
 770                 return;
 771
 772         hdmi_present_sense(&spec->pins[pin_idx], 1);
 773 }
 774
 775 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 776 {
 777         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 778         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 779         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 780         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 781
 782         printk(KERN_INFO
 783                 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 784                 codec->addr,
 785                 tag,
 786                 subtag,
 787                 cp_state,
 788                 cp_ready);
 789
 790         /* TODO */
 791         if (cp_state)
 792                 ;
 793         if (cp_ready)
 794                 ;
 795 }
 796
 797
 798 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 799 {
 800         struct hdmi_spec *spec = codec->spec;
 801         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 802         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 803
 804         if (pin_nid_to_pin_index(spec, tag) < 0) {
 805                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
 806                 return;
 807         }
 808
 809         if (subtag == 0)
 810                 hdmi_intrinsic_event(codec, res);
 811         else
 812                 hdmi_non_intrinsic_event(codec, res);
 813 }
 814
 815 /*
 816  * Callbacks
 817  */
 818
 819 /* HBR should be Non-PCM, 8 channels */
 820 #define is_hbr_format(format) \
 821         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 822
 823 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 824                               hda_nid_t pin_nid, u32 stream_tag, int format)
 825 {
 826         int pinctl;
 827         int new_pinctl = 0;
 828
 829         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 830                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 831                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 832
 833                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 834                 if (is_hbr_format(format))
 835                         new_pinctl |= AC_PINCTL_EPT_HBR;
 836                 else
 837                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 838
 839                 snd_printdd("hdmi_setup_stream: "
 840                             "NID=0x%x, %spinctl=0x%x\n",
 841                             pin_nid,
 842                             pinctl == new_pinctl ? "" : "new-",
 843                             new_pinctl);
 844
 845                 if (pinctl != new_pinctl)
 846                         snd_hda_codec_write(codec, pin_nid, 0,
 847                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 848                                             new_pinctl);
 849
 850         }
 851         if (is_hbr_format(format) && !new_pinctl) {
 852                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
 853                 return -EINVAL;
 854         }
 855
 856         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 857         return 0;
 858 }
 859
 860 /*
 861  * HDA PCM callbacks
 862  */
 863 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
 864                          struct hda_codec *codec,
 865                          struct snd_pcm_substream *substream)
 866 {
 867         struct hdmi_spec *spec = codec->spec;
 868         struct snd_pcm_runtime *runtime = substream->runtime;
 869         int pin_idx, cvt_idx, mux_idx = 0;
 870         struct hdmi_spec_per_pin *per_pin;
 871         struct hdmi_eld *eld;
 872         struct hdmi_spec_per_cvt *per_cvt = NULL;
 873
 874         /* Validate hinfo */
 875         pin_idx = hinfo_to_pin_index(spec, hinfo);
 876         if (snd_BUG_ON(pin_idx < 0))
 877                 return -EINVAL;
 878         per_pin = &spec->pins[pin_idx];
 879         eld = &per_pin->sink_eld;
 880
 881         /* Dynamically assign converter to stream */
 882         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 883                 per_cvt = &spec->cvts[cvt_idx];
 884
 885                 /* Must not already be assigned */
 886                 if (per_cvt->assigned)
 887                         continue;
 888                 /* Must be in pin's mux's list of converters */
 889                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 890                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 891                                 break;
 892                 /* Not in mux list */
 893                 if (mux_idx == per_pin->num_mux_nids)
 894                         continue;
 895                 break;
 896         }
 897         /* No free converters */
 898         if (cvt_idx == spec->num_cvts)
 899                 return -ENODEV;
 900
 901         /* Claim converter */
 902         per_cvt->assigned = 1;
 903         hinfo->nid = per_cvt->cvt_nid;
 904
 905         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
 906                             AC_VERB_SET_CONNECT_SEL,
 907                             mux_idx);
 908         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
 909
 910         /* Initially set the converter's capabilities */
 911         hinfo->channels_min = per_cvt->channels_min;
 912         hinfo->channels_max = per_cvt->channels_max;
 913         hinfo->rates = per_cvt->rates;
 914         hinfo->formats = per_cvt->formats;
 915         hinfo->maxbps = per_cvt->maxbps;
 916
 917         /* Restrict capabilities by ELD if this isn't disabled */
 918         if (!static_hdmi_pcm && eld->eld_valid) {
 919                 snd_hdmi_eld_update_pcm_info(eld, hinfo);
 920                 if (hinfo->channels_min > hinfo->channels_max ||
 921                     !hinfo->rates || !hinfo->formats) {
 922                         per_cvt->assigned = 0;
 923                         hinfo->nid = 0;
 924                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
 925                         return -ENODEV;
 926                 }
 927         }
 928
 929         /* Store the updated parameters */
 930         runtime->hw.channels_min = hinfo->channels_min;
 931         runtime->hw.channels_max = hinfo->channels_max;
 932         runtime->hw.formats = hinfo->formats;
 933         runtime->hw.rates = hinfo->rates;
 934
 935         snd_pcm_hw_constraint_step(substream->runtime, 0,
 936                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
 937         return 0;
 938 }
 939
 940 /*
 941  * HDA/HDMI auto parsing
 942  */
 943 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
 944 {
 945         struct hdmi_spec *spec = codec->spec;
 946         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
 947         hda_nid_t pin_nid = per_pin->pin_nid;
 948
 949         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
 950                 snd_printk(KERN_WARNING
 951                            "HDMI: pin %d wcaps %#x "
 952                            "does not support connection list\n",
 953                            pin_nid, get_wcaps(codec, pin_nid));
 954                 return -EINVAL;
 955         }
 956
 957         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
 958                                                         per_pin->mux_nids,
 959                                                         HDA_MAX_CONNECTIONS);
 960
 961         return 0;
 962 }
 963
 964 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
 965 {
 966         struct hda_codec *codec = per_pin->codec;
 967         struct hdmi_eld *eld = &per_pin->sink_eld;
 968         hda_nid_t pin_nid = per_pin->pin_nid;
 969         /*
 970          * Always execute a GetPinSense verb here, even when called from
 971          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
 972          * response's PD bit is not the real PD value, but indicates that
 973          * the real PD value changed. An older version of the HD-audio
 974          * specification worked this way. Hence, we just ignore the data in
 975          * the unsolicited response to avoid custom WARs.
 976          */
 977         int present = snd_hda_pin_sense(codec, pin_nid);
 978         bool eld_valid = false;
 979
 980         memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
 981
 982         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
 983         if (eld->monitor_present)
 984                 eld_valid       = !!(present & AC_PINSENSE_ELDV);
 985
 986         printk(KERN_INFO
 987                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 988                 codec->addr, pin_nid, eld->monitor_present, eld_valid);
 989
 990         if (eld_valid) {
 991                 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
 992                         snd_hdmi_show_eld(eld);
 993                 else if (repoll) {
 994                         queue_delayed_work(codec->bus->workq,
 995                                            &per_pin->work,
 996                                            msecs_to_jiffies(300));
 997                 }
 998         }
 999
1000         snd_hda_input_jack_report(codec, pin_nid);
1001 }
1002
1003 static void hdmi_repoll_eld(struct work_struct *work)
1004 {
1005         struct hdmi_spec_per_pin *per_pin =
1006         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1007
1008         if (per_pin->repoll_count++ > 6)
1009                 per_pin->repoll_count = 0;
1010
1011         hdmi_present_sense(per_pin, per_pin->repoll_count);
1012 }
1013
1014 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1015 {
1016         struct hdmi_spec *spec = codec->spec;
1017         unsigned int caps, config;
1018         int pin_idx;
1019         struct hdmi_spec_per_pin *per_pin;
1020         int err;
1021
1022         caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1023         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1024                 return 0;
1025
1026         config = snd_hda_codec_read(codec, pin_nid, 0,
1027                                 AC_VERB_GET_CONFIG_DEFAULT, 0);
1028         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1029                 return 0;
1030
1031         if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1032                 return -E2BIG;
1033
1034         pin_idx = spec->num_pins;
1035         per_pin = &spec->pins[pin_idx];
1036
1037         per_pin->pin_nid = pin_nid;
1038
1039         err = hdmi_read_pin_conn(codec, pin_idx);
1040         if (err < 0)
1041                 return err;
1042
1043         spec->num_pins++;
1044
1045         return 0;
1046 }
1047
1048 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1049 {
1050         struct hdmi_spec *spec = codec->spec;
1051         int cvt_idx;
1052         struct hdmi_spec_per_cvt *per_cvt;
1053         unsigned int chans;
1054         int err;
1055
1056         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1057                 return -E2BIG;
1058
1059         chans = get_wcaps(codec, cvt_nid);
1060         chans = get_wcaps_channels(chans);
1061
1062         cvt_idx = spec->num_cvts;
1063         per_cvt = &spec->cvts[cvt_idx];
1064
1065         per_cvt->cvt_nid = cvt_nid;
1066         per_cvt->channels_min = 2;
1067         if (chans <= 16)
1068                 per_cvt->channels_max = chans;
1069
1070         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1071                                           &per_cvt->rates,
1072                                           &per_cvt->formats,
1073                                           &per_cvt->maxbps);
1074         if (err < 0)
1075                 return err;
1076
1077         spec->num_cvts++;
1078
1079         return 0;
1080 }
1081
1082 static int hdmi_parse_codec(struct hda_codec *codec)
1083 {
1084         hda_nid_t nid;
1085         int i, nodes;
1086
1087         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1088         if (!nid || nodes < 0) {
1089                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1090                 return -EINVAL;
1091         }
1092
1093         for (i = 0; i < nodes; i++, nid++) {
1094                 unsigned int caps;
1095                 unsigned int type;
1096
1097                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1098                 type = get_wcaps_type(caps);
1099
1100                 if (!(caps & AC_WCAP_DIGITAL))
1101                         continue;
1102
1103                 switch (type) {
1104                 case AC_WID_AUD_OUT:
1105                         hdmi_add_cvt(codec, nid);
1106                         break;
1107                 case AC_WID_PIN:
1108                         hdmi_add_pin(codec, nid);
1109                         break;
1110                 }
1111         }
1112
1113         /*
1114          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1115          * can be lost and presence sense verb will become inaccurate if the
1116          * HDA link is powered off at hot plug or hw initialization time.
1117          */
1118 #ifdef CONFIG_SND_HDA_POWER_SAVE
1119         if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1120               AC_PWRST_EPSS))
1121                 codec->bus->power_keep_link_on = 1;
1122 #endif
1123
1124         return 0;
1125 }
1126
1127 /*
1128  */
1129 static char *generic_hdmi_pcm_names[MAX_HDMI_PINS] = {
1130         "HDMI 0",
1131         "HDMI 1",
1132         "HDMI 2",
1133         "HDMI 3",
1134 };
1135
1136 /*
1137  * HDMI callbacks
1138  */
1139
1140 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1141                                            struct hda_codec *codec,
1142                                            unsigned int stream_tag,
1143                                            unsigned int format,
1144                                            struct snd_pcm_substream *substream)
1145 {
1146         hda_nid_t cvt_nid = hinfo->nid;
1147         struct hdmi_spec *spec = codec->spec;
1148         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1149         hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1150
1151         hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1152
1153         hdmi_setup_audio_infoframe(codec, pin_idx, substream);
1154
1155         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1156 }
1157
1158 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1159                                              struct hda_codec *codec,
1160                                              struct snd_pcm_substream *substream)
1161 {
1162         struct hdmi_spec *spec = codec->spec;
1163         int cvt_idx, pin_idx;
1164         struct hdmi_spec_per_cvt *per_cvt;
1165         struct hdmi_spec_per_pin *per_pin;
1166
1167         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1168
1169         if (hinfo->nid) {
1170                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1171                 if (snd_BUG_ON(cvt_idx < 0))
1172                         return -EINVAL;
1173                 per_cvt = &spec->cvts[cvt_idx];
1174
1175                 snd_BUG_ON(!per_cvt->assigned);
1176                 per_cvt->assigned = 0;
1177                 hinfo->nid = 0;
1178
1179                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1180                 if (snd_BUG_ON(pin_idx < 0))
1181                         return -EINVAL;
1182                 per_pin = &spec->pins[pin_idx];
1183
1184                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1185         }
1186
1187         return 0;
1188 }
1189
1190 static const struct hda_pcm_ops generic_ops = {
1191         .open = hdmi_pcm_open,
1192         .prepare = generic_hdmi_playback_pcm_prepare,
1193         .cleanup = generic_hdmi_playback_pcm_cleanup,
1194 };
1195
1196 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1197 {
1198         struct hdmi_spec *spec = codec->spec;
1199         int pin_idx;
1200
1201         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1202                 struct hda_pcm *info;
1203                 struct hda_pcm_stream *pstr;
1204
1205                 info = &spec->pcm_rec[pin_idx];
1206                 info->name = generic_hdmi_pcm_names[pin_idx];
1207                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1208
1209                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1210                 pstr->substreams = 1;
1211                 pstr->ops = generic_ops;
1212                 /* other pstr fields are set in open */
1213         }
1214
1215         codec->num_pcms = spec->num_pins;
1216         codec->pcm_info = spec->pcm_rec;
1217
1218         return 0;
1219 }
1220
1221 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1222 {
1223         int err;
1224         char hdmi_str[32];
1225         struct hdmi_spec *spec = codec->spec;
1226         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1227         int pcmdev = spec->pcm_rec[pin_idx].device;
1228
1229         snprintf(hdmi_str, sizeof(hdmi_str), "HDMI/DP,pcm=%d", pcmdev);
1230
1231         err = snd_hda_input_jack_add(codec, per_pin->pin_nid,
1232                              SND_JACK_VIDEOOUT, pcmdev > 0 ? hdmi_str : NULL);
1233         if (err < 0)
1234                 return err;
1235
1236         hdmi_present_sense(per_pin, 0);
1237         return 0;
1238 }
1239
1240 static int generic_hdmi_build_controls(struct hda_codec *codec)
1241 {
1242         struct hdmi_spec *spec = codec->spec;
1243         int err;
1244         int pin_idx;
1245
1246         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1247                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1248
1249                 err = generic_hdmi_build_jack(codec, pin_idx);
1250                 if (err < 0)
1251                         return err;
1252
1253                 err = snd_hda_create_spdif_out_ctls(codec,
1254                                                     per_pin->pin_nid,
1255                                                     per_pin->mux_nids[0]);
1256                 if (err < 0)
1257                         return err;
1258                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1259
1260                 /* add control for ELD Bytes */
1261                 err = hdmi_create_eld_ctl(codec,
1262                                         pin_idx,
1263                                         spec->pcm_rec[pin_idx].device);
1264
1265                 if (err < 0)
1266                         return err;
1267         }
1268
1269         return 0;
1270 }
1271
1272 static int generic_hdmi_init(struct hda_codec *codec)
1273 {
1274         struct hdmi_spec *spec = codec->spec;
1275         int pin_idx;
1276
1277         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1278                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1279                 hda_nid_t pin_nid = per_pin->pin_nid;
1280                 struct hdmi_eld *eld = &per_pin->sink_eld;
1281
1282                 hdmi_init_pin(codec, pin_nid);
1283                 snd_hda_codec_write(codec, pin_nid, 0,
1284                                     AC_VERB_SET_UNSOLICITED_ENABLE,
1285                                     AC_USRSP_EN | pin_nid);
1286
1287                 per_pin->codec = codec;
1288                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1289                 snd_hda_eld_proc_new(codec, eld, pin_idx);
1290         }
1291         return 0;
1292 }
1293
1294 static void generic_hdmi_free(struct hda_codec *codec)
1295 {
1296         struct hdmi_spec *spec = codec->spec;
1297         int pin_idx;
1298
1299         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1300                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1301                 struct hdmi_eld *eld = &per_pin->sink_eld;
1302
1303                 cancel_delayed_work(&per_pin->work);
1304                 snd_hda_eld_proc_free(codec, eld);
1305         }
1306         snd_hda_input_jack_free(codec);
1307
1308         flush_workqueue(codec->bus->workq);
1309         kfree(spec);
1310 }
1311
1312 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1313         .init                   = generic_hdmi_init,
1314         .free                   = generic_hdmi_free,
1315         .build_pcms             = generic_hdmi_build_pcms,
1316         .build_controls         = generic_hdmi_build_controls,
1317         .unsol_event            = hdmi_unsol_event,
1318 };
1319
1320 static int patch_generic_hdmi(struct hda_codec *codec)
1321 {
1322         struct hdmi_spec *spec;
1323
1324         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1325         if (spec == NULL)
1326                 return -ENOMEM;
1327
1328         codec->spec = spec;
1329         if (hdmi_parse_codec(codec) < 0) {
1330                 codec->spec = NULL;
1331                 kfree(spec);
1332                 return -EINVAL;
1333         }
1334         codec->patch_ops = generic_hdmi_patch_ops;
1335
1336         init_channel_allocations();
1337
1338         return 0;
1339 }
1340
1341 /*
1342  * Shared non-generic implementations
1343  */
1344
1345 static int simple_playback_build_pcms(struct hda_codec *codec)
1346 {
1347         struct hdmi_spec *spec = codec->spec;
1348         struct hda_pcm *info = spec->pcm_rec;
1349         int i;
1350
1351         codec->num_pcms = spec->num_cvts;
1352         codec->pcm_info = info;
1353
1354         for (i = 0; i < codec->num_pcms; i++, info++) {
1355                 unsigned int chans;
1356                 struct hda_pcm_stream *pstr;
1357
1358                 chans = get_wcaps(codec, spec->cvts[i].cvt_nid);
1359                 chans = get_wcaps_channels(chans);
1360
1361                 info->name = generic_hdmi_pcm_names[i];
1362                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1363                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1364                 snd_BUG_ON(!spec->pcm_playback);
1365                 *pstr = *spec->pcm_playback;
1366                 pstr->nid = spec->cvts[i].cvt_nid;
1367                 if (pstr->channels_max <= 2 && chans && chans <= 16)
1368                         pstr->channels_max = chans;
1369         }
1370
1371         return 0;
1372 }
1373
1374 static int simple_playback_build_controls(struct hda_codec *codec)
1375 {
1376         struct hdmi_spec *spec = codec->spec;
1377         int err;
1378         int i;
1379
1380         for (i = 0; i < codec->num_pcms; i++) {
1381                 err = snd_hda_create_spdif_out_ctls(codec,
1382                                                     spec->cvts[i].cvt_nid,
1383                                                     spec->cvts[i].cvt_nid);
1384                 if (err < 0)
1385                         return err;
1386         }
1387
1388         return 0;
1389 }
1390
1391 static void simple_playback_free(struct hda_codec *codec)
1392 {
1393         struct hdmi_spec *spec = codec->spec;
1394
1395         kfree(spec);
1396 }
1397
1398 /*
1399  * Nvidia specific implementations
1400  */
1401
1402 #define Nv_VERB_SET_Channel_Allocation          0xF79
1403 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1404 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1405 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1406
1407 #define nvhdmi_master_con_nid_7x        0x04
1408 #define nvhdmi_master_pin_nid_7x        0x05
1409
1410 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1411         /*front, rear, clfe, rear_surr */
1412         0x6, 0x8, 0xa, 0xc,
1413 };
1414
1415 static const struct hda_verb nvhdmi_basic_init_7x[] = {
1416         /* set audio protect on */
1417         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1418         /* enable digital output on pin widget */
1419         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1420         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1421         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1422         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1423         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1424         {} /* terminator */
1425 };
1426
1427 #ifdef LIMITED_RATE_FMT_SUPPORT
1428 /* support only the safe format and rate */
1429 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1430 #define SUPPORTED_MAXBPS        16
1431 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1432 #else
1433 /* support all rates and formats */
1434 #define SUPPORTED_RATES \
1435         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1436         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1437          SNDRV_PCM_RATE_192000)
1438 #define SUPPORTED_MAXBPS        24
1439 #define SUPPORTED_FORMATS \
1440         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1441 #endif
1442
1443 static int nvhdmi_7x_init(struct hda_codec *codec)
1444 {
1445         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1446         return 0;
1447 }
1448
1449 static unsigned int channels_2_6_8[] = {
1450         2, 6, 8
1451 };
1452
1453 static unsigned int channels_2_8[] = {
1454         2, 8
1455 };
1456
1457 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1458         .count = ARRAY_SIZE(channels_2_6_8),
1459         .list = channels_2_6_8,
1460         .mask = 0,
1461 };
1462
1463 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1464         .count = ARRAY_SIZE(channels_2_8),
1465         .list = channels_2_8,
1466         .mask = 0,
1467 };
1468
1469 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1470                                     struct hda_codec *codec,
1471                                     struct snd_pcm_substream *substream)
1472 {
1473         struct hdmi_spec *spec = codec->spec;
1474         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1475
1476         switch (codec->preset->id) {
1477         case 0x10de0002:
1478         case 0x10de0003:
1479         case 0x10de0005:
1480         case 0x10de0006:
1481                 hw_constraints_channels = &hw_constraints_2_8_channels;
1482                 break;
1483         case 0x10de0007:
1484                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1485                 break;
1486         default:
1487                 break;
1488         }
1489
1490         if (hw_constraints_channels != NULL) {
1491                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1492                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1493                                 hw_constraints_channels);
1494         } else {
1495                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1496                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1497         }
1498
1499         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1500 }
1501
1502 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1503                                      struct hda_codec *codec,
1504                                      struct snd_pcm_substream *substream)
1505 {
1506         struct hdmi_spec *spec = codec->spec;
1507         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1508 }
1509
1510 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1511                                        struct hda_codec *codec,
1512                                        unsigned int stream_tag,
1513                                        unsigned int format,
1514                                        struct snd_pcm_substream *substream)
1515 {
1516         struct hdmi_spec *spec = codec->spec;
1517         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1518                                              stream_tag, format, substream);
1519 }
1520
1521 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1522                                                     int channels)
1523 {
1524         unsigned int chanmask;
1525         int chan = channels ? (channels - 1) : 1;
1526
1527         switch (channels) {
1528         default:
1529         case 0:
1530         case 2:
1531                 chanmask = 0x00;
1532                 break;
1533         case 4:
1534                 chanmask = 0x08;
1535                 break;
1536         case 6:
1537                 chanmask = 0x0b;
1538                 break;
1539         case 8:
1540                 chanmask = 0x13;
1541                 break;
1542         }
1543
1544         /* Set the audio infoframe channel allocation and checksum fields.  The
1545          * channel count is computed implicitly by the hardware. */
1546         snd_hda_codec_write(codec, 0x1, 0,
1547                         Nv_VERB_SET_Channel_Allocation, chanmask);
1548
1549         snd_hda_codec_write(codec, 0x1, 0,
1550                         Nv_VERB_SET_Info_Frame_Checksum,
1551                         (0x71 - chan - chanmask));
1552 }
1553
1554 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1555                                    struct hda_codec *codec,
1556                                    struct snd_pcm_substream *substream)
1557 {
1558         struct hdmi_spec *spec = codec->spec;
1559         int i;
1560
1561         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1562                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1563         for (i = 0; i < 4; i++) {
1564                 /* set the stream id */
1565                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1566                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1567                 /* set the stream format */
1568                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1569                                 AC_VERB_SET_STREAM_FORMAT, 0);
1570         }
1571
1572         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1573          * streams are disabled. */
1574         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1575
1576         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1577 }
1578
1579 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1580                                      struct hda_codec *codec,
1581                                      unsigned int stream_tag,
1582                                      unsigned int format,
1583                                      struct snd_pcm_substream *substream)
1584 {
1585         int chs;
1586         unsigned int dataDCC2, channel_id;
1587         int i;
1588         struct hdmi_spec *spec = codec->spec;
1589         struct hda_spdif_out *spdif =
1590                 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1591
1592         mutex_lock(&codec->spdif_mutex);
1593
1594         chs = substream->runtime->channels;
1595
1596         dataDCC2 = 0x2;
1597
1598         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1599         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1600                 snd_hda_codec_write(codec,
1601                                 nvhdmi_master_con_nid_7x,
1602                                 0,
1603                                 AC_VERB_SET_DIGI_CONVERT_1,
1604                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1605
1606         /* set the stream id */
1607         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1608                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1609
1610         /* set the stream format */
1611         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1612                         AC_VERB_SET_STREAM_FORMAT, format);
1613
1614         /* turn on again (if needed) */
1615         /* enable and set the channel status audio/data flag */
1616         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1617                 snd_hda_codec_write(codec,
1618                                 nvhdmi_master_con_nid_7x,
1619                                 0,
1620                                 AC_VERB_SET_DIGI_CONVERT_1,
1621                                 spdif->ctls & 0xff);
1622                 snd_hda_codec_write(codec,
1623                                 nvhdmi_master_con_nid_7x,
1624                                 0,
1625                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1626         }
1627
1628         for (i = 0; i < 4; i++) {
1629                 if (chs == 2)
1630                         channel_id = 0;
1631                 else
1632                         channel_id = i * 2;
1633
1634                 /* turn off SPDIF once;
1635                  *otherwise the IEC958 bits won't be updated
1636                  */
1637                 if (codec->spdif_status_reset &&
1638                 (spdif->ctls & AC_DIG1_ENABLE))
1639                         snd_hda_codec_write(codec,
1640                                 nvhdmi_con_nids_7x[i],
1641                                 0,
1642                                 AC_VERB_SET_DIGI_CONVERT_1,
1643                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1644                 /* set the stream id */
1645                 snd_hda_codec_write(codec,
1646                                 nvhdmi_con_nids_7x[i],
1647                                 0,
1648                                 AC_VERB_SET_CHANNEL_STREAMID,
1649                                 (stream_tag << 4) | channel_id);
1650                 /* set the stream format */
1651                 snd_hda_codec_write(codec,
1652                                 nvhdmi_con_nids_7x[i],
1653                                 0,
1654                                 AC_VERB_SET_STREAM_FORMAT,
1655                                 format);
1656                 /* turn on again (if needed) */
1657                 /* enable and set the channel status audio/data flag */
1658                 if (codec->spdif_status_reset &&
1659                 (spdif->ctls & AC_DIG1_ENABLE)) {
1660                         snd_hda_codec_write(codec,
1661                                         nvhdmi_con_nids_7x[i],
1662                                         0,
1663                                         AC_VERB_SET_DIGI_CONVERT_1,
1664                                         spdif->ctls & 0xff);
1665                         snd_hda_codec_write(codec,
1666                                         nvhdmi_con_nids_7x[i],
1667                                         0,
1668                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1669                 }
1670         }
1671
1672         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1673
1674         mutex_unlock(&codec->spdif_mutex);
1675         return 0;
1676 }
1677
1678 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1679         .substreams = 1,
1680         .channels_min = 2,
1681         .channels_max = 8,
1682         .nid = nvhdmi_master_con_nid_7x,
1683         .rates = SUPPORTED_RATES,
1684         .maxbps = SUPPORTED_MAXBPS,
1685         .formats = SUPPORTED_FORMATS,
1686         .ops = {
1687                 .open = simple_playback_pcm_open,
1688                 .close = nvhdmi_8ch_7x_pcm_close,
1689                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1690         },
1691 };
1692
1693 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1694         .substreams = 1,
1695         .channels_min = 2,
1696         .channels_max = 2,
1697         .nid = nvhdmi_master_con_nid_7x,
1698         .rates = SUPPORTED_RATES,
1699         .maxbps = SUPPORTED_MAXBPS,
1700         .formats = SUPPORTED_FORMATS,
1701         .ops = {
1702                 .open = simple_playback_pcm_open,
1703                 .close = simple_playback_pcm_close,
1704                 .prepare = simple_playback_pcm_prepare
1705         },
1706 };
1707
1708 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1709         .build_controls = simple_playback_build_controls,
1710         .build_pcms = simple_playback_build_pcms,
1711         .init = nvhdmi_7x_init,
1712         .free = simple_playback_free,
1713 };
1714
1715 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1716         .build_controls = simple_playback_build_controls,
1717         .build_pcms = simple_playback_build_pcms,
1718         .init = nvhdmi_7x_init,
1719         .free = simple_playback_free,
1720 };
1721
1722 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1723 {
1724         struct hdmi_spec *spec;
1725
1726         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1727         if (spec == NULL)
1728                 return -ENOMEM;
1729
1730         codec->spec = spec;
1731
1732         spec->multiout.num_dacs = 0;  /* no analog */
1733         spec->multiout.max_channels = 2;
1734         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1735         spec->num_cvts = 1;
1736         spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x;
1737         spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1738
1739         codec->patch_ops = nvhdmi_patch_ops_2ch;
1740
1741         return 0;
1742 }
1743
1744 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1745 {
1746         struct hdmi_spec *spec;
1747         int err = patch_nvhdmi_2ch(codec);
1748
1749         if (err < 0)
1750                 return err;
1751         spec = codec->spec;
1752         spec->multiout.max_channels = 8;
1753         spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1754         codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1755
1756         /* Initialize the audio infoframe channel mask and checksum to something
1757          * valid */
1758         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1759
1760         return 0;
1761 }
1762
1763 /*
1764  * ATI-specific implementations
1765  *
1766  * FIXME: we may omit the whole this and use the generic code once after
1767  * it's confirmed to work.
1768  */
1769
1770 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1771 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1772
1773 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1774                                         struct hda_codec *codec,
1775                                         unsigned int stream_tag,
1776                                         unsigned int format,
1777                                         struct snd_pcm_substream *substream)
1778 {
1779         struct hdmi_spec *spec = codec->spec;
1780         int chans = substream->runtime->channels;
1781         int i, err;
1782
1783         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1784                                           substream);
1785         if (err < 0)
1786                 return err;
1787         snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1788                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1789         /* FIXME: XXX */
1790         for (i = 0; i < chans; i++) {
1791                 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1792                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1793                                     (i << 4) | i);
1794         }
1795         return 0;
1796 }
1797
1798 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1799         .substreams = 1,
1800         .channels_min = 2,
1801         .channels_max = 2,
1802         .nid = ATIHDMI_CVT_NID,
1803         .ops = {
1804                 .open = simple_playback_pcm_open,
1805                 .close = simple_playback_pcm_close,
1806                 .prepare = atihdmi_playback_pcm_prepare
1807         },
1808 };
1809
1810 static const struct hda_verb atihdmi_basic_init[] = {
1811         /* enable digital output on pin widget */
1812         { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1813         {} /* terminator */
1814 };
1815
1816 static int atihdmi_init(struct hda_codec *codec)
1817 {
1818         struct hdmi_spec *spec = codec->spec;
1819
1820         snd_hda_sequence_write(codec, atihdmi_basic_init);
1821         /* SI codec requires to unmute the pin */
1822         if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP)
1823                 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0,
1824                                     AC_VERB_SET_AMP_GAIN_MUTE,
1825                                     AMP_OUT_UNMUTE);
1826         return 0;
1827 }
1828
1829 static const struct hda_codec_ops atihdmi_patch_ops = {
1830         .build_controls = simple_playback_build_controls,
1831         .build_pcms = simple_playback_build_pcms,
1832         .init = atihdmi_init,
1833         .free = simple_playback_free,
1834 };
1835
1836
1837 static int patch_atihdmi(struct hda_codec *codec)
1838 {
1839         struct hdmi_spec *spec;
1840
1841         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1842         if (spec == NULL)
1843                 return -ENOMEM;
1844
1845         codec->spec = spec;
1846
1847         spec->multiout.num_dacs = 0;      /* no analog */
1848         spec->multiout.max_channels = 2;
1849         spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1850         spec->num_cvts = 1;
1851         spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID;
1852         spec->pins[0].pin_nid = ATIHDMI_PIN_NID;
1853         spec->pcm_playback = &atihdmi_pcm_digital_playback;
1854
1855         codec->patch_ops = atihdmi_patch_ops;
1856
1857         return 0;
1858 }
1859
1860
1861 /*
1862  * patch entries
1863  */
1864 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1865 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1866 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1867 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1868 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1869 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1870 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1871 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1872 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1873 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1874 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1875 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1876 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1877 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
1878 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
1879 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
1880 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
1881 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
1882 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
1883 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
1884 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
1885 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
1886 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
1887 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
1888 /* 17 is known to be absent */
1889 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
1890 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
1891 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
1892 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
1893 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
1894 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
1895 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
1896 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
1897 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
1898 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
1899 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1900 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1901 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1902 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1903 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1904 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1905 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1906 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1907 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1908 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
1909 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1910 {} /* terminator */
1911 };
1912
1913 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1914 MODULE_ALIAS("snd-hda-codec-id:10027919");
1915 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1916 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1917 MODULE_ALIAS("snd-hda-codec-id:10951390");
1918 MODULE_ALIAS("snd-hda-codec-id:10951392");
1919 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1920 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1921 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1922 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1923 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1924 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1925 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1926 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1927 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1928 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1929 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1930 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1931 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1932 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1933 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1934 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1935 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1936 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1937 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1938 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1939 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1940 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1941 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1942 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1943 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1944 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1945 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1946 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1947 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1948 MODULE_ALIAS("snd-hda-codec-id:80860054");
1949 MODULE_ALIAS("snd-hda-codec-id:80862801");
1950 MODULE_ALIAS("snd-hda-codec-id:80862802");
1951 MODULE_ALIAS("snd-hda-codec-id:80862803");
1952 MODULE_ALIAS("snd-hda-codec-id:80862804");
1953 MODULE_ALIAS("snd-hda-codec-id:80862805");
1954 MODULE_ALIAS("snd-hda-codec-id:80862806");
1955 MODULE_ALIAS("snd-hda-codec-id:80862880");
1956 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1957
1958 MODULE_LICENSE("GPL");
1959 MODULE_DESCRIPTION("HDMI HD-audio codec");
1960 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1961 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1962 MODULE_ALIAS("snd-hda-codec-atihdmi");
1963
1964 static struct hda_codec_preset_list intel_list = {
1965         .preset = snd_hda_preset_hdmi,
1966         .owner = THIS_MODULE,
1967 };
1968
1969 static int __init patch_hdmi_init(void)
1970 {
1971         return snd_hda_add_codec_preset(&intel_list);
1972 }
1973
1974 static void __exit patch_hdmi_exit(void)
1975 {
1976         snd_hda_delete_codec_preset(&intel_list);
1977 }
1978
1979 module_init(patch_hdmi_init)
1980 module_exit(patch_hdmi_exit)