sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *
  10  *  Authors:
  11  *                      Wu Fengguang <wfg@linux.intel.com>
  12  *
  13  *  Maintained by:
  14  *                      Wu Fengguang <wfg@linux.intel.com>
  15  *
  16  *  This program is free software; you can redistribute it and/or modify it
  17  *  under the terms of the GNU General Public License as published by the Free
  18  *  Software Foundation; either version 2 of the License, or (at your option)
  19  *  any later version.
  20  *
  21  *  This program is distributed in the hope that it will be useful, but
  22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  24  *  for more details.
  25  *
  26  *  You should have received a copy of the GNU General Public License
  27  *  along with this program; if not, write to the Free Software Foundation,
  28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/delay.h>
  33 #include <linux/slab.h>
  34 #include <linux/module.h>
  35 #include <sound/core.h>
  36 #include <sound/jack.h>
  37 #include "hda_codec.h"
  38 #include "hda_local.h"
  39
  40 static bool static_hdmi_pcm;
  41 module_param(static_hdmi_pcm, bool, 0644);
  42 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  43
  44 /*
  45  * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  46  * could support N independent pipes, each of them can be connected to one or
  47  * more ports (DVI, HDMI or DisplayPort).
  48  *
  49  * The HDA correspondence of pipes/ports are converter/pin nodes.
  50  */
  51 #define MAX_HDMI_CVTS   4
  52 #define MAX_HDMI_PINS   4
  53
  54 struct hdmi_spec_per_cvt {
  55         hda_nid_t cvt_nid;
  56         int assigned;
  57         unsigned int channels_min;
  58         unsigned int channels_max;
  59         u32 rates;
  60         u64 formats;
  61         unsigned int maxbps;
  62 };
  63
  64 struct hdmi_spec_per_pin {
  65         hda_nid_t pin_nid;
  66         int num_mux_nids;
  67         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  68
  69         struct hda_codec *codec;
  70         struct hdmi_eld sink_eld;
  71         struct delayed_work work;
  72         int repoll_count;
  73 };
  74
  75 struct hdmi_spec {
  76         int num_cvts;
  77         struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
  78
  79         int num_pins;
  80         struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
  81         struct hda_pcm pcm_rec[MAX_HDMI_PINS];
  82
  83         /*
  84          * Non-generic ATI/NVIDIA specific
  85          */
  86         struct hda_multi_out multiout;
  87         const struct hda_pcm_stream *pcm_playback;
  88 };
  89
  90
  91 struct hdmi_audio_infoframe {
  92         u8 type; /* 0x84 */
  93         u8 ver;  /* 0x01 */
  94         u8 len;  /* 0x0a */
  95
  96         u8 checksum;
  97
  98         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
  99         u8 SS01_SF24;
 100         u8 CXT04;
 101         u8 CA;
 102         u8 LFEPBL01_LSV36_DM_INH7;
 103 };
 104
 105 struct dp_audio_infoframe {
 106         u8 type; /* 0x84 */
 107         u8 len;  /* 0x1b */
 108         u8 ver;  /* 0x11 << 2 */
 109
 110         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 111         u8 SS01_SF24;
 112         u8 CXT04;
 113         u8 CA;
 114         u8 LFEPBL01_LSV36_DM_INH7;
 115 };
 116
 117 union audio_infoframe {
 118         struct hdmi_audio_infoframe hdmi;
 119         struct dp_audio_infoframe dp;
 120         u8 bytes[0];
 121 };
 122
 123 /*
 124  * CEA speaker placement:
 125  *
 126  *        FLH       FCH        FRH
 127  *  FLW    FL  FLC   FC   FRC   FR   FRW
 128  *
 129  *                                  LFE
 130  *                     TC
 131  *
 132  *          RL  RLC   RC   RRC   RR
 133  *
 134  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 135  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 136  */
 137 enum cea_speaker_placement {
 138         FL  = (1 <<  0),        /* Front Left           */
 139         FC  = (1 <<  1),        /* Front Center         */
 140         FR  = (1 <<  2),        /* Front Right          */
 141         FLC = (1 <<  3),        /* Front Left Center    */
 142         FRC = (1 <<  4),        /* Front Right Center   */
 143         RL  = (1 <<  5),        /* Rear Left            */
 144         RC  = (1 <<  6),        /* Rear Center          */
 145         RR  = (1 <<  7),        /* Rear Right           */
 146         RLC = (1 <<  8),        /* Rear Left Center     */
 147         RRC = (1 <<  9),        /* Rear Right Center    */
 148         LFE = (1 << 10),        /* Low Frequency Effect */
 149         FLW = (1 << 11),        /* Front Left Wide      */
 150         FRW = (1 << 12),        /* Front Right Wide     */
 151         FLH = (1 << 13),        /* Front Left High      */
 152         FCH = (1 << 14),        /* Front Center High    */
 153         FRH = (1 << 15),        /* Front Right High     */
 154         TC  = (1 << 16),        /* Top Center           */
 155 };
 156
 157 /*
 158  * ELD SA bits in the CEA Speaker Allocation data block
 159  */
 160 static int eld_speaker_allocation_bits[] = {
 161         [0] = FL | FR,
 162         [1] = LFE,
 163         [2] = FC,
 164         [3] = RL | RR,
 165         [4] = RC,
 166         [5] = FLC | FRC,
 167         [6] = RLC | RRC,
 168         /* the following are not defined in ELD yet */
 169         [7] = FLW | FRW,
 170         [8] = FLH | FRH,
 171         [9] = TC,
 172         [10] = FCH,
 173 };
 174
 175 struct cea_channel_speaker_allocation {
 176         int ca_index;
 177         int speakers[8];
 178
 179         /* derived values, just for convenience */
 180         int channels;
 181         int spk_mask;
 182 };
 183
 184 /*
 185  * ALSA sequence is:
 186  *
 187  *       surround40   surround41   surround50   surround51   surround71
 188  * ch0   front left   =            =            =            =
 189  * ch1   front right  =            =            =            =
 190  * ch2   rear left    =            =            =            =
 191  * ch3   rear right   =            =            =            =
 192  * ch4                LFE          center       center       center
 193  * ch5                                          LFE          LFE
 194  * ch6                                                       side left
 195  * ch7                                                       side right
 196  *
 197  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 198  */
 199 static int hdmi_channel_mapping[0x32][8] = {
 200         /* stereo */
 201         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 202         /* 2.1 */
 203         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 204         /* Dolby Surround */
 205         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 206         /* surround40 */
 207         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 208         /* 4ch */
 209         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 210         /* surround41 */
 211         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 212         /* surround50 */
 213         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 214         /* surround51 */
 215         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 216         /* 7.1 */
 217         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 218 };
 219
 220 /*
 221  * This is an ordered list!
 222  *
 223  * The preceding ones have better chances to be selected by
 224  * hdmi_channel_allocation().
 225  */
 226 static struct cea_channel_speaker_allocation channel_allocations[] = {
 227 /*                        channel:   7     6    5    4    3     2    1    0  */
 228 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 229                                  /* 2.1 */
 230 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 231                                  /* Dolby Surround */
 232 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 233                                  /* surround40 */
 234 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 235                                  /* surround41 */
 236 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 237                                  /* surround50 */
 238 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 239                                  /* surround51 */
 240 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 241                                  /* 6.1 */
 242 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 243                                  /* surround71 */
 244 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 245
 246 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 247 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 248 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 249 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 250 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 251 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 252 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 253 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 254 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 255 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 256 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 257 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 258 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 259 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 260 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 261 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 262 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 263 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 264 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 265 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 266 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 267 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 268 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 269 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 270 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 271 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 272 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 273 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 274 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 275 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 276 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 277 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 278 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 279 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 280 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 281 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 282 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 283 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 284 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 285 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 286 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 287 };
 288
 289
 290 /*
 291  * HDMI routines
 292  */
 293
 294 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
 295 {
 296         int pin_idx;
 297
 298         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 299                 if (spec->pins[pin_idx].pin_nid == pin_nid)
 300                         return pin_idx;
 301
 302         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
 303         return -EINVAL;
 304 }
 305
 306 static int hinfo_to_pin_index(struct hdmi_spec *spec,
 307                               struct hda_pcm_stream *hinfo)
 308 {
 309         int pin_idx;
 310
 311         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 312                 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
 313                         return pin_idx;
 314
 315         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
 316         return -EINVAL;
 317 }
 318
 319 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
 320 {
 321         int cvt_idx;
 322
 323         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 324                 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
 325                         return cvt_idx;
 326
 327         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
 328         return -EINVAL;
 329 }
 330
 331 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 332                         struct snd_ctl_elem_info *uinfo)
 333 {
 334         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 335         struct hdmi_spec *spec;
 336         int pin_idx;
 337
 338         spec = codec->spec;
 339         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 340
 341         pin_idx = kcontrol->private_value;
 342         uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
 343
 344         return 0;
 345 }
 346
 347 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 348                         struct snd_ctl_elem_value *ucontrol)
 349 {
 350         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 351         struct hdmi_spec *spec;
 352         int pin_idx;
 353
 354         spec = codec->spec;
 355         pin_idx = kcontrol->private_value;
 356
 357         memcpy(ucontrol->value.bytes.data,
 358                 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
 359
 360         return 0;
 361 }
 362
 363 static struct snd_kcontrol_new eld_bytes_ctl = {
 364         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 365         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 366         .name = "ELD",
 367         .info = hdmi_eld_ctl_info,
 368         .get = hdmi_eld_ctl_get,
 369 };
 370
 371 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 372                         int device)
 373 {
 374         struct snd_kcontrol *kctl;
 375         struct hdmi_spec *spec = codec->spec;
 376         int err;
 377
 378         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 379         if (!kctl)
 380                 return -ENOMEM;
 381         kctl->private_value = pin_idx;
 382         kctl->id.device = device;
 383
 384         err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
 385         if (err < 0)
 386                 return err;
 387
 388         return 0;
 389 }
 390
 391 #ifdef BE_PARANOID
 392 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 393                                 int *packet_index, int *byte_index)
 394 {
 395         int val;
 396
 397         val = snd_hda_codec_read(codec, pin_nid, 0,
 398                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 399
 400         *packet_index = val >> 5;
 401         *byte_index = val & 0x1f;
 402 }
 403 #endif
 404
 405 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 406                                 int packet_index, int byte_index)
 407 {
 408         int val;
 409
 410         val = (packet_index << 5) | (byte_index & 0x1f);
 411
 412         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 413 }
 414
 415 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 416                                 unsigned char val)
 417 {
 418         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 419 }
 420
 421 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 422 {
 423         /* Unmute */
 424         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 425                 snd_hda_codec_write(codec, pin_nid, 0,
 426                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 427         /* Enable pin out: some machines with GM965 gets broken output when
 428          * the pin is disabled or changed while using with HDMI
 429          */
 430         snd_hda_codec_write(codec, pin_nid, 0,
 431                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
 432 }
 433
 434 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 435 {
 436         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 437                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 438 }
 439
 440 static void hdmi_set_channel_count(struct hda_codec *codec,
 441                                    hda_nid_t cvt_nid, int chs)
 442 {
 443         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 444                 snd_hda_codec_write(codec, cvt_nid, 0,
 445                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 446 }
 447
 448
 449 /*
 450  * Channel mapping routines
 451  */
 452
 453 /*
 454  * Compute derived values in channel_allocations[].
 455  */
 456 static void init_channel_allocations(void)
 457 {
 458         int i, j;
 459         struct cea_channel_speaker_allocation *p;
 460
 461         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 462                 p = channel_allocations + i;
 463                 p->channels = 0;
 464                 p->spk_mask = 0;
 465                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 466                         if (p->speakers[j]) {
 467                                 p->channels++;
 468                                 p->spk_mask |= p->speakers[j];
 469                         }
 470         }
 471 }
 472
 473 /*
 474  * The transformation takes two steps:
 475  *
 476  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 477  *            spk_mask => (channel_allocations[])         => ai->CA
 478  *
 479  * TODO: it could select the wrong CA from multiple candidates.
 480 */
 481 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 482 {
 483         int i;
 484         int ca = 0;
 485         int spk_mask = 0;
 486         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 487
 488         /*
 489          * CA defaults to 0 for basic stereo audio
 490          */
 491         if (channels <= 2)
 492                 return 0;
 493
 494         /*
 495          * expand ELD's speaker allocation mask
 496          *
 497          * ELD tells the speaker mask in a compact(paired) form,
 498          * expand ELD's notions to match the ones used by Audio InfoFrame.
 499          */
 500         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 501                 if (eld->spk_alloc & (1 << i))
 502                         spk_mask |= eld_speaker_allocation_bits[i];
 503         }
 504
 505         /* search for the first working match in the CA table */
 506         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 507                 if (channels == channel_allocations[i].channels &&
 508                     (spk_mask & channel_allocations[i].spk_mask) ==
 509                                 channel_allocations[i].spk_mask) {
 510                         ca = channel_allocations[i].ca_index;
 511                         break;
 512                 }
 513         }
 514
 515         snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
 516         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 517                     ca, channels, buf);
 518
 519         return ca;
 520 }
 521
 522 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 523                                        hda_nid_t pin_nid)
 524 {
 525 #ifdef CONFIG_SND_DEBUG_VERBOSE
 526         int i;
 527         int slot;
 528
 529         for (i = 0; i < 8; i++) {
 530                 slot = snd_hda_codec_read(codec, pin_nid, 0,
 531                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
 532                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 533                                                 slot >> 4, slot & 0xf);
 534         }
 535 #endif
 536 }
 537
 538
 539 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 540                                        hda_nid_t pin_nid,
 541                                        int ca)
 542 {
 543         int i;
 544         int err;
 545
 546         if (hdmi_channel_mapping[ca][1] == 0) {
 547                 for (i = 0; i < channel_allocations[ca].channels; i++)
 548                         hdmi_channel_mapping[ca][i] = i | (i << 4);
 549                 for (; i < 8; i++)
 550                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
 551         }
 552
 553         for (i = 0; i < 8; i++) {
 554                 err = snd_hda_codec_write(codec, pin_nid, 0,
 555                                           AC_VERB_SET_HDMI_CHAN_SLOT,
 556                                           hdmi_channel_mapping[ca][i]);
 557                 if (err) {
 558                         snd_printdd(KERN_NOTICE
 559                                     "HDMI: channel mapping failed\n");
 560                         break;
 561                 }
 562         }
 563
 564         hdmi_debug_channel_mapping(codec, pin_nid);
 565 }
 566
 567
 568 /*
 569  * Audio InfoFrame routines
 570  */
 571
 572 /*
 573  * Enable Audio InfoFrame Transmission
 574  */
 575 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 576                                        hda_nid_t pin_nid)
 577 {
 578         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 579         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 580                                                 AC_DIPXMIT_BEST);
 581 }
 582
 583 /*
 584  * Disable Audio InfoFrame Transmission
 585  */
 586 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 587                                       hda_nid_t pin_nid)
 588 {
 589         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 590         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 591                                                 AC_DIPXMIT_DISABLE);
 592 }
 593
 594 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 595 {
 596 #ifdef CONFIG_SND_DEBUG_VERBOSE
 597         int i;
 598         int size;
 599
 600         size = snd_hdmi_get_eld_size(codec, pin_nid);
 601         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 602
 603         for (i = 0; i < 8; i++) {
 604                 size = snd_hda_codec_read(codec, pin_nid, 0,
 605                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 606                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 607         }
 608 #endif
 609 }
 610
 611 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 612 {
 613 #ifdef BE_PARANOID
 614         int i, j;
 615         int size;
 616         int pi, bi;
 617         for (i = 0; i < 8; i++) {
 618                 size = snd_hda_codec_read(codec, pin_nid, 0,
 619                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 620                 if (size == 0)
 621                         continue;
 622
 623                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 624                 for (j = 1; j < 1000; j++) {
 625                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 626                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 627                         if (pi != i)
 628                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 629                                                 bi, pi, i);
 630                         if (bi == 0) /* byte index wrapped around */
 631                                 break;
 632                 }
 633                 snd_printd(KERN_INFO
 634                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 635                         i, size, j);
 636         }
 637 #endif
 638 }
 639
 640 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 641 {
 642         u8 *bytes = (u8 *)hdmi_ai;
 643         u8 sum = 0;
 644         int i;
 645
 646         hdmi_ai->checksum = 0;
 647
 648         for (i = 0; i < sizeof(*hdmi_ai); i++)
 649                 sum += bytes[i];
 650
 651         hdmi_ai->checksum = -sum;
 652 }
 653
 654 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 655                                       hda_nid_t pin_nid,
 656                                       u8 *dip, int size)
 657 {
 658         int i;
 659
 660         hdmi_debug_dip_size(codec, pin_nid);
 661         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 662
 663         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 664         for (i = 0; i < size; i++)
 665                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 666 }
 667
 668 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 669                                     u8 *dip, int size)
 670 {
 671         u8 val;
 672         int i;
 673
 674         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 675                                                             != AC_DIPXMIT_BEST)
 676                 return false;
 677
 678         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 679         for (i = 0; i < size; i++) {
 680                 val = snd_hda_codec_read(codec, pin_nid, 0,
 681                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 682                 if (val != dip[i])
 683                         return false;
 684         }
 685
 686         return true;
 687 }
 688
 689 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
 690                                         struct snd_pcm_substream *substream)
 691 {
 692         struct hdmi_spec *spec = codec->spec;
 693         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
 694         hda_nid_t pin_nid = per_pin->pin_nid;
 695         int channels = substream->runtime->channels;
 696         struct hdmi_eld *eld;
 697         int ca;
 698         union audio_infoframe ai;
 699
 700         eld = &spec->pins[pin_idx].sink_eld;
 701         if (!eld->monitor_present)
 702                 return;
 703
 704         ca = hdmi_channel_allocation(eld, channels);
 705
 706         memset(&ai, 0, sizeof(ai));
 707         if (eld->conn_type == 0) { /* HDMI */
 708                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 709
 710                 hdmi_ai->type           = 0x84;
 711                 hdmi_ai->ver            = 0x01;
 712                 hdmi_ai->len            = 0x0a;
 713                 hdmi_ai->CC02_CT47      = channels - 1;
 714                 hdmi_ai->CA             = ca;
 715                 hdmi_checksum_audio_infoframe(hdmi_ai);
 716         } else if (eld->conn_type == 1) { /* DisplayPort */
 717                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 718
 719                 dp_ai->type             = 0x84;
 720                 dp_ai->len              = 0x1b;
 721                 dp_ai->ver              = 0x11 << 2;
 722                 dp_ai->CC02_CT47        = channels - 1;
 723                 dp_ai->CA               = ca;
 724         } else {
 725                 snd_printd("HDMI: unknown connection type at pin %d\n",
 726                             pin_nid);
 727                 return;
 728         }
 729
 730         /*
 731          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 732          * sizeof(*dp_ai) to avoid partial match/update problems when
 733          * the user switches between HDMI/DP monitors.
 734          */
 735         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 736                                         sizeof(ai))) {
 737                 snd_printdd("hdmi_setup_audio_infoframe: "
 738                             "pin=%d channels=%d\n",
 739                             pin_nid,
 740                             channels);
 741                 hdmi_setup_channel_mapping(codec, pin_nid, ca);
 742                 hdmi_stop_infoframe_trans(codec, pin_nid);
 743                 hdmi_fill_audio_infoframe(codec, pin_nid,
 744                                             ai.bytes, sizeof(ai));
 745                 hdmi_start_infoframe_trans(codec, pin_nid);
 746         }
 747 }
 748
 749
 750 /*
 751  * Unsolicited events
 752  */
 753
 754 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 755
 756 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 757 {
 758         struct hdmi_spec *spec = codec->spec;
 759         int pin_nid = res >> AC_UNSOL_RES_TAG_SHIFT;
 760         int pd = !!(res & AC_UNSOL_RES_PD);
 761         int eldv = !!(res & AC_UNSOL_RES_ELDV);
 762         int pin_idx;
 763
 764         printk(KERN_INFO
 765                 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 766                 codec->addr, pin_nid, pd, eldv);
 767
 768         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
 769         if (pin_idx < 0)
 770                 return;
 771
 772         hdmi_present_sense(&spec->pins[pin_idx], 1);
 773 }
 774
 775 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 776 {
 777         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 778         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 779         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 780         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 781
 782         printk(KERN_INFO
 783                 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 784                 codec->addr,
 785                 tag,
 786                 subtag,
 787                 cp_state,
 788                 cp_ready);
 789
 790         /* TODO */
 791         if (cp_state)
 792                 ;
 793         if (cp_ready)
 794                 ;
 795 }
 796
 797
 798 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 799 {
 800         struct hdmi_spec *spec = codec->spec;
 801         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 802         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 803
 804         if (pin_nid_to_pin_index(spec, tag) < 0) {
 805                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
 806                 return;
 807         }
 808
 809         if (subtag == 0)
 810                 hdmi_intrinsic_event(codec, res);
 811         else
 812                 hdmi_non_intrinsic_event(codec, res);
 813 }
 814
 815 /*
 816  * Callbacks
 817  */
 818
 819 /* HBR should be Non-PCM, 8 channels */
 820 #define is_hbr_format(format) \
 821         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 822
 823 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 824                               hda_nid_t pin_nid, u32 stream_tag, int format)
 825 {
 826         int pinctl;
 827         int new_pinctl = 0;
 828
 829         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 830                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 831                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 832
 833                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 834                 if (is_hbr_format(format))
 835                         new_pinctl |= AC_PINCTL_EPT_HBR;
 836                 else
 837                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 838
 839                 snd_printdd("hdmi_setup_stream: "
 840                             "NID=0x%x, %spinctl=0x%x\n",
 841                             pin_nid,
 842                             pinctl == new_pinctl ? "" : "new-",
 843                             new_pinctl);
 844
 845                 if (pinctl != new_pinctl)
 846                         snd_hda_codec_write(codec, pin_nid, 0,
 847                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 848                                             new_pinctl);
 849
 850         }
 851         if (is_hbr_format(format) && !new_pinctl) {
 852                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
 853                 return -EINVAL;
 854         }
 855
 856         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 857         return 0;
 858 }
 859
 860 /*
 861  * HDA PCM callbacks
 862  */
 863 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
 864                          struct hda_codec *codec,
 865                          struct snd_pcm_substream *substream)
 866 {
 867         struct hdmi_spec *spec = codec->spec;
 868         struct snd_pcm_runtime *runtime = substream->runtime;
 869         int pin_idx, cvt_idx, mux_idx = 0;
 870         struct hdmi_spec_per_pin *per_pin;
 871         struct hdmi_eld *eld;
 872         struct hdmi_spec_per_cvt *per_cvt = NULL;
 873
 874         /* Validate hinfo */
 875         pin_idx = hinfo_to_pin_index(spec, hinfo);
 876         if (snd_BUG_ON(pin_idx < 0))
 877                 return -EINVAL;
 878         per_pin = &spec->pins[pin_idx];
 879         eld = &per_pin->sink_eld;
 880
 881         /* Dynamically assign converter to stream */
 882         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 883                 per_cvt = &spec->cvts[cvt_idx];
 884
 885                 /* Must not already be assigned */
 886                 if (per_cvt->assigned)
 887                         continue;
 888                 /* Must be in pin's mux's list of converters */
 889                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 890                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 891                                 break;
 892                 /* Not in mux list */
 893                 if (mux_idx == per_pin->num_mux_nids)
 894                         continue;
 895                 break;
 896         }
 897         /* No free converters */
 898         if (cvt_idx == spec->num_cvts)
 899                 return -ENODEV;
 900
 901         /* Claim converter */
 902         per_cvt->assigned = 1;
 903         hinfo->nid = per_cvt->cvt_nid;
 904
 905         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
 906                             AC_VERB_SET_CONNECT_SEL,
 907                             mux_idx);
 908         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
 909
 910         /* Initially set the converter's capabilities */
 911         hinfo->channels_min = per_cvt->channels_min;
 912         hinfo->channels_max = per_cvt->channels_max;
 913         hinfo->rates = per_cvt->rates;
 914         hinfo->formats = per_cvt->formats;
 915         hinfo->maxbps = per_cvt->maxbps;
 916
 917         /* Restrict capabilities by ELD if this isn't disabled */
 918         if (!static_hdmi_pcm && eld->eld_valid) {
 919                 snd_hdmi_eld_update_pcm_info(eld, hinfo);
 920                 if (hinfo->channels_min > hinfo->channels_max ||
 921                     !hinfo->rates || !hinfo->formats)
 922                         return -ENODEV;
 923         }
 924
 925         /* Store the updated parameters */
 926         runtime->hw.channels_min = hinfo->channels_min;
 927         runtime->hw.channels_max = hinfo->channels_max;
 928         runtime->hw.formats = hinfo->formats;
 929         runtime->hw.rates = hinfo->rates;
 930
 931         snd_pcm_hw_constraint_step(substream->runtime, 0,
 932                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
 933         return 0;
 934 }
 935
 936 /*
 937  * HDA/HDMI auto parsing
 938  */
 939 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
 940 {
 941         struct hdmi_spec *spec = codec->spec;
 942         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
 943         hda_nid_t pin_nid = per_pin->pin_nid;
 944
 945         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
 946                 snd_printk(KERN_WARNING
 947                            "HDMI: pin %d wcaps %#x "
 948                            "does not support connection list\n",
 949                            pin_nid, get_wcaps(codec, pin_nid));
 950                 return -EINVAL;
 951         }
 952
 953         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
 954                                                         per_pin->mux_nids,
 955                                                         HDA_MAX_CONNECTIONS);
 956
 957         return 0;
 958 }
 959
 960 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
 961 {
 962         struct hda_codec *codec = per_pin->codec;
 963         struct hdmi_eld *eld = &per_pin->sink_eld;
 964         hda_nid_t pin_nid = per_pin->pin_nid;
 965         /*
 966          * Always execute a GetPinSense verb here, even when called from
 967          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
 968          * response's PD bit is not the real PD value, but indicates that
 969          * the real PD value changed. An older version of the HD-audio
 970          * specification worked this way. Hence, we just ignore the data in
 971          * the unsolicited response to avoid custom WARs.
 972          */
 973         int present = snd_hda_pin_sense(codec, pin_nid);
 974         bool eld_valid = false;
 975
 976         memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
 977
 978         eld->monitor_present    = !!(present & AC_PINSENSE_PRESENCE);
 979         if (eld->monitor_present)
 980                 eld_valid       = !!(present & AC_PINSENSE_ELDV);
 981
 982         printk(KERN_INFO
 983                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 984                 codec->addr, pin_nid, eld->monitor_present, eld_valid);
 985
 986         if (eld_valid) {
 987                 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
 988                         snd_hdmi_show_eld(eld);
 989                 else if (repoll) {
 990                         queue_delayed_work(codec->bus->workq,
 991                                            &per_pin->work,
 992                                            msecs_to_jiffies(300));
 993                 }
 994         }
 995
 996         snd_hda_input_jack_report(codec, pin_nid);
 997 }
 998
 999 static void hdmi_repoll_eld(struct work_struct *work)
1000 {
1001         struct hdmi_spec_per_pin *per_pin =
1002         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1003
1004         if (per_pin->repoll_count++ > 6)
1005                 per_pin->repoll_count = 0;
1006
1007         hdmi_present_sense(per_pin, per_pin->repoll_count);
1008 }
1009
1010 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1011 {
1012         struct hdmi_spec *spec = codec->spec;
1013         unsigned int caps, config;
1014         int pin_idx;
1015         struct hdmi_spec_per_pin *per_pin;
1016         int err;
1017
1018         caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
1019         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1020                 return 0;
1021
1022         config = snd_hda_codec_read(codec, pin_nid, 0,
1023                                 AC_VERB_GET_CONFIG_DEFAULT, 0);
1024         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1025                 return 0;
1026
1027         if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1028                 return -E2BIG;
1029
1030         pin_idx = spec->num_pins;
1031         per_pin = &spec->pins[pin_idx];
1032
1033         per_pin->pin_nid = pin_nid;
1034
1035         err = hdmi_read_pin_conn(codec, pin_idx);
1036         if (err < 0)
1037                 return err;
1038
1039         spec->num_pins++;
1040
1041         return 0;
1042 }
1043
1044 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1045 {
1046         struct hdmi_spec *spec = codec->spec;
1047         int cvt_idx;
1048         struct hdmi_spec_per_cvt *per_cvt;
1049         unsigned int chans;
1050         int err;
1051
1052         if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1053                 return -E2BIG;
1054
1055         chans = get_wcaps(codec, cvt_nid);
1056         chans = get_wcaps_channels(chans);
1057
1058         cvt_idx = spec->num_cvts;
1059         per_cvt = &spec->cvts[cvt_idx];
1060
1061         per_cvt->cvt_nid = cvt_nid;
1062         per_cvt->channels_min = 2;
1063         if (chans <= 16)
1064                 per_cvt->channels_max = chans;
1065
1066         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1067                                           &per_cvt->rates,
1068                                           &per_cvt->formats,
1069                                           &per_cvt->maxbps);
1070         if (err < 0)
1071                 return err;
1072
1073         spec->num_cvts++;
1074
1075         return 0;
1076 }
1077
1078 static int hdmi_parse_codec(struct hda_codec *codec)
1079 {
1080         hda_nid_t nid;
1081         int i, nodes;
1082
1083         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1084         if (!nid || nodes < 0) {
1085                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1086                 return -EINVAL;
1087         }
1088
1089         for (i = 0; i < nodes; i++, nid++) {
1090                 unsigned int caps;
1091                 unsigned int type;
1092
1093                 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1094                 type = get_wcaps_type(caps);
1095
1096                 if (!(caps & AC_WCAP_DIGITAL))
1097                         continue;
1098
1099                 switch (type) {
1100                 case AC_WID_AUD_OUT:
1101                         hdmi_add_cvt(codec, nid);
1102                         break;
1103                 case AC_WID_PIN:
1104                         hdmi_add_pin(codec, nid);
1105                         break;
1106                 }
1107         }
1108
1109         /*
1110          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1111          * can be lost and presence sense verb will become inaccurate if the
1112          * HDA link is powered off at hot plug or hw initialization time.
1113          */
1114 #ifdef CONFIG_SND_HDA_POWER_SAVE
1115         if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1116               AC_PWRST_EPSS))
1117                 codec->bus->power_keep_link_on = 1;
1118 #endif
1119
1120         return 0;
1121 }
1122
1123 /*
1124  */
1125 static char *generic_hdmi_pcm_names[MAX_HDMI_PINS] = {
1126         "HDMI 0",
1127         "HDMI 1",
1128         "HDMI 2",
1129         "HDMI 3",
1130 };
1131
1132 /*
1133  * HDMI callbacks
1134  */
1135
1136 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1137                                            struct hda_codec *codec,
1138                                            unsigned int stream_tag,
1139                                            unsigned int format,
1140                                            struct snd_pcm_substream *substream)
1141 {
1142         hda_nid_t cvt_nid = hinfo->nid;
1143         struct hdmi_spec *spec = codec->spec;
1144         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1145         hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1146
1147         hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1148
1149         hdmi_setup_audio_infoframe(codec, pin_idx, substream);
1150
1151         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1152 }
1153
1154 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1155                                              struct hda_codec *codec,
1156                                              struct snd_pcm_substream *substream)
1157 {
1158         struct hdmi_spec *spec = codec->spec;
1159         int cvt_idx, pin_idx;
1160         struct hdmi_spec_per_cvt *per_cvt;
1161         struct hdmi_spec_per_pin *per_pin;
1162
1163         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1164
1165         if (hinfo->nid) {
1166                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1167                 if (snd_BUG_ON(cvt_idx < 0))
1168                         return -EINVAL;
1169                 per_cvt = &spec->cvts[cvt_idx];
1170
1171                 snd_BUG_ON(!per_cvt->assigned);
1172                 per_cvt->assigned = 0;
1173                 hinfo->nid = 0;
1174
1175                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1176                 if (snd_BUG_ON(pin_idx < 0))
1177                         return -EINVAL;
1178                 per_pin = &spec->pins[pin_idx];
1179
1180                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1181         }
1182
1183         return 0;
1184 }
1185
1186 static const struct hda_pcm_ops generic_ops = {
1187         .open = hdmi_pcm_open,
1188         .prepare = generic_hdmi_playback_pcm_prepare,
1189         .cleanup = generic_hdmi_playback_pcm_cleanup,
1190 };
1191
1192 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1193 {
1194         struct hdmi_spec *spec = codec->spec;
1195         int pin_idx;
1196
1197         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1198                 struct hda_pcm *info;
1199                 struct hda_pcm_stream *pstr;
1200
1201                 info = &spec->pcm_rec[pin_idx];
1202                 info->name = generic_hdmi_pcm_names[pin_idx];
1203                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1204
1205                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1206                 pstr->substreams = 1;
1207                 pstr->ops = generic_ops;
1208                 /* other pstr fields are set in open */
1209         }
1210
1211         codec->num_pcms = spec->num_pins;
1212         codec->pcm_info = spec->pcm_rec;
1213
1214         return 0;
1215 }
1216
1217 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1218 {
1219         int err;
1220         char hdmi_str[32];
1221         struct hdmi_spec *spec = codec->spec;
1222         struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1223         int pcmdev = spec->pcm_rec[pin_idx].device;
1224
1225         snprintf(hdmi_str, sizeof(hdmi_str), "HDMI/DP,pcm=%d", pcmdev);
1226
1227         err = snd_hda_input_jack_add(codec, per_pin->pin_nid,
1228                              SND_JACK_VIDEOOUT, pcmdev > 0 ? hdmi_str : NULL);
1229         if (err < 0)
1230                 return err;
1231
1232         hdmi_present_sense(per_pin, 0);
1233         return 0;
1234 }
1235
1236 static int generic_hdmi_build_controls(struct hda_codec *codec)
1237 {
1238         struct hdmi_spec *spec = codec->spec;
1239         int err;
1240         int pin_idx;
1241
1242         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1243                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1244
1245                 err = generic_hdmi_build_jack(codec, pin_idx);
1246                 if (err < 0)
1247                         return err;
1248
1249                 err = snd_hda_create_spdif_out_ctls(codec,
1250                                                     per_pin->pin_nid,
1251                                                     per_pin->mux_nids[0]);
1252                 if (err < 0)
1253                         return err;
1254                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1255
1256                 /* add control for ELD Bytes */
1257                 err = hdmi_create_eld_ctl(codec,
1258                                         pin_idx,
1259                                         spec->pcm_rec[pin_idx].device);
1260
1261                 if (err < 0)
1262                         return err;
1263         }
1264
1265         return 0;
1266 }
1267
1268 static int generic_hdmi_init(struct hda_codec *codec)
1269 {
1270         struct hdmi_spec *spec = codec->spec;
1271         int pin_idx;
1272
1273         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1274                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1275                 hda_nid_t pin_nid = per_pin->pin_nid;
1276                 struct hdmi_eld *eld = &per_pin->sink_eld;
1277
1278                 hdmi_init_pin(codec, pin_nid);
1279                 snd_hda_codec_write(codec, pin_nid, 0,
1280                                     AC_VERB_SET_UNSOLICITED_ENABLE,
1281                                     AC_USRSP_EN | pin_nid);
1282
1283                 per_pin->codec = codec;
1284                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1285                 snd_hda_eld_proc_new(codec, eld, pin_idx);
1286         }
1287         return 0;
1288 }
1289
1290 static void generic_hdmi_free(struct hda_codec *codec)
1291 {
1292         struct hdmi_spec *spec = codec->spec;
1293         int pin_idx;
1294
1295         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1296                 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1297                 struct hdmi_eld *eld = &per_pin->sink_eld;
1298
1299                 cancel_delayed_work(&per_pin->work);
1300                 snd_hda_eld_proc_free(codec, eld);
1301         }
1302         snd_hda_input_jack_free(codec);
1303
1304         flush_workqueue(codec->bus->workq);
1305         kfree(spec);
1306 }
1307
1308 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1309         .init                   = generic_hdmi_init,
1310         .free                   = generic_hdmi_free,
1311         .build_pcms             = generic_hdmi_build_pcms,
1312         .build_controls         = generic_hdmi_build_controls,
1313         .unsol_event            = hdmi_unsol_event,
1314 };
1315
1316 static int patch_generic_hdmi(struct hda_codec *codec)
1317 {
1318         struct hdmi_spec *spec;
1319
1320         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1321         if (spec == NULL)
1322                 return -ENOMEM;
1323
1324         codec->spec = spec;
1325         if (hdmi_parse_codec(codec) < 0) {
1326                 codec->spec = NULL;
1327                 kfree(spec);
1328                 return -EINVAL;
1329         }
1330         codec->patch_ops = generic_hdmi_patch_ops;
1331
1332         init_channel_allocations();
1333
1334         return 0;
1335 }
1336
1337 /*
1338  * Shared non-generic implementations
1339  */
1340
1341 static int simple_playback_build_pcms(struct hda_codec *codec)
1342 {
1343         struct hdmi_spec *spec = codec->spec;
1344         struct hda_pcm *info = spec->pcm_rec;
1345         int i;
1346
1347         codec->num_pcms = spec->num_cvts;
1348         codec->pcm_info = info;
1349
1350         for (i = 0; i < codec->num_pcms; i++, info++) {
1351                 unsigned int chans;
1352                 struct hda_pcm_stream *pstr;
1353
1354                 chans = get_wcaps(codec, spec->cvts[i].cvt_nid);
1355                 chans = get_wcaps_channels(chans);
1356
1357                 info->name = generic_hdmi_pcm_names[i];
1358                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1359                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1360                 snd_BUG_ON(!spec->pcm_playback);
1361                 *pstr = *spec->pcm_playback;
1362                 pstr->nid = spec->cvts[i].cvt_nid;
1363                 if (pstr->channels_max <= 2 && chans && chans <= 16)
1364                         pstr->channels_max = chans;
1365         }
1366
1367         return 0;
1368 }
1369
1370 static int simple_playback_build_controls(struct hda_codec *codec)
1371 {
1372         struct hdmi_spec *spec = codec->spec;
1373         int err;
1374         int i;
1375
1376         for (i = 0; i < codec->num_pcms; i++) {
1377                 err = snd_hda_create_spdif_out_ctls(codec,
1378                                                     spec->cvts[i].cvt_nid,
1379                                                     spec->cvts[i].cvt_nid);
1380                 if (err < 0)
1381                         return err;
1382         }
1383
1384         return 0;
1385 }
1386
1387 static void simple_playback_free(struct hda_codec *codec)
1388 {
1389         struct hdmi_spec *spec = codec->spec;
1390
1391         kfree(spec);
1392 }
1393
1394 /*
1395  * Nvidia specific implementations
1396  */
1397
1398 #define Nv_VERB_SET_Channel_Allocation          0xF79
1399 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
1400 #define Nv_VERB_SET_Audio_Protection_On         0xF98
1401 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
1402
1403 #define nvhdmi_master_con_nid_7x        0x04
1404 #define nvhdmi_master_pin_nid_7x        0x05
1405
1406 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1407         /*front, rear, clfe, rear_surr */
1408         0x6, 0x8, 0xa, 0xc,
1409 };
1410
1411 static const struct hda_verb nvhdmi_basic_init_7x[] = {
1412         /* set audio protect on */
1413         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1414         /* enable digital output on pin widget */
1415         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1416         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1417         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1418         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1419         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1420         {} /* terminator */
1421 };
1422
1423 #ifdef LIMITED_RATE_FMT_SUPPORT
1424 /* support only the safe format and rate */
1425 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
1426 #define SUPPORTED_MAXBPS        16
1427 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
1428 #else
1429 /* support all rates and formats */
1430 #define SUPPORTED_RATES \
1431         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1432         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1433          SNDRV_PCM_RATE_192000)
1434 #define SUPPORTED_MAXBPS        24
1435 #define SUPPORTED_FORMATS \
1436         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1437 #endif
1438
1439 static int nvhdmi_7x_init(struct hda_codec *codec)
1440 {
1441         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1442         return 0;
1443 }
1444
1445 static unsigned int channels_2_6_8[] = {
1446         2, 6, 8
1447 };
1448
1449 static unsigned int channels_2_8[] = {
1450         2, 8
1451 };
1452
1453 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1454         .count = ARRAY_SIZE(channels_2_6_8),
1455         .list = channels_2_6_8,
1456         .mask = 0,
1457 };
1458
1459 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1460         .count = ARRAY_SIZE(channels_2_8),
1461         .list = channels_2_8,
1462         .mask = 0,
1463 };
1464
1465 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1466                                     struct hda_codec *codec,
1467                                     struct snd_pcm_substream *substream)
1468 {
1469         struct hdmi_spec *spec = codec->spec;
1470         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1471
1472         switch (codec->preset->id) {
1473         case 0x10de0002:
1474         case 0x10de0003:
1475         case 0x10de0005:
1476         case 0x10de0006:
1477                 hw_constraints_channels = &hw_constraints_2_8_channels;
1478                 break;
1479         case 0x10de0007:
1480                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1481                 break;
1482         default:
1483                 break;
1484         }
1485
1486         if (hw_constraints_channels != NULL) {
1487                 snd_pcm_hw_constraint_list(substream->runtime, 0,
1488                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1489                                 hw_constraints_channels);
1490         } else {
1491                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1492                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1493         }
1494
1495         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1496 }
1497
1498 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1499                                      struct hda_codec *codec,
1500                                      struct snd_pcm_substream *substream)
1501 {
1502         struct hdmi_spec *spec = codec->spec;
1503         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1504 }
1505
1506 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1507                                        struct hda_codec *codec,
1508                                        unsigned int stream_tag,
1509                                        unsigned int format,
1510                                        struct snd_pcm_substream *substream)
1511 {
1512         struct hdmi_spec *spec = codec->spec;
1513         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1514                                              stream_tag, format, substream);
1515 }
1516
1517 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1518                                                     int channels)
1519 {
1520         unsigned int chanmask;
1521         int chan = channels ? (channels - 1) : 1;
1522
1523         switch (channels) {
1524         default:
1525         case 0:
1526         case 2:
1527                 chanmask = 0x00;
1528                 break;
1529         case 4:
1530                 chanmask = 0x08;
1531                 break;
1532         case 6:
1533                 chanmask = 0x0b;
1534                 break;
1535         case 8:
1536                 chanmask = 0x13;
1537                 break;
1538         }
1539
1540         /* Set the audio infoframe channel allocation and checksum fields.  The
1541          * channel count is computed implicitly by the hardware. */
1542         snd_hda_codec_write(codec, 0x1, 0,
1543                         Nv_VERB_SET_Channel_Allocation, chanmask);
1544
1545         snd_hda_codec_write(codec, 0x1, 0,
1546                         Nv_VERB_SET_Info_Frame_Checksum,
1547                         (0x71 - chan - chanmask));
1548 }
1549
1550 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1551                                    struct hda_codec *codec,
1552                                    struct snd_pcm_substream *substream)
1553 {
1554         struct hdmi_spec *spec = codec->spec;
1555         int i;
1556
1557         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1558                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1559         for (i = 0; i < 4; i++) {
1560                 /* set the stream id */
1561                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1562                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
1563                 /* set the stream format */
1564                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1565                                 AC_VERB_SET_STREAM_FORMAT, 0);
1566         }
1567
1568         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1569          * streams are disabled. */
1570         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1571
1572         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1573 }
1574
1575 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1576                                      struct hda_codec *codec,
1577                                      unsigned int stream_tag,
1578                                      unsigned int format,
1579                                      struct snd_pcm_substream *substream)
1580 {
1581         int chs;
1582         unsigned int dataDCC2, channel_id;
1583         int i;
1584         struct hdmi_spec *spec = codec->spec;
1585         struct hda_spdif_out *spdif =
1586                 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1587
1588         mutex_lock(&codec->spdif_mutex);
1589
1590         chs = substream->runtime->channels;
1591
1592         dataDCC2 = 0x2;
1593
1594         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1595         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1596                 snd_hda_codec_write(codec,
1597                                 nvhdmi_master_con_nid_7x,
1598                                 0,
1599                                 AC_VERB_SET_DIGI_CONVERT_1,
1600                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1601
1602         /* set the stream id */
1603         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1604                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1605
1606         /* set the stream format */
1607         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1608                         AC_VERB_SET_STREAM_FORMAT, format);
1609
1610         /* turn on again (if needed) */
1611         /* enable and set the channel status audio/data flag */
1612         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1613                 snd_hda_codec_write(codec,
1614                                 nvhdmi_master_con_nid_7x,
1615                                 0,
1616                                 AC_VERB_SET_DIGI_CONVERT_1,
1617                                 spdif->ctls & 0xff);
1618                 snd_hda_codec_write(codec,
1619                                 nvhdmi_master_con_nid_7x,
1620                                 0,
1621                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1622         }
1623
1624         for (i = 0; i < 4; i++) {
1625                 if (chs == 2)
1626                         channel_id = 0;
1627                 else
1628                         channel_id = i * 2;
1629
1630                 /* turn off SPDIF once;
1631                  *otherwise the IEC958 bits won't be updated
1632                  */
1633                 if (codec->spdif_status_reset &&
1634                 (spdif->ctls & AC_DIG1_ENABLE))
1635                         snd_hda_codec_write(codec,
1636                                 nvhdmi_con_nids_7x[i],
1637                                 0,
1638                                 AC_VERB_SET_DIGI_CONVERT_1,
1639                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1640                 /* set the stream id */
1641                 snd_hda_codec_write(codec,
1642                                 nvhdmi_con_nids_7x[i],
1643                                 0,
1644                                 AC_VERB_SET_CHANNEL_STREAMID,
1645                                 (stream_tag << 4) | channel_id);
1646                 /* set the stream format */
1647                 snd_hda_codec_write(codec,
1648                                 nvhdmi_con_nids_7x[i],
1649                                 0,
1650                                 AC_VERB_SET_STREAM_FORMAT,
1651                                 format);
1652                 /* turn on again (if needed) */
1653                 /* enable and set the channel status audio/data flag */
1654                 if (codec->spdif_status_reset &&
1655                 (spdif->ctls & AC_DIG1_ENABLE)) {
1656                         snd_hda_codec_write(codec,
1657                                         nvhdmi_con_nids_7x[i],
1658                                         0,
1659                                         AC_VERB_SET_DIGI_CONVERT_1,
1660                                         spdif->ctls & 0xff);
1661                         snd_hda_codec_write(codec,
1662                                         nvhdmi_con_nids_7x[i],
1663                                         0,
1664                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1665                 }
1666         }
1667
1668         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1669
1670         mutex_unlock(&codec->spdif_mutex);
1671         return 0;
1672 }
1673
1674 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1675         .substreams = 1,
1676         .channels_min = 2,
1677         .channels_max = 8,
1678         .nid = nvhdmi_master_con_nid_7x,
1679         .rates = SUPPORTED_RATES,
1680         .maxbps = SUPPORTED_MAXBPS,
1681         .formats = SUPPORTED_FORMATS,
1682         .ops = {
1683                 .open = simple_playback_pcm_open,
1684                 .close = nvhdmi_8ch_7x_pcm_close,
1685                 .prepare = nvhdmi_8ch_7x_pcm_prepare
1686         },
1687 };
1688
1689 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1690         .substreams = 1,
1691         .channels_min = 2,
1692         .channels_max = 2,
1693         .nid = nvhdmi_master_con_nid_7x,
1694         .rates = SUPPORTED_RATES,
1695         .maxbps = SUPPORTED_MAXBPS,
1696         .formats = SUPPORTED_FORMATS,
1697         .ops = {
1698                 .open = simple_playback_pcm_open,
1699                 .close = simple_playback_pcm_close,
1700                 .prepare = simple_playback_pcm_prepare
1701         },
1702 };
1703
1704 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1705         .build_controls = simple_playback_build_controls,
1706         .build_pcms = simple_playback_build_pcms,
1707         .init = nvhdmi_7x_init,
1708         .free = simple_playback_free,
1709 };
1710
1711 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1712         .build_controls = simple_playback_build_controls,
1713         .build_pcms = simple_playback_build_pcms,
1714         .init = nvhdmi_7x_init,
1715         .free = simple_playback_free,
1716 };
1717
1718 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1719 {
1720         struct hdmi_spec *spec;
1721
1722         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1723         if (spec == NULL)
1724                 return -ENOMEM;
1725
1726         codec->spec = spec;
1727
1728         spec->multiout.num_dacs = 0;  /* no analog */
1729         spec->multiout.max_channels = 2;
1730         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1731         spec->num_cvts = 1;
1732         spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x;
1733         spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1734
1735         codec->patch_ops = nvhdmi_patch_ops_2ch;
1736
1737         return 0;
1738 }
1739
1740 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1741 {
1742         struct hdmi_spec *spec;
1743         int err = patch_nvhdmi_2ch(codec);
1744
1745         if (err < 0)
1746                 return err;
1747         spec = codec->spec;
1748         spec->multiout.max_channels = 8;
1749         spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1750         codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1751
1752         /* Initialize the audio infoframe channel mask and checksum to something
1753          * valid */
1754         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1755
1756         return 0;
1757 }
1758
1759 /*
1760  * ATI-specific implementations
1761  *
1762  * FIXME: we may omit the whole this and use the generic code once after
1763  * it's confirmed to work.
1764  */
1765
1766 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
1767 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
1768
1769 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1770                                         struct hda_codec *codec,
1771                                         unsigned int stream_tag,
1772                                         unsigned int format,
1773                                         struct snd_pcm_substream *substream)
1774 {
1775         struct hdmi_spec *spec = codec->spec;
1776         int chans = substream->runtime->channels;
1777         int i, err;
1778
1779         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1780                                           substream);
1781         if (err < 0)
1782                 return err;
1783         snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1784                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1785         /* FIXME: XXX */
1786         for (i = 0; i < chans; i++) {
1787                 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1788                                     AC_VERB_SET_HDMI_CHAN_SLOT,
1789                                     (i << 4) | i);
1790         }
1791         return 0;
1792 }
1793
1794 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1795         .substreams = 1,
1796         .channels_min = 2,
1797         .channels_max = 2,
1798         .nid = ATIHDMI_CVT_NID,
1799         .ops = {
1800                 .open = simple_playback_pcm_open,
1801                 .close = simple_playback_pcm_close,
1802                 .prepare = atihdmi_playback_pcm_prepare
1803         },
1804 };
1805
1806 static const struct hda_verb atihdmi_basic_init[] = {
1807         /* enable digital output on pin widget */
1808         { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1809         {} /* terminator */
1810 };
1811
1812 static int atihdmi_init(struct hda_codec *codec)
1813 {
1814         struct hdmi_spec *spec = codec->spec;
1815
1816         snd_hda_sequence_write(codec, atihdmi_basic_init);
1817         /* SI codec requires to unmute the pin */
1818         if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP)
1819                 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0,
1820                                     AC_VERB_SET_AMP_GAIN_MUTE,
1821                                     AMP_OUT_UNMUTE);
1822         return 0;
1823 }
1824
1825 static const struct hda_codec_ops atihdmi_patch_ops = {
1826         .build_controls = simple_playback_build_controls,
1827         .build_pcms = simple_playback_build_pcms,
1828         .init = atihdmi_init,
1829         .free = simple_playback_free,
1830 };
1831
1832
1833 static int patch_atihdmi(struct hda_codec *codec)
1834 {
1835         struct hdmi_spec *spec;
1836
1837         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1838         if (spec == NULL)
1839                 return -ENOMEM;
1840
1841         codec->spec = spec;
1842
1843         spec->multiout.num_dacs = 0;      /* no analog */
1844         spec->multiout.max_channels = 2;
1845         spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1846         spec->num_cvts = 1;
1847         spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID;
1848         spec->pins[0].pin_nid = ATIHDMI_PIN_NID;
1849         spec->pcm_playback = &atihdmi_pcm_digital_playback;
1850
1851         codec->patch_ops = atihdmi_patch_ops;
1852
1853         return 0;
1854 }
1855
1856
1857 /*
1858  * patch entries
1859  */
1860 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1861 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1862 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
1863 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
1864 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
1865 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
1866 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
1867 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
1868 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1869 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1870 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1871 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
1872 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
1873 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
1874 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
1875 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
1876 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
1877 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
1878 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
1879 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
1880 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
1881 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
1882 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
1883 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
1884 /* 17 is known to be absent */
1885 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
1886 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
1887 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
1888 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
1889 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
1890 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
1891 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
1892 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
1893 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
1894 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
1895 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
1896 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
1897 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1898 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
1899 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
1900 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
1901 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
1902 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1903 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1904 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
1905 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
1906 {} /* terminator */
1907 };
1908
1909 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1910 MODULE_ALIAS("snd-hda-codec-id:10027919");
1911 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1912 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1913 MODULE_ALIAS("snd-hda-codec-id:10951390");
1914 MODULE_ALIAS("snd-hda-codec-id:10951392");
1915 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1916 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1917 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1918 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1919 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1920 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1921 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1922 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1923 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1924 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1925 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1926 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1927 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1928 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1929 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1930 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1931 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1932 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1933 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1934 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1935 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1936 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1937 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1938 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1939 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1940 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1941 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1942 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1943 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1944 MODULE_ALIAS("snd-hda-codec-id:80860054");
1945 MODULE_ALIAS("snd-hda-codec-id:80862801");
1946 MODULE_ALIAS("snd-hda-codec-id:80862802");
1947 MODULE_ALIAS("snd-hda-codec-id:80862803");
1948 MODULE_ALIAS("snd-hda-codec-id:80862804");
1949 MODULE_ALIAS("snd-hda-codec-id:80862805");
1950 MODULE_ALIAS("snd-hda-codec-id:80862806");
1951 MODULE_ALIAS("snd-hda-codec-id:80862880");
1952 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1953
1954 MODULE_LICENSE("GPL");
1955 MODULE_DESCRIPTION("HDMI HD-audio codec");
1956 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1957 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1958 MODULE_ALIAS("snd-hda-codec-atihdmi");
1959
1960 static struct hda_codec_preset_list intel_list = {
1961         .preset = snd_hda_preset_hdmi,
1962         .owner = THIS_MODULE,
1963 };
1964
1965 static int __init patch_hdmi_init(void)
1966 {
1967         return snd_hda_add_codec_preset(&intel_list);
1968 }
1969
1970 static void __exit patch_hdmi_exit(void)
1971 {
1972         snd_hda_delete_codec_preset(&intel_list);
1973 }
1974
1975 module_init(patch_hdmi_init)
1976 module_exit(patch_hdmi_exit)