sound/pci/cs46xx/dsp_spos.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  15  *
  16  */
  17
  18 /*
  19  * 2002-07 Benny Sjostrand benny@hostmobility.com
  20  */
  21
  22
  23 #include <asm/io.h>
  24 #include <linux/delay.h>
  25 #include <linux/pm.h>
  26 #include <linux/init.h>
  27 #include <linux/slab.h>
  28 #include <linux/vmalloc.h>
  29 #include <linux/mutex.h>
  30
  31 #include <sound/core.h>
  32 #include <sound/control.h>
  33 #include <sound/info.h>
  34 #include <sound/asoundef.h>
  35 #include <sound/cs46xx.h>
  36
  37 #include "cs46xx_lib.h"
  38 #include "dsp_spos.h"
  39
  40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
  41                                   struct dsp_scb_descriptor * fg_entry);
  42
  43 static enum wide_opcode wide_opcodes[] = {
  44         WIDE_FOR_BEGIN_LOOP,
  45         WIDE_FOR_BEGIN_LOOP2,
  46         WIDE_COND_GOTO_ADDR,
  47         WIDE_COND_GOTO_CALL,
  48         WIDE_TBEQ_COND_GOTO_ADDR,
  49         WIDE_TBEQ_COND_CALL_ADDR,
  50         WIDE_TBEQ_NCOND_GOTO_ADDR,
  51         WIDE_TBEQ_NCOND_CALL_ADDR,
  52         WIDE_TBEQ_COND_GOTO1_ADDR,
  53         WIDE_TBEQ_COND_CALL1_ADDR,
  54         WIDE_TBEQ_NCOND_GOTOI_ADDR,
  55         WIDE_TBEQ_NCOND_CALL1_ADDR
  56 };
  57
  58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
  59                                        u32 overlay_begin_address)
  60 {
  61         unsigned int i = 0, j, nreallocated = 0;
  62         u32 hival,loval,address;
  63         u32 mop_operands,mop_type,wide_op;
  64         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
  65
  66         if (snd_BUG_ON(size %2))
  67                 return -EINVAL;
  68
  69         while (i < size) {
  70                 loval = data[i++];
  71                 hival = data[i++];
  72
  73                 if (ins->code.offset > 0) {
  74                         mop_operands = (hival >> 6) & 0x03fff;
  75                         mop_type = mop_operands >> 10;
  76
  77                         /* check for wide type instruction */
  78                         if (mop_type == 0 &&
  79                             (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
  80                             (mop_operands & WIDE_INSTR_MASK) != 0) {
  81                                 wide_op = loval & 0x7f;
  82                                 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
  83                                         if (wide_opcodes[j] == wide_op) {
  84                                                 /* need to reallocate instruction */
  85                                                 address  = (hival & 0x00FFF) << 5;
  86                                                 address |=  loval >> 15;
  87
  88                                                 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
  89
  90                                                 if ( !(address & 0x8000) ) {
  91                                                         address += (ins->code.offset / 2) - overlay_begin_address;
  92                                                 } else {
  93                                                         snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
  94                                                 }
  95
  96                                                 hival &= 0xFF000;
  97                                                 loval &= 0x07FFF;
  98
  99                                                 hival |= ( (address >> 5)  & 0x00FFF);
 100                                                 loval |= ( (address << 15) & 0xF8000);
 101
 102                                                 address  = (hival & 0x00FFF) << 5;
 103                                                 address |=  loval >> 15;
 104
 105                                                 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);
 106                                                 nreallocated ++;
 107                                         } /* wide_opcodes[j] == wide_op */
 108                                 } /* for */
 109                         } /* mod_type == 0 ... */
 110                 } /* ins->code.offset > 0 */
 111
 112                 ins->code.data[ins->code.size++] = loval;
 113                 ins->code.data[ins->code.size++] = hival;
 114         }
 115
 116         snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
 117         return nreallocated;
 118 }
 119
 120 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
 121 {
 122         int i;
 123         for (i = 0;i < module->nsegments; ++i) {
 124                 if (module->segments[i].segment_type == seg_type) {
 125                         return (module->segments + i);
 126                 }
 127         }
 128
 129         return NULL;
 130 };
 131
 132 static int find_free_symbol_index (struct dsp_spos_instance * ins)
 133 {
 134         int index = ins->symbol_table.nsymbols,i;
 135
 136         for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
 137                 if (ins->symbol_table.symbols[i].deleted) {
 138                         index = i;
 139                         break;
 140                 }
 141         }
 142
 143         return index;
 144 }
 145
 146 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 147 {
 148         int i;
 149         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 150
 151         if (module->symbol_table.nsymbols > 0) {
 152                 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
 153                     module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
 154                         module->overlay_begin_address = module->symbol_table.symbols[0].address;
 155                 }
 156         }
 157
 158         for (i = 0;i < module->symbol_table.nsymbols; ++i) {
 159                 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 160                         snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 161                         return -ENOMEM;
 162                 }
 163
 164
 165                 if (cs46xx_dsp_lookup_symbol(chip,
 166                                              module->symbol_table.symbols[i].symbol_name,
 167                                              module->symbol_table.symbols[i].symbol_type) == NULL) {
 168
 169                         ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
 170                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
 171                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
 172                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
 173
 174                         if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
 175                                 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
 176
 177                         ins->symbol_table.nsymbols++;
 178                 } else {
 179           /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
 180                              module->symbol_table.symbols[i].symbol_name); */
 181                 }
 182         }
 183
 184         return 0;
 185 }
 186
 187 static struct dsp_symbol_entry *
 188 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
 189 {
 190         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 191         struct dsp_symbol_entry * symbol = NULL;
 192         int index;
 193
 194         if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 195                 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 196                 return NULL;
 197         }
 198
 199         if (cs46xx_dsp_lookup_symbol(chip,
 200                                      symbol_name,
 201                                      type) != NULL) {
 202                 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
 203                 return NULL;
 204         }
 205
 206         index = find_free_symbol_index (ins);
 207
 208         strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
 209         ins->symbol_table.symbols[index].address = address;
 210         ins->symbol_table.symbols[index].symbol_type = type;
 211         ins->symbol_table.symbols[index].module = NULL;
 212         ins->symbol_table.symbols[index].deleted = 0;
 213         symbol = (ins->symbol_table.symbols + index);
 214
 215         if (index > ins->symbol_table.highest_frag_index)
 216                 ins->symbol_table.highest_frag_index = index;
 217
 218         if (index == ins->symbol_table.nsymbols)
 219                 ins->symbol_table.nsymbols++; /* no frag. in list */
 220
 221         return symbol;
 222 }
 223
 224 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
 225 {
 226         struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
 227
 228         if (ins == NULL)
 229                 return NULL;
 230
 231         /* better to use vmalloc for this big table */
 232         ins->symbol_table.nsymbols = 0;
 233         ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
 234                                             DSP_MAX_SYMBOLS);
 235         ins->symbol_table.highest_frag_index = 0;
 236
 237         if (ins->symbol_table.symbols == NULL) {
 238                 cs46xx_dsp_spos_destroy(chip);
 239                 goto error;
 240         }
 241
 242         ins->code.offset = 0;
 243         ins->code.size = 0;
 244         ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
 245
 246         if (ins->code.data == NULL) {
 247                 cs46xx_dsp_spos_destroy(chip);
 248                 goto error;
 249         }
 250
 251         ins->nscb = 0;
 252         ins->ntask = 0;
 253
 254         ins->nmodules = 0;
 255         ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
 256
 257         if (ins->modules == NULL) {
 258                 cs46xx_dsp_spos_destroy(chip);
 259                 goto error;
 260         }
 261
 262         /* default SPDIF input sample rate
 263            to 48000 khz */
 264         ins->spdif_in_sample_rate = 48000;
 265
 266         /* maximize volume */
 267         ins->dac_volume_right = 0x8000;
 268         ins->dac_volume_left = 0x8000;
 269         ins->spdif_input_volume_right = 0x8000;
 270         ins->spdif_input_volume_left = 0x8000;
 271
 272         /* set left and right validity bits and
 273            default channel status */
 274         ins->spdif_csuv_default =
 275                 ins->spdif_csuv_stream =
 276          /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
 277          /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
 278          /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
 279          /* left and right validity bits */ (1 << 13) | (1 << 12);
 280
 281         return ins;
 282
 283 error:
 284         kfree(ins);
 285         return NULL;
 286 }
 287
 288 void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
 289 {
 290         int i;
 291         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 292
 293         if (snd_BUG_ON(!ins))
 294                 return;
 295
 296         mutex_lock(&chip->spos_mutex);
 297         for (i = 0; i < ins->nscb; ++i) {
 298                 if (ins->scbs[i].deleted) continue;
 299
 300                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 301 #ifdef CONFIG_PM
 302                 kfree(ins->scbs[i].data);
 303 #endif
 304         }
 305
 306         kfree(ins->code.data);
 307         vfree(ins->symbol_table.symbols);
 308         kfree(ins->modules);
 309         kfree(ins);
 310         mutex_unlock(&chip->spos_mutex);
 311 }
 312
 313 static int dsp_load_parameter(struct snd_cs46xx *chip,
 314                               struct dsp_segment_desc *parameter)
 315 {
 316         u32 doffset, dsize;
 317
 318         if (!parameter) {
 319                 snd_printdd("dsp_spos: module got no parameter segment\n");
 320                 return 0;
 321         }
 322
 323         doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
 324         dsize   = parameter->size * 4;
 325
 326         snd_printdd("dsp_spos: "
 327                     "downloading parameter data to chip (%08x-%08x)\n",
 328                     doffset,doffset + dsize);
 329         if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
 330                 snd_printk(KERN_ERR "dsp_spos: "
 331                            "failed to download parameter data to DSP\n");
 332                 return -EINVAL;
 333         }
 334         return 0;
 335 }
 336
 337 static int dsp_load_sample(struct snd_cs46xx *chip,
 338                            struct dsp_segment_desc *sample)
 339 {
 340         u32 doffset, dsize;
 341
 342         if (!sample) {
 343                 snd_printdd("dsp_spos: module got no sample segment\n");
 344                 return 0;
 345         }
 346
 347         doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
 348         dsize   =  sample->size * 4;
 349
 350         snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
 351                     doffset,doffset + dsize);
 352
 353         if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
 354                 snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
 355                 return -EINVAL;
 356         }
 357         return 0;
 358 }
 359
 360 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 361 {
 362         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 363         struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
 364         u32 doffset, dsize;
 365         int err;
 366
 367         if (ins->nmodules == DSP_MAX_MODULES - 1) {
 368                 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
 369                 return -ENOMEM;
 370         }
 371
 372         snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
 373
 374         if (ins->nmodules == 0) {
 375                 snd_printdd("dsp_spos: clearing parameter area\n");
 376                 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
 377         }
 378
 379         err = dsp_load_parameter(chip, get_segment_desc(module,
 380                                                         SEGTYPE_SP_PARAMETER));
 381         if (err < 0)
 382                 return err;
 383
 384         if (ins->nmodules == 0) {
 385                 snd_printdd("dsp_spos: clearing sample area\n");
 386                 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
 387         }
 388
 389         err = dsp_load_sample(chip, get_segment_desc(module,
 390                                                      SEGTYPE_SP_SAMPLE));
 391         if (err < 0)
 392                 return err;
 393
 394         if (ins->nmodules == 0) {
 395                 snd_printdd("dsp_spos: clearing code area\n");
 396                 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
 397         }
 398
 399         if (code == NULL) {
 400                 snd_printdd("dsp_spos: module got no code segment\n");
 401         } else {
 402                 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
 403                         snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
 404                         return -ENOMEM;
 405                 }
 406
 407                 module->load_address = ins->code.offset;
 408                 module->overlay_begin_address = 0x000;
 409
 410                 /* if module has a code segment it must have
 411                    symbol table */
 412                 if (snd_BUG_ON(!module->symbol_table.symbols))
 413                         return -ENOMEM;
 414                 if (add_symbols(chip,module)) {
 415                         snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
 416                         return -ENOMEM;
 417                 }
 418
 419                 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
 420                 dsize   = code->size * 4;
 421                 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
 422                             doffset,doffset + dsize);
 423
 424                 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
 425
 426                 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
 427                         snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
 428                         return -EINVAL;
 429                 }
 430
 431                 ins->code.offset += code->size;
 432         }
 433
 434         /* NOTE: module segments and symbol table must be
 435            statically allocated. Case that module data is
 436            not generated by the ospparser */
 437         ins->modules[ins->nmodules] = *module;
 438         ins->nmodules++;
 439
 440         return 0;
 441 }
 442
 443 struct dsp_symbol_entry *
 444 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
 445 {
 446         int i;
 447         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 448
 449         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 450
 451                 if (ins->symbol_table.symbols[i].deleted)
 452                         continue;
 453
 454                 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
 455                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 456                         return (ins->symbol_table.symbols + i);
 457                 }
 458         }
 459
 460 #if 0
 461         printk ("dsp_spos: symbol <%s> type %02x not found\n",
 462                 symbol_name,symbol_type);
 463 #endif
 464
 465         return NULL;
 466 }
 467
 468
 469 #ifdef CONFIG_PROC_FS
 470 static struct dsp_symbol_entry *
 471 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
 472 {
 473         int i;
 474         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 475
 476         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 477
 478                 if (ins->symbol_table.symbols[i].deleted)
 479                         continue;
 480
 481                 if (ins->symbol_table.symbols[i].address == address &&
 482                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 483                         return (ins->symbol_table.symbols + i);
 484                 }
 485         }
 486
 487
 488         return NULL;
 489 }
 490
 491
 492 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
 493                                                struct snd_info_buffer *buffer)
 494 {
 495         struct snd_cs46xx *chip = entry->private_data;
 496         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 497         int i;
 498
 499         snd_iprintf(buffer, "SYMBOLS:\n");
 500         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 501                 char *module_str = "system";
 502
 503                 if (ins->symbol_table.symbols[i].deleted)
 504                         continue;
 505
 506                 if (ins->symbol_table.symbols[i].module != NULL) {
 507                         module_str = ins->symbol_table.symbols[i].module->module_name;
 508                 }
 509
 510
 511                 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
 512                             ins->symbol_table.symbols[i].address,
 513                             ins->symbol_table.symbols[i].symbol_type,
 514                             ins->symbol_table.symbols[i].symbol_name,
 515                             module_str);
 516         }
 517 }
 518
 519
 520 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
 521                                           struct snd_info_buffer *buffer)
 522 {
 523         struct snd_cs46xx *chip = entry->private_data;
 524         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 525         int i,j;
 526
 527         mutex_lock(&chip->spos_mutex);
 528         snd_iprintf(buffer, "MODULES:\n");
 529         for ( i = 0; i < ins->nmodules; ++i ) {
 530                 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
 531                 snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
 532                 snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
 533
 534                 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
 535                         struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
 536                         snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
 537                                     desc->segment_type,desc->offset, desc->size);
 538                 }
 539         }
 540         mutex_unlock(&chip->spos_mutex);
 541 }
 542
 543 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
 544                                             struct snd_info_buffer *buffer)
 545 {
 546         struct snd_cs46xx *chip = entry->private_data;
 547         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 548         int i, j, col;
 549         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 550
 551         mutex_lock(&chip->spos_mutex);
 552         snd_iprintf(buffer, "TASK TREES:\n");
 553         for ( i = 0; i < ins->ntask; ++i) {
 554                 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
 555
 556                 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
 557                         u32 val;
 558                         if (col == 4) {
 559                                 snd_iprintf(buffer,"\n");
 560                                 col = 0;
 561                         }
 562                         val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
 563                         snd_iprintf(buffer,"%08x ",val);
 564                 }
 565         }
 566
 567         snd_iprintf(buffer,"\n");
 568         mutex_unlock(&chip->spos_mutex);
 569 }
 570
 571 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
 572                                       struct snd_info_buffer *buffer)
 573 {
 574         struct snd_cs46xx *chip = entry->private_data;
 575         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 576         int i;
 577
 578         mutex_lock(&chip->spos_mutex);
 579         snd_iprintf(buffer, "SCB's:\n");
 580         for ( i = 0; i < ins->nscb; ++i) {
 581                 if (ins->scbs[i].deleted)
 582                         continue;
 583                 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
 584
 585                 if (ins->scbs[i].parent_scb_ptr != NULL) {
 586                         snd_iprintf(buffer,"parent [%s:%04x] ",
 587                                     ins->scbs[i].parent_scb_ptr->scb_name,
 588                                     ins->scbs[i].parent_scb_ptr->address);
 589                 } else snd_iprintf(buffer,"parent [none] ");
 590
 591                 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
 592                             ins->scbs[i].sub_list_ptr->scb_name,
 593                             ins->scbs[i].sub_list_ptr->address,
 594                             ins->scbs[i].next_scb_ptr->scb_name,
 595                             ins->scbs[i].next_scb_ptr->address,
 596                             ins->scbs[i].task_entry->symbol_name,
 597                             ins->scbs[i].task_entry->address);
 598         }
 599
 600         snd_iprintf(buffer,"\n");
 601         mutex_unlock(&chip->spos_mutex);
 602 }
 603
 604 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
 605                                                  struct snd_info_buffer *buffer)
 606 {
 607         struct snd_cs46xx *chip = entry->private_data;
 608         /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
 609         unsigned int i, col = 0;
 610         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 611         struct dsp_symbol_entry * symbol;
 612
 613         for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
 614                 if (col == 4) {
 615                         snd_iprintf(buffer,"\n");
 616                         col = 0;
 617                 }
 618
 619                 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
 620                         col = 0;
 621                         snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
 622                 }
 623
 624                 if (col == 0) {
 625                         snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
 626                 }
 627
 628                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 629         }
 630 }
 631
 632 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
 633                                               struct snd_info_buffer *buffer)
 634 {
 635         struct snd_cs46xx *chip = entry->private_data;
 636         int i,col = 0;
 637         void __iomem *dst = chip->region.idx[2].remap_addr;
 638
 639         snd_iprintf(buffer,"PCMREADER:\n");
 640         for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
 641                 if (col == 4) {
 642                         snd_iprintf(buffer,"\n");
 643                         col = 0;
 644                 }
 645
 646                 if (col == 0) {
 647                         snd_iprintf(buffer, "%04X ",i);
 648                 }
 649
 650                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 651         }
 652
 653         snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
 654
 655         col = 0;
 656         for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
 657                 if (col == 4) {
 658                         snd_iprintf(buffer,"\n");
 659                         col = 0;
 660                 }
 661
 662                 if (col == 0) {
 663                         snd_iprintf(buffer, "%04X ",i);
 664                 }
 665
 666                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 667         }
 668
 669         snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
 670         col = 0;
 671         for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
 672                 if (col == 4) {
 673                         snd_iprintf(buffer,"\n");
 674                         col = 0;
 675                 }
 676
 677                 if (col == 0) {
 678                         snd_iprintf(buffer, "%04X ",i);
 679                 }
 680
 681                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 682         }
 683
 684
 685         snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
 686         col = 0;
 687         for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
 688                 if (col == 4) {
 689                         snd_iprintf(buffer,"\n");
 690                         col = 0;
 691                 }
 692
 693                 if (col == 0) {
 694                         snd_iprintf(buffer, "%04X ",i);
 695                 }
 696
 697                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 698         }
 699
 700         snd_iprintf(buffer,"\n...\n");
 701         col = 0;
 702
 703         for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
 704                 if (col == 4) {
 705                         snd_iprintf(buffer,"\n");
 706                         col = 0;
 707                 }
 708
 709                 if (col == 0) {
 710                         snd_iprintf(buffer, "%04X ",i);
 711                 }
 712
 713                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 714         }
 715
 716
 717         snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
 718         col = 0;
 719         for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
 720                 if (col == 4) {
 721                         snd_iprintf(buffer,"\n");
 722                         col = 0;
 723                 }
 724
 725                 if (col == 0) {
 726                         snd_iprintf(buffer, "%04X ",i);
 727                 }
 728
 729                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 730         }
 731
 732         snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
 733         col = 0;
 734         for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
 735                 if (col == 4) {
 736                         snd_iprintf(buffer,"\n");
 737                         col = 0;
 738                 }
 739
 740                 if (col == 0) {
 741                         snd_iprintf(buffer, "%04X ",i);
 742                 }
 743
 744                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 745         }
 746 #if 0
 747         snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
 748         col = 0;
 749         for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
 750                 if (col == 4) {
 751                         snd_iprintf(buffer,"\n");
 752                         col = 0;
 753                 }
 754
 755                 if (col == 0) {
 756                         snd_iprintf(buffer, "%04X ",i);
 757                 }
 758
 759                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 760         }
 761 #endif
 762
 763         snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
 764         col = 0;
 765         for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
 766                 if (col == 4) {
 767                         snd_iprintf(buffer,"\n");
 768                         col = 0;
 769                 }
 770
 771                 if (col == 0) {
 772                         snd_iprintf(buffer, "%04X ",i);
 773                 }
 774
 775                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 776         }
 777         snd_iprintf(buffer,"\n");
 778 }
 779
 780 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
 781 {
 782         struct snd_info_entry *entry;
 783         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 784         int i;
 785
 786         ins->snd_card = card;
 787
 788         if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
 789                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 790                 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
 791
 792                 if (snd_info_register(entry) < 0) {
 793                         snd_info_free_entry(entry);
 794                         entry = NULL;
 795                 }
 796         }
 797
 798         ins->proc_dsp_dir = entry;
 799
 800         if (!ins->proc_dsp_dir)
 801                 return -ENOMEM;
 802
 803         if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
 804                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 805                 entry->private_data = chip;
 806                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 807                 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
 808                 if (snd_info_register(entry) < 0) {
 809                         snd_info_free_entry(entry);
 810                         entry = NULL;
 811                 }
 812         }
 813         ins->proc_sym_info_entry = entry;
 814
 815         if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
 816                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 817                 entry->private_data = chip;
 818                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 819                 entry->c.text.read = cs46xx_dsp_proc_modules_read;
 820                 if (snd_info_register(entry) < 0) {
 821                         snd_info_free_entry(entry);
 822                         entry = NULL;
 823                 }
 824         }
 825         ins->proc_modules_info_entry = entry;
 826
 827         if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
 828                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 829                 entry->private_data = chip;
 830                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 831                 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
 832                 if (snd_info_register(entry) < 0) {
 833                         snd_info_free_entry(entry);
 834                         entry = NULL;
 835                 }
 836         }
 837         ins->proc_parameter_dump_info_entry = entry;
 838
 839         if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
 840                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 841                 entry->private_data = chip;
 842                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 843                 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
 844                 if (snd_info_register(entry) < 0) {
 845                         snd_info_free_entry(entry);
 846                         entry = NULL;
 847                 }
 848         }
 849         ins->proc_sample_dump_info_entry = entry;
 850
 851         if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
 852                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 853                 entry->private_data = chip;
 854                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 855                 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
 856                 if (snd_info_register(entry) < 0) {
 857                         snd_info_free_entry(entry);
 858                         entry = NULL;
 859                 }
 860         }
 861         ins->proc_task_info_entry = entry;
 862
 863         if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
 864                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 865                 entry->private_data = chip;
 866                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 867                 entry->c.text.read = cs46xx_dsp_proc_scb_read;
 868                 if (snd_info_register(entry) < 0) {
 869                         snd_info_free_entry(entry);
 870                         entry = NULL;
 871                 }
 872         }
 873         ins->proc_scb_info_entry = entry;
 874
 875         mutex_lock(&chip->spos_mutex);
 876         /* register/update SCB's entries on proc */
 877         for (i = 0; i < ins->nscb; ++i) {
 878                 if (ins->scbs[i].deleted) continue;
 879
 880                 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
 881         }
 882         mutex_unlock(&chip->spos_mutex);
 883
 884         return 0;
 885 }
 886
 887 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
 888 {
 889         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 890         int i;
 891
 892         snd_info_free_entry(ins->proc_sym_info_entry);
 893         ins->proc_sym_info_entry = NULL;
 894
 895         snd_info_free_entry(ins->proc_modules_info_entry);
 896         ins->proc_modules_info_entry = NULL;
 897
 898         snd_info_free_entry(ins->proc_parameter_dump_info_entry);
 899         ins->proc_parameter_dump_info_entry = NULL;
 900
 901         snd_info_free_entry(ins->proc_sample_dump_info_entry);
 902         ins->proc_sample_dump_info_entry = NULL;
 903
 904         snd_info_free_entry(ins->proc_scb_info_entry);
 905         ins->proc_scb_info_entry = NULL;
 906
 907         snd_info_free_entry(ins->proc_task_info_entry);
 908         ins->proc_task_info_entry = NULL;
 909
 910         mutex_lock(&chip->spos_mutex);
 911         for (i = 0; i < ins->nscb; ++i) {
 912                 if (ins->scbs[i].deleted) continue;
 913                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 914         }
 915         mutex_unlock(&chip->spos_mutex);
 916
 917         snd_info_free_entry(ins->proc_dsp_dir);
 918         ins->proc_dsp_dir = NULL;
 919
 920         return 0;
 921 }
 922 #endif /* CONFIG_PROC_FS */
 923
 924 static int debug_tree;
 925 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
 926                                    u32  dest, int size)
 927 {
 928         void __iomem *spdst = chip->region.idx[1].remap_addr +
 929                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 930         int i;
 931
 932         for (i = 0; i < size; ++i) {
 933                 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
 934                 writel(task_data[i],spdst);
 935                 spdst += sizeof(u32);
 936         }
 937 }
 938
 939 static int debug_scb;
 940 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
 941 {
 942         void __iomem *spdst = chip->region.idx[1].remap_addr +
 943                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 944         int i;
 945
 946         for (i = 0; i < 0x10; ++i) {
 947                 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
 948                 writel(scb_data[i],spdst);
 949                 spdst += sizeof(u32);
 950         }
 951 }
 952
 953 static int find_free_scb_index (struct dsp_spos_instance * ins)
 954 {
 955         int index = ins->nscb, i;
 956
 957         for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
 958                 if (ins->scbs[i].deleted) {
 959                         index = i;
 960                         break;
 961                 }
 962         }
 963
 964         return index;
 965 }
 966
 967 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
 968 {
 969         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 970         struct dsp_scb_descriptor * desc = NULL;
 971         int index;
 972
 973         if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
 974                 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
 975                 return NULL;
 976         }
 977
 978         index = find_free_scb_index (ins);
 979
 980         memset(&ins->scbs[index], 0, sizeof(ins->scbs[index]));
 981         strcpy(ins->scbs[index].scb_name, name);
 982         ins->scbs[index].address = dest;
 983         ins->scbs[index].index = index;
 984         ins->scbs[index].ref_count = 1;
 985
 986         desc = (ins->scbs + index);
 987         ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
 988
 989         if (index > ins->scb_highest_frag_index)
 990                 ins->scb_highest_frag_index = index;
 991
 992         if (index == ins->nscb)
 993                 ins->nscb++;
 994
 995         return desc;
 996 }
 997
 998 static struct dsp_task_descriptor *
 999 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
1000 {
1001         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1002         struct dsp_task_descriptor * desc = NULL;
1003
1004         if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
1005                 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
1006                 return NULL;
1007         }
1008
1009         if (name)
1010                 strcpy(ins->tasks[ins->ntask].task_name, name);
1011         else
1012                 strcpy(ins->tasks[ins->ntask].task_name, "(NULL)");
1013         ins->tasks[ins->ntask].address = dest;
1014         ins->tasks[ins->ntask].size = size;
1015
1016         /* quick find in list */
1017         ins->tasks[ins->ntask].index = ins->ntask;
1018         desc = (ins->tasks + ins->ntask);
1019         ins->ntask++;
1020
1021         if (name)
1022                 add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1023         return desc;
1024 }
1025
1026 #define SCB_BYTES       (0x10 * 4)
1027
1028 struct dsp_scb_descriptor *
1029 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1030 {
1031         struct dsp_scb_descriptor * desc;
1032
1033 #ifdef CONFIG_PM
1034         /* copy the data for resume */
1035         scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL);
1036         if (!scb_data)
1037                 return NULL;
1038 #endif
1039
1040         desc = _map_scb (chip,name,dest);
1041         if (desc) {
1042                 desc->data = scb_data;
1043                 _dsp_create_scb(chip,scb_data,dest);
1044         } else {
1045                 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
1046 #ifdef CONFIG_PM
1047                 kfree(scb_data);
1048 #endif
1049         }
1050
1051         return desc;
1052 }
1053
1054
1055 static struct dsp_task_descriptor *
1056 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1057                              u32 dest, int size)
1058 {
1059         struct dsp_task_descriptor * desc;
1060
1061         desc = _map_task_tree (chip,name,dest,size);
1062         if (desc) {
1063                 desc->data = task_data;
1064                 _dsp_create_task_tree(chip,task_data,dest,size);
1065         } else {
1066                 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
1067         }
1068
1069         return desc;
1070 }
1071
1072 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1073 {
1074         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1075         struct dsp_symbol_entry * fg_task_tree_header_code;
1076         struct dsp_symbol_entry * task_tree_header_code;
1077         struct dsp_symbol_entry * task_tree_thread;
1078         struct dsp_symbol_entry * null_algorithm;
1079         struct dsp_symbol_entry * magic_snoop_task;
1080
1081         struct dsp_scb_descriptor * timing_master_scb;
1082         struct dsp_scb_descriptor * codec_out_scb;
1083         struct dsp_scb_descriptor * codec_in_scb;
1084         struct dsp_scb_descriptor * src_task_scb;
1085         struct dsp_scb_descriptor * master_mix_scb;
1086         struct dsp_scb_descriptor * rear_mix_scb;
1087         struct dsp_scb_descriptor * record_mix_scb;
1088         struct dsp_scb_descriptor * write_back_scb;
1089         struct dsp_scb_descriptor * vari_decimate_scb;
1090         struct dsp_scb_descriptor * rear_codec_out_scb;
1091         struct dsp_scb_descriptor * clfe_codec_out_scb;
1092         struct dsp_scb_descriptor * magic_snoop_scb;
1093
1094         int fifo_addr, fifo_span, valid_slots;
1095
1096         static struct dsp_spos_control_block sposcb = {
1097                 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1098                 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1099                 /* 2 */ DSP_SPOS_DC,0,
1100                 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1101                 /* 4 */ 0,0,
1102                 /* 5 */ DSP_SPOS_UU,0,
1103                 /* 6 */ FG_TASK_HEADER_ADDR,0,
1104                 /* 7 */ 0,0,
1105                 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1106                 /* 9 */ 0,
1107                 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1108                 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1109                 /* C */ DSP_SPOS_DC_DC,
1110                 /* D */ DSP_SPOS_DC_DC,
1111                 /* E */ DSP_SPOS_DC_DC,
1112                 /* F */ DSP_SPOS_DC_DC
1113         };
1114
1115         cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1116
1117         null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1118         if (null_algorithm == NULL) {
1119                 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
1120                 return -EIO;
1121         }
1122
1123         fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1124         if (fg_task_tree_header_code == NULL) {
1125                 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1126                 return -EIO;
1127         }
1128
1129         task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1130         if (task_tree_header_code == NULL) {
1131                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1132                 return -EIO;
1133         }
1134
1135         task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1136         if (task_tree_thread == NULL) {
1137                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
1138                 return -EIO;
1139         }
1140
1141         magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1142         if (magic_snoop_task == NULL) {
1143                 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1144                 return -EIO;
1145         }
1146
1147         {
1148                 /* create the null SCB */
1149                 static struct dsp_generic_scb null_scb = {
1150                         { 0, 0, 0, 0 },
1151                         { 0, 0, 0, 0, 0 },
1152                         NULL_SCB_ADDR, NULL_SCB_ADDR,
1153                         0, 0, 0, 0, 0,
1154                         {
1155                                 0,0,
1156                                 0,0,
1157                         }
1158                 };
1159
1160                 null_scb.entry_point = null_algorithm->address;
1161                 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1162                 ins->the_null_scb->task_entry = null_algorithm;
1163                 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1164                 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1165                 ins->the_null_scb->parent_scb_ptr = NULL;
1166                 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1167         }
1168
1169         {
1170                 /* setup foreground task tree */
1171                 static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
1172                         { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1173                           DSP_SPOS_DC_DC,
1174                           DSP_SPOS_DC_DC,
1175                           0x0000,DSP_SPOS_DC,
1176                           DSP_SPOS_DC, DSP_SPOS_DC,
1177                           DSP_SPOS_DC_DC,
1178                           DSP_SPOS_DC_DC,
1179                           DSP_SPOS_DC_DC,
1180                           DSP_SPOS_DC,DSP_SPOS_DC },
1181
1182                         {
1183                                 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1184                                 0,
1185                                 FG_TASK_HEADER_ADDR + TCBData,
1186                         },
1187
1188                         {
1189                                 4,0,
1190                                 1,0,
1191                                 2,SPOSCB_ADDR + HFGFlags,
1192                                 0,0,
1193                                 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1194                         },
1195
1196                         {
1197                                 DSP_SPOS_DC,0,
1198                                 DSP_SPOS_DC,DSP_SPOS_DC,
1199                                 DSP_SPOS_DC,DSP_SPOS_DC,
1200                                 DSP_SPOS_DC,DSP_SPOS_DC,
1201                                 DSP_SPOS_DC,DSP_SPOS_DC,
1202                                 DSP_SPOS_DCDC,
1203                                 DSP_SPOS_UU,1,
1204                                 DSP_SPOS_DCDC,
1205                                 DSP_SPOS_DCDC,
1206                                 DSP_SPOS_DCDC,
1207                                 DSP_SPOS_DCDC,
1208                                 DSP_SPOS_DCDC,
1209                                 DSP_SPOS_DCDC,
1210                                 DSP_SPOS_DCDC,
1211                                 DSP_SPOS_DCDC,
1212                                 DSP_SPOS_DCDC,
1213                                 DSP_SPOS_DCDC,
1214                                 DSP_SPOS_DCDC,
1215                                 DSP_SPOS_DCDC,
1216                                 DSP_SPOS_DCDC,
1217                                 DSP_SPOS_DCDC,
1218                                 DSP_SPOS_DCDC,
1219                                 DSP_SPOS_DCDC,
1220                                 DSP_SPOS_DCDC,
1221                                 DSP_SPOS_DCDC,
1222                                 DSP_SPOS_DCDC,
1223                                 DSP_SPOS_DCDC,
1224                                 DSP_SPOS_DCDC,
1225                                 DSP_SPOS_DCDC,
1226                                 DSP_SPOS_DCDC,
1227                                 DSP_SPOS_DCDC,
1228                                 DSP_SPOS_DCDC,
1229                                 DSP_SPOS_DCDC,
1230                                 DSP_SPOS_DCDC,
1231                                 DSP_SPOS_DCDC
1232                         },
1233                         {
1234                                 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1235                                 0,0
1236                         }
1237                 };
1238
1239                 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1240                 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1241                 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1242         }
1243
1244
1245         {
1246                 /* setup foreground task tree */
1247                 static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
1248                         { DSP_SPOS_DC_DC,
1249                           DSP_SPOS_DC_DC,
1250                           DSP_SPOS_DC_DC,
1251                           DSP_SPOS_DC, DSP_SPOS_DC,
1252                           DSP_SPOS_DC, DSP_SPOS_DC,
1253                           DSP_SPOS_DC_DC,
1254                           DSP_SPOS_DC_DC,
1255                           DSP_SPOS_DC_DC,
1256                           DSP_SPOS_DC,DSP_SPOS_DC },
1257
1258                         {
1259                                 NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
1260                                 0,
1261                                 BG_TREE_SCB_ADDR + TCBData,
1262                         },
1263
1264                         {
1265                                 9999,0,
1266                                 0,1,
1267                                 0,SPOSCB_ADDR + HFGFlags,
1268                                 0,0,
1269                                 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1270                         },
1271
1272                         {
1273                                 DSP_SPOS_DC,0,
1274                                 DSP_SPOS_DC,DSP_SPOS_DC,
1275                                 DSP_SPOS_DC,DSP_SPOS_DC,
1276                                 DSP_SPOS_DC,DSP_SPOS_DC,
1277                                 DSP_SPOS_DC,DSP_SPOS_DC,
1278                                 DSP_SPOS_DCDC,
1279                                 DSP_SPOS_UU,1,
1280                                 DSP_SPOS_DCDC,
1281                                 DSP_SPOS_DCDC,
1282                                 DSP_SPOS_DCDC,
1283                                 DSP_SPOS_DCDC,
1284                                 DSP_SPOS_DCDC,
1285                                 DSP_SPOS_DCDC,
1286                                 DSP_SPOS_DCDC,
1287                                 DSP_SPOS_DCDC,
1288                                 DSP_SPOS_DCDC,
1289                                 DSP_SPOS_DCDC,
1290                                 DSP_SPOS_DCDC,
1291                                 DSP_SPOS_DCDC,
1292                                 DSP_SPOS_DCDC,
1293                                 DSP_SPOS_DCDC,
1294                                 DSP_SPOS_DCDC,
1295                                 DSP_SPOS_DCDC,
1296                                 DSP_SPOS_DCDC,
1297                                 DSP_SPOS_DCDC,
1298                                 DSP_SPOS_DCDC,
1299                                 DSP_SPOS_DCDC,
1300                                 DSP_SPOS_DCDC,
1301                                 DSP_SPOS_DCDC,
1302                                 DSP_SPOS_DCDC,
1303                                 DSP_SPOS_DCDC,
1304                                 DSP_SPOS_DCDC,
1305                                 DSP_SPOS_DCDC,
1306                                 DSP_SPOS_DCDC,
1307                                 DSP_SPOS_DCDC
1308                         },
1309                         {
1310                                 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1311                                 0,0
1312                         }
1313                 };
1314
1315                 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1316                 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1317                 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1318         }
1319
1320         /* create timing master SCB */
1321         timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1322
1323         /* create the CODEC output task */
1324         codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1325                                                         MASTERMIX_SCB_ADDR,
1326                                                         CODECOUT_SCB_ADDR,timing_master_scb,
1327                                                         SCB_ON_PARENT_SUBLIST_SCB);
1328
1329         if (!codec_out_scb) goto _fail_end;
1330         /* create the master mix SCB */
1331         master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1332                                                         MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1333                                                         codec_out_scb,
1334                                                         SCB_ON_PARENT_SUBLIST_SCB);
1335         ins->master_mix_scb = master_mix_scb;
1336
1337         if (!master_mix_scb) goto _fail_end;
1338
1339         /* create codec in */
1340         codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1341                                                       CODEC_INPUT_BUF1,
1342                                                       CODECIN_SCB_ADDR,codec_out_scb,
1343                                                       SCB_ON_PARENT_NEXT_SCB);
1344         if (!codec_in_scb) goto _fail_end;
1345         ins->codec_in_scb = codec_in_scb;
1346
1347         /* create write back scb */
1348         write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1349                                                               WRITE_BACK_BUF1,WRITE_BACK_SPB,
1350                                                               WRITEBACK_SCB_ADDR,
1351                                                               timing_master_scb,
1352                                                               SCB_ON_PARENT_NEXT_SCB);
1353         if (!write_back_scb) goto _fail_end;
1354
1355         {
1356                 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1357                         0x00020000,
1358                         0x0000ffff
1359                 };
1360
1361                 if (!cs46xx_dsp_create_task_tree(chip, NULL,
1362                                                  (u32 *)&mix2_ostream_spb,
1363                                                  WRITE_BACK_SPB, 2))
1364                         goto _fail_end;
1365         }
1366
1367         /* input sample converter */
1368         vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1369                                                                 VARI_DECIMATE_BUF0,
1370                                                                 VARI_DECIMATE_BUF1,
1371                                                                 VARIDECIMATE_SCB_ADDR,
1372                                                                 write_back_scb,
1373                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1374         if (!vari_decimate_scb) goto _fail_end;
1375
1376         /* create the record mixer SCB */
1377         record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1378                                                         MIX_SAMPLE_BUF2,
1379                                                         RECORD_MIXER_SCB_ADDR,
1380                                                         vari_decimate_scb,
1381                                                         SCB_ON_PARENT_SUBLIST_SCB);
1382         ins->record_mixer_scb = record_mix_scb;
1383
1384         if (!record_mix_scb) goto _fail_end;
1385
1386         valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1387
1388         if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2))
1389                 goto _fail_end;
1390
1391         if (chip->nr_ac97_codecs == 1) {
1392                 /* output on slot 5 and 11
1393                    on primary CODEC */
1394                 fifo_addr = 0x20;
1395                 fifo_span = 0x60;
1396
1397                 /* enable slot 5 and 11 */
1398                 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1399         } else {
1400                 /* output on slot 7 and 8
1401                    on secondary CODEC */
1402                 fifo_addr = 0x40;
1403                 fifo_span = 0x10;
1404
1405                 /* enable slot 7 and 8 */
1406                 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1407         }
1408         /* create CODEC tasklet for rear speakers output*/
1409         rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1410                                                              REAR_MIXER_SCB_ADDR,
1411                                                              REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1412                                                              SCB_ON_PARENT_NEXT_SCB);
1413         if (!rear_codec_out_scb) goto _fail_end;
1414
1415
1416         /* create the rear PCM channel  mixer SCB */
1417         rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1418                                                       MIX_SAMPLE_BUF3,
1419                                                       REAR_MIXER_SCB_ADDR,
1420                                                       rear_codec_out_scb,
1421                                                       SCB_ON_PARENT_SUBLIST_SCB);
1422         ins->rear_mix_scb = rear_mix_scb;
1423         if (!rear_mix_scb) goto _fail_end;
1424
1425         if (chip->nr_ac97_codecs == 2) {
1426                 /* create CODEC tasklet for rear Center/LFE output
1427                    slot 6 and 9 on seconadry CODEC */
1428                 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1429                                                                      CLFE_MIXER_SCB_ADDR,
1430                                                                      CLFE_CODEC_SCB_ADDR,
1431                                                                      rear_codec_out_scb,
1432                                                                      SCB_ON_PARENT_NEXT_SCB);
1433                 if (!clfe_codec_out_scb) goto _fail_end;
1434
1435
1436                 /* create the rear PCM channel  mixer SCB */
1437                 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1438                                                                          MIX_SAMPLE_BUF4,
1439                                                                          CLFE_MIXER_SCB_ADDR,
1440                                                                          clfe_codec_out_scb,
1441                                                                          SCB_ON_PARENT_SUBLIST_SCB);
1442                 if (!ins->center_lfe_mix_scb) goto _fail_end;
1443
1444                 /* enable slot 6 and 9 */
1445                 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1446         } else {
1447                 clfe_codec_out_scb = rear_codec_out_scb;
1448                 ins->center_lfe_mix_scb = rear_mix_scb;
1449         }
1450
1451         /* enable slots depending on CODEC configuration */
1452         snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1453
1454         /* the magic snooper */
1455         magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1456                                                              OUTPUT_SNOOP_BUFFER,
1457                                                              codec_out_scb,
1458                                                              clfe_codec_out_scb,
1459                                                              SCB_ON_PARENT_NEXT_SCB);
1460
1461
1462         if (!magic_snoop_scb) goto _fail_end;
1463         ins->ref_snoop_scb = magic_snoop_scb;
1464
1465         /* SP IO access */
1466         if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1467                                               magic_snoop_scb,
1468                                               SCB_ON_PARENT_NEXT_SCB))
1469                 goto _fail_end;
1470
1471         /* SPDIF input sampel rate converter */
1472         src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1473                                                       ins->spdif_in_sample_rate,
1474                                                       SRC_OUTPUT_BUF1,
1475                                                       SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1476                                                       master_mix_scb,
1477                                                       SCB_ON_PARENT_SUBLIST_SCB,1);
1478
1479         if (!src_task_scb) goto _fail_end;
1480         cs46xx_src_unlink(chip,src_task_scb);
1481
1482         /* NOTE: when we now how to detect the SPDIF input
1483            sample rate we will use this SRC to adjust it */
1484         ins->spdif_in_src = src_task_scb;
1485
1486         cs46xx_dsp_async_init(chip,timing_master_scb);
1487         return 0;
1488
1489  _fail_end:
1490         snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
1491         return -EINVAL;
1492 }
1493
1494 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1495                                   struct dsp_scb_descriptor * fg_entry)
1496 {
1497         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1498         struct dsp_symbol_entry * s16_async_codec_input_task;
1499         struct dsp_symbol_entry * spdifo_task;
1500         struct dsp_symbol_entry * spdifi_task;
1501         struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1502
1503         s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1504         if (s16_async_codec_input_task == NULL) {
1505                 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1506                 return -EIO;
1507         }
1508         spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1509         if (spdifo_task == NULL) {
1510                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
1511                 return -EIO;
1512         }
1513
1514         spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1515         if (spdifi_task == NULL) {
1516                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
1517                 return -EIO;
1518         }
1519
1520         {
1521                 /* 0xBC0 */
1522                 struct dsp_spdifoscb spdifo_scb = {
1523                         /* 0 */ DSP_SPOS_UUUU,
1524                         {
1525                                 /* 1 */ 0xb0,
1526                                 /* 2 */ 0,
1527                                 /* 3 */ 0,
1528                                 /* 4 */ 0,
1529                         },
1530                         /* NOTE: the SPDIF output task read samples in mono
1531                            format, the AsynchFGTxSCB task writes to buffer
1532                            in stereo format
1533                         */
1534                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1535                         /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
1536                         /* 7 */ 0,0,
1537                         /* 8 */ 0,
1538                         /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1539                         /* A */ spdifo_task->address,
1540                         SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1541                         {
1542                                 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1543                                 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1544                         },
1545                         /* D */ 0x804c,0,                                                         /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1546                         /* E */ 0x0108,0x0001,                                    /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1547                         /* F */ DSP_SPOS_UUUU                                     /* SPDIFOFree; */
1548                 };
1549
1550                 /* 0xBB0 */
1551                 struct dsp_spdifiscb spdifi_scb = {
1552                         /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1553                         /* 1 */ 0,
1554                         /* 2 */ 0,
1555                         /* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */
1556                         /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1557                         /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1558                         /* 6 */ DSP_SPOS_UUUU,  /* Free3 */
1559                         /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
1560                         /* 8 */ DSP_SPOS_UUUU,  /* TempStatus */
1561                         /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1562                         /* A */ spdifi_task->address,
1563                         SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1564                         /* NOTE: The SPDIF input task write the sample in mono
1565                            format from the HW FIFO, the AsynchFGRxSCB task  reads
1566                            them in stereo
1567                         */
1568                         /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1569                         /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1570                         /* D */ 0x8048,0,
1571                         /* E */ 0x01f0,0x0001,
1572                         /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1573                 };
1574
1575                 /* 0xBA0 */
1576                 struct dsp_async_codec_input_scb async_codec_input_scb = {
1577                         /* 0 */ DSP_SPOS_UUUU,
1578                         /* 1 */ 0,
1579                         /* 2 */ 0,
1580                         /* 3 */ 1,4000,
1581                         /* 4 */ 0x0118,0x0001,
1582                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1583                         /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1584                         /* 7 */ DSP_SPOS_UU,0x3,
1585                         /* 8 */ DSP_SPOS_UUUU,
1586                         /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1587                         /* A */ s16_async_codec_input_task->address,
1588                         HFG_TREE_SCB + AsyncCIOFIFOPointer,
1589
1590                         /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1591                         /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1592
1593 #ifdef UseASER1Input
1594                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1595                            Init. 0000:8042: for ASER1
1596                            0000:8044: for ASER2 */
1597                         /* D */ 0x8042,0,
1598
1599                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1600                            Init 1 stero:8050 ASER1
1601                            Init 0  mono:8070 ASER2
1602                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1603                         /* E */ 0x0100,0x0001,
1604
1605 #endif
1606
1607 #ifdef UseASER2Input
1608                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1609                            Init. 0000:8042: for ASER1
1610                            0000:8044: for ASER2 */
1611                         /* D */ 0x8044,0,
1612
1613                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1614                            Init 1 stero:8050 ASER1
1615                            Init 0  mono:8070 ASER2
1616                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1617                         /* E */ 0x0110,0x0001,
1618
1619 #endif
1620
1621                         /* short AsyncCIOutputBufModulo:AsyncCIFree;
1622                            AsyncCIOutputBufModulo: The modulo size for
1623                            the output buffer of this task */
1624                         /* F */ 0, /* DSP_SPOS_UUUU */
1625                 };
1626
1627                 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1628
1629                 if (snd_BUG_ON(!spdifo_scb_desc))
1630                         return -EIO;
1631                 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1632                 if (snd_BUG_ON(!spdifi_scb_desc))
1633                         return -EIO;
1634                 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1635                 if (snd_BUG_ON(!async_codec_scb_desc))
1636                         return -EIO;
1637
1638                 async_codec_scb_desc->parent_scb_ptr = NULL;
1639                 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1640                 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1641                 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1642
1643                 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1644                 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1645                 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1646                 spdifi_scb_desc->task_entry = spdifi_task;
1647
1648                 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1649                 spdifo_scb_desc->next_scb_ptr = fg_entry;
1650                 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1651                 spdifo_scb_desc->task_entry = spdifo_task;
1652
1653                 /* this one is faked, as the parnet of SPDIFO task
1654                    is the FG task tree */
1655                 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1656
1657                 /* for proc fs */
1658                 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1659                 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1660                 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1661
1662                 /* Async MASTER ENABLE, affects both SPDIF input and output */
1663                 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1664         }
1665
1666         return 0;
1667 }
1668
1669 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1670 {
1671         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1672
1673         /* set SPDIF output FIFO slot */
1674         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1675
1676         /* SPDIF output MASTER ENABLE */
1677         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1678
1679         /* right and left validate bit */
1680         /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1681         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1682
1683         /* clear fifo pointer */
1684         cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1685
1686         /* monitor state */
1687         ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1688 }
1689
1690 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1691 {
1692         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1693
1694         /* if hw-ctrl already enabled, turn off to reset logic ... */
1695         cs46xx_dsp_disable_spdif_hw (chip);
1696         udelay(50);
1697
1698         /* set SPDIF output FIFO slot */
1699         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1700
1701         /* SPDIF output MASTER ENABLE */
1702         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1703
1704         /* right and left validate bit */
1705         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1706
1707         /* monitor state */
1708         ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1709
1710         return 0;
1711 }
1712
1713 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1714 {
1715         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1716
1717         /* turn on amplifier */
1718         chip->active_ctrl(chip, 1);
1719         chip->amplifier_ctrl(chip, 1);
1720
1721         if (snd_BUG_ON(ins->asynch_rx_scb))
1722                 return -EINVAL;
1723         if (snd_BUG_ON(!ins->spdif_in_src))
1724                 return -EINVAL;
1725
1726         mutex_lock(&chip->spos_mutex);
1727
1728         if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1729                 /* time countdown enable */
1730                 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1731                 /* NOTE: 80000005 value is just magic. With all values
1732                    that I've tested this one seem to give the best result.
1733                    Got no explication why. (Benny) */
1734
1735                 /* SPDIF input MASTER ENABLE */
1736                 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1737
1738                 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1739         }
1740
1741         /* create and start the asynchronous receiver SCB */
1742         ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1743                                                                 ASYNCRX_SCB_ADDR,
1744                                                                 SPDIFI_SCB_INST,
1745                                                                 SPDIFI_IP_OUTPUT_BUFFER1,
1746                                                                 ins->spdif_in_src,
1747                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1748
1749         spin_lock_irq(&chip->reg_lock);
1750
1751         /* reset SPDIF input sample buffer pointer */
1752         /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1753           (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1754
1755         /* reset FIFO ptr */
1756         /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1757         cs46xx_src_link(chip,ins->spdif_in_src);
1758
1759         /* unmute SRC volume */
1760         cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1761
1762         spin_unlock_irq(&chip->reg_lock);
1763
1764         /* set SPDIF input sample rate and unmute
1765            NOTE: only 48khz support for SPDIF input this time */
1766         /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1767
1768         /* monitor state */
1769         ins->spdif_status_in = 1;
1770         mutex_unlock(&chip->spos_mutex);
1771
1772         return 0;
1773 }
1774
1775 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1776 {
1777         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1778
1779         if (snd_BUG_ON(!ins->asynch_rx_scb))
1780                 return -EINVAL;
1781         if (snd_BUG_ON(!ins->spdif_in_src))
1782                 return -EINVAL;
1783
1784         mutex_lock(&chip->spos_mutex);
1785
1786         /* Remove the asynchronous receiver SCB */
1787         cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1788         ins->asynch_rx_scb = NULL;
1789
1790         cs46xx_src_unlink(chip,ins->spdif_in_src);
1791
1792         /* monitor state */
1793         ins->spdif_status_in = 0;
1794         mutex_unlock(&chip->spos_mutex);
1795
1796         /* restore amplifier */
1797         chip->active_ctrl(chip, -1);
1798         chip->amplifier_ctrl(chip, -1);
1799
1800         return 0;
1801 }
1802
1803 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1804 {
1805         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1806
1807         if (snd_BUG_ON(ins->pcm_input))
1808                 return -EINVAL;
1809         if (snd_BUG_ON(!ins->ref_snoop_scb))
1810                 return -EINVAL;
1811
1812         mutex_lock(&chip->spos_mutex);
1813         ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1814                                                   "PCMSerialInput_Wave");
1815         mutex_unlock(&chip->spos_mutex);
1816
1817         return 0;
1818 }
1819
1820 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1821 {
1822         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1823
1824         if (snd_BUG_ON(!ins->pcm_input))
1825                 return -EINVAL;
1826
1827         mutex_lock(&chip->spos_mutex);
1828         cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1829         ins->pcm_input = NULL;
1830         mutex_unlock(&chip->spos_mutex);
1831
1832         return 0;
1833 }
1834
1835 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1836 {
1837         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1838
1839         if (snd_BUG_ON(ins->adc_input))
1840                 return -EINVAL;
1841         if (snd_BUG_ON(!ins->codec_in_scb))
1842                 return -EINVAL;
1843
1844         mutex_lock(&chip->spos_mutex);
1845         ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1846                                                   "PCMSerialInput_ADC");
1847         mutex_unlock(&chip->spos_mutex);
1848
1849         return 0;
1850 }
1851
1852 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1853 {
1854         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1855
1856         if (snd_BUG_ON(!ins->adc_input))
1857                 return -EINVAL;
1858
1859         mutex_lock(&chip->spos_mutex);
1860         cs46xx_dsp_remove_scb (chip,ins->adc_input);
1861         ins->adc_input = NULL;
1862         mutex_unlock(&chip->spos_mutex);
1863
1864         return 0;
1865 }
1866
1867 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1868 {
1869         u32 temp;
1870         int  i;
1871
1872         /* santiy check the parameters.  (These numbers are not 100% correct.  They are
1873            a rough guess from looking at the controller spec.) */
1874         if (address < 0x8000 || address >= 0x9000)
1875                 return -EINVAL;
1876
1877         /* initialize the SP_IO_WRITE SCB with the data. */
1878         temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
1879
1880         snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
1881         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1882         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1883
1884         /* Poke this location to tell the task to start */
1885         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1886
1887         /* Verify that the task ran */
1888         for (i=0; i<25; i++) {
1889                 udelay(125);
1890
1891                 temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1892                 if (temp == 0x00000000)
1893                         break;
1894         }
1895
1896         if (i == 25) {
1897                 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
1898                 return -EBUSY;
1899         }
1900
1901         return 0;
1902 }
1903
1904 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1905 {
1906         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1907         struct dsp_scb_descriptor * scb;
1908
1909         mutex_lock(&chip->spos_mutex);
1910
1911         /* main output */
1912         scb = ins->master_mix_scb->sub_list_ptr;
1913         while (scb != ins->the_null_scb) {
1914                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1915                 scb = scb->next_scb_ptr;
1916         }
1917
1918         /* rear output */
1919         scb = ins->rear_mix_scb->sub_list_ptr;
1920         while (scb != ins->the_null_scb) {
1921                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1922                 scb = scb->next_scb_ptr;
1923         }
1924
1925         ins->dac_volume_left = left;
1926         ins->dac_volume_right = right;
1927
1928         mutex_unlock(&chip->spos_mutex);
1929
1930         return 0;
1931 }
1932
1933 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1934 {
1935         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1936
1937         mutex_lock(&chip->spos_mutex);
1938
1939         if (ins->asynch_rx_scb != NULL)
1940                 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1941                                            left,right);
1942
1943         ins->spdif_input_volume_left = left;
1944         ins->spdif_input_volume_right = right;
1945
1946         mutex_unlock(&chip->spos_mutex);
1947
1948         return 0;
1949 }
1950
1951 #ifdef CONFIG_PM
1952 int cs46xx_dsp_resume(struct snd_cs46xx * chip)
1953 {
1954         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1955         int i, err;
1956
1957         /* clear parameter, sample and code areas */
1958         snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET,
1959                              DSP_PARAMETER_BYTE_SIZE);
1960         snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET,
1961                              DSP_SAMPLE_BYTE_SIZE);
1962         snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
1963
1964         for (i = 0; i < ins->nmodules; i++) {
1965                 struct dsp_module_desc *module = &ins->modules[i];
1966                 struct dsp_segment_desc *seg;
1967                 u32 doffset, dsize;
1968
1969                 seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER);
1970                 err = dsp_load_parameter(chip, seg);
1971                 if (err < 0)
1972                         return err;
1973
1974                 seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE);
1975                 err = dsp_load_sample(chip, seg);
1976                 if (err < 0)
1977                         return err;
1978
1979                 seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM);
1980                 if (!seg)
1981                         continue;
1982
1983                 doffset = seg->offset * 4 + module->load_address * 4
1984                         + DSP_CODE_BYTE_OFFSET;
1985                 dsize   = seg->size * 4;
1986                 err = snd_cs46xx_download(chip,
1987                                           ins->code.data + module->load_address,
1988                                           doffset, dsize);
1989                 if (err < 0)
1990                         return err;
1991         }
1992
1993         for (i = 0; i < ins->ntask; i++) {
1994                 struct dsp_task_descriptor *t = &ins->tasks[i];
1995                 _dsp_create_task_tree(chip, t->data, t->address, t->size);
1996         }
1997
1998         for (i = 0; i < ins->nscb; i++) {
1999                 struct dsp_scb_descriptor *s = &ins->scbs[i];
2000                 if (s->deleted)
2001                         continue;
2002                 _dsp_create_scb(chip, s->data, s->address);
2003         }
2004         for (i = 0; i < ins->nscb; i++) {
2005                 struct dsp_scb_descriptor *s = &ins->scbs[i];
2006                 if (s->deleted)
2007                         continue;
2008                 if (s->updated)
2009                         cs46xx_dsp_spos_update_scb(chip, s);
2010                 if (s->volume_set)
2011                         cs46xx_dsp_scb_set_volume(chip, s,
2012                                                   s->volume[0], s->volume[1]);
2013         }
2014         if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) {
2015                 cs46xx_dsp_enable_spdif_hw(chip);
2016                 snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2,
2017                                 (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10);
2018                 if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN)
2019                         cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV,
2020                                             ins->spdif_csuv_stream);
2021         }
2022         if (chip->dsp_spos_instance->spdif_status_in) {
2023                 cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005);
2024                 cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff);
2025         }
2026         return 0;
2027 }
2028 #endif