sound/oss/ymfpci.h

   1 #ifndef __YMFPCI_H
   2 #define __YMFPCI_H
   3
   4 /*
   5  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   6  *  Definitions for Yahama YMF724/740/744/754 chips
   7  *
   8  *
   9  *   This program is free software; you can redistribute it and/or modify
  10  *   it under the terms of the GNU General Public License as published by
  11  *   the Free Software Foundation; either version 2 of the License, or
  12  *   (at your option) any later version.
  13  *
  14  *   This program is distributed in the hope that it will be useful,
  15  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *   GNU General Public License for more details.
  18  *
  19  *   You should have received a copy of the GNU General Public License
  20  *   along with this program; if not, write to the Free Software
  21  *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  */
  24 #include <linux/mutex.h>
  25
  26 /*
  27  *  Direct registers
  28  */
  29
  30 /* #define YMFREG(codec, reg)           (codec->port + YDSXGR_##reg) */
  31
  32 #define YDSXGR_INTFLAG                  0x0004
  33 #define YDSXGR_ACTIVITY                 0x0006
  34 #define YDSXGR_GLOBALCTRL               0x0008
  35 #define YDSXGR_ZVCTRL                   0x000A
  36 #define YDSXGR_TIMERCTRL                0x0010
  37 #define YDSXGR_TIMERCTRL_TEN             0x0001
  38 #define YDSXGR_TIMERCTRL_TIEN            0x0002
  39 #define YDSXGR_TIMERCOUNT               0x0012
  40 #define YDSXGR_SPDIFOUTCTRL             0x0018
  41 #define YDSXGR_SPDIFOUTSTATUS           0x001C
  42 #define YDSXGR_EEPROMCTRL               0x0020
  43 #define YDSXGR_SPDIFINCTRL              0x0034
  44 #define YDSXGR_SPDIFINSTATUS            0x0038
  45 #define YDSXGR_DSPPROGRAMDL             0x0048
  46 #define YDSXGR_DLCNTRL                  0x004C
  47 #define YDSXGR_GPIOININTFLAG            0x0050
  48 #define YDSXGR_GPIOININTENABLE          0x0052
  49 #define YDSXGR_GPIOINSTATUS             0x0054
  50 #define YDSXGR_GPIOOUTCTRL              0x0056
  51 #define YDSXGR_GPIOFUNCENABLE           0x0058
  52 #define YDSXGR_GPIOTYPECONFIG           0x005A
  53 #define YDSXGR_AC97CMDDATA              0x0060
  54 #define YDSXGR_AC97CMDADR               0x0062
  55 #define YDSXGR_PRISTATUSDATA            0x0064
  56 #define YDSXGR_PRISTATUSADR             0x0066
  57 #define YDSXGR_SECSTATUSDATA            0x0068
  58 #define YDSXGR_SECSTATUSADR             0x006A
  59 #define YDSXGR_SECCONFIG                0x0070
  60 #define YDSXGR_LEGACYOUTVOL             0x0080
  61 #define YDSXGR_LEGACYOUTVOLL            0x0080
  62 #define YDSXGR_LEGACYOUTVOLR            0x0082
  63 #define YDSXGR_NATIVEDACOUTVOL          0x0084
  64 #define YDSXGR_NATIVEDACOUTVOLL         0x0084
  65 #define YDSXGR_NATIVEDACOUTVOLR         0x0086
  66 #define YDSXGR_SPDIFOUTVOL              0x0088
  67 #define YDSXGR_SPDIFOUTVOLL             0x0088
  68 #define YDSXGR_SPDIFOUTVOLR             0x008A
  69 #define YDSXGR_AC3OUTVOL                0x008C
  70 #define YDSXGR_AC3OUTVOLL               0x008C
  71 #define YDSXGR_AC3OUTVOLR               0x008E
  72 #define YDSXGR_PRIADCOUTVOL             0x0090
  73 #define YDSXGR_PRIADCOUTVOLL            0x0090
  74 #define YDSXGR_PRIADCOUTVOLR            0x0092
  75 #define YDSXGR_LEGACYLOOPVOL            0x0094
  76 #define YDSXGR_LEGACYLOOPVOLL           0x0094
  77 #define YDSXGR_LEGACYLOOPVOLR           0x0096
  78 #define YDSXGR_NATIVEDACLOOPVOL         0x0098
  79 #define YDSXGR_NATIVEDACLOOPVOLL        0x0098
  80 #define YDSXGR_NATIVEDACLOOPVOLR        0x009A
  81 #define YDSXGR_SPDIFLOOPVOL             0x009C
  82 #define YDSXGR_SPDIFLOOPVOLL            0x009E
  83 #define YDSXGR_SPDIFLOOPVOLR            0x009E
  84 #define YDSXGR_AC3LOOPVOL               0x00A0
  85 #define YDSXGR_AC3LOOPVOLL              0x00A0
  86 #define YDSXGR_AC3LOOPVOLR              0x00A2
  87 #define YDSXGR_PRIADCLOOPVOL            0x00A4
  88 #define YDSXGR_PRIADCLOOPVOLL           0x00A4
  89 #define YDSXGR_PRIADCLOOPVOLR           0x00A6
  90 #define YDSXGR_NATIVEADCINVOL           0x00A8
  91 #define YDSXGR_NATIVEADCINVOLL          0x00A8
  92 #define YDSXGR_NATIVEADCINVOLR          0x00AA
  93 #define YDSXGR_NATIVEDACINVOL           0x00AC
  94 #define YDSXGR_NATIVEDACINVOLL          0x00AC
  95 #define YDSXGR_NATIVEDACINVOLR          0x00AE
  96 #define YDSXGR_BUF441OUTVOL             0x00B0
  97 #define YDSXGR_BUF441OUTVOLL            0x00B0
  98 #define YDSXGR_BUF441OUTVOLR            0x00B2
  99 #define YDSXGR_BUF441LOOPVOL            0x00B4
 100 #define YDSXGR_BUF441LOOPVOLL           0x00B4
 101 #define YDSXGR_BUF441LOOPVOLR           0x00B6
 102 #define YDSXGR_SPDIFOUTVOL2             0x00B8
 103 #define YDSXGR_SPDIFOUTVOL2L            0x00B8
 104 #define YDSXGR_SPDIFOUTVOL2R            0x00BA
 105 #define YDSXGR_SPDIFLOOPVOL2            0x00BC
 106 #define YDSXGR_SPDIFLOOPVOL2L           0x00BC
 107 #define YDSXGR_SPDIFLOOPVOL2R           0x00BE
 108 #define YDSXGR_ADCSLOTSR                0x00C0
 109 #define YDSXGR_RECSLOTSR                0x00C4
 110 #define YDSXGR_ADCFORMAT                0x00C8
 111 #define YDSXGR_RECFORMAT                0x00CC
 112 #define YDSXGR_P44SLOTSR                0x00D0
 113 #define YDSXGR_STATUS                   0x0100
 114 #define YDSXGR_CTRLSELECT               0x0104
 115 #define YDSXGR_MODE                     0x0108
 116 #define YDSXGR_SAMPLECOUNT              0x010C
 117 #define YDSXGR_NUMOFSAMPLES             0x0110
 118 #define YDSXGR_CONFIG                   0x0114
 119 #define YDSXGR_PLAYCTRLSIZE             0x0140
 120 #define YDSXGR_RECCTRLSIZE              0x0144
 121 #define YDSXGR_EFFCTRLSIZE              0x0148
 122 #define YDSXGR_WORKSIZE                 0x014C
 123 #define YDSXGR_MAPOFREC                 0x0150
 124 #define YDSXGR_MAPOFEFFECT              0x0154
 125 #define YDSXGR_PLAYCTRLBASE             0x0158
 126 #define YDSXGR_RECCTRLBASE              0x015C
 127 #define YDSXGR_EFFCTRLBASE              0x0160
 128 #define YDSXGR_WORKBASE                 0x0164
 129 #define YDSXGR_DSPINSTRAM               0x1000
 130 #define YDSXGR_CTRLINSTRAM              0x4000
 131
 132 #define YDSXG_AC97READCMD               0x8000
 133 #define YDSXG_AC97WRITECMD              0x0000
 134
 135 #define PCIR_LEGCTRL                    0x40
 136 #define PCIR_ELEGCTRL                   0x42
 137 #define PCIR_DSXGCTRL                   0x48
 138 #define PCIR_DSXPWRCTRL1                0x4a
 139 #define PCIR_DSXPWRCTRL2                0x4e
 140 #define PCIR_OPLADR                     0x60
 141 #define PCIR_SBADR                      0x62
 142 #define PCIR_MPUADR                     0x64
 143
 144 #define YDSXG_DSPLENGTH                 0x0080
 145 #define YDSXG_CTRLLENGTH                0x3000
 146
 147 #define YDSXG_DEFAULT_WORK_SIZE         0x0400
 148
 149 #define YDSXG_PLAYBACK_VOICES           64
 150 #define YDSXG_CAPTURE_VOICES            2
 151 #define YDSXG_EFFECT_VOICES             5
 152
 153 /* maxinum number of AC97 codecs connected, AC97 2.0 defined 4 */
 154 #define NR_AC97         2
 155
 156 #define YMF_SAMPF                       256     /* Samples per frame @48000 */
 157
 158 /*
 159  * The slot/voice control bank (2 of these per voice)
 160  */
 161
 162 typedef struct stru_ymfpci_playback_bank {
 163         u32 format;
 164         u32 loop_default;
 165         u32 base;                       /* 32-bit address */
 166         u32 loop_start;                 /* 32-bit offset */
 167         u32 loop_end;                   /* 32-bit offset */
 168         u32 loop_frac;                  /* 8-bit fraction - loop_start */
 169         u32 delta_end;                  /* pitch delta end */
 170         u32 lpfK_end;
 171         u32 eg_gain_end;
 172         u32 left_gain_end;
 173         u32 right_gain_end;
 174         u32 eff1_gain_end;
 175         u32 eff2_gain_end;
 176         u32 eff3_gain_end;
 177         u32 lpfQ;
 178         u32 status;             /* P3: Always 0 for some reason. */
 179         u32 num_of_frames;
 180         u32 loop_count;
 181         u32 start;              /* P3: J. reads this to know where chip is. */
 182         u32 start_frac;
 183         u32 delta;
 184         u32 lpfK;
 185         u32 eg_gain;
 186         u32 left_gain;
 187         u32 right_gain;
 188         u32 eff1_gain;
 189         u32 eff2_gain;
 190         u32 eff3_gain;
 191         u32 lpfD1;
 192         u32 lpfD2;
 193 } ymfpci_playback_bank_t;
 194
 195 typedef struct stru_ymfpci_capture_bank {
 196         u32 base;                       /* 32-bit address (aligned at 4) */
 197         u32 loop_end;                   /* size in BYTES (aligned at 4) */
 198         u32 start;                      /* 32-bit offset */
 199         u32 num_of_loops;               /* counter */
 200 } ymfpci_capture_bank_t;
 201
 202 typedef struct stru_ymfpci_effect_bank {
 203         u32 base;                       /* 32-bit address */
 204         u32 loop_end;                   /* 32-bit offset */
 205         u32 start;                      /* 32-bit offset */
 206         u32 temp;
 207 } ymfpci_effect_bank_t;
 208
 209 typedef struct ymf_voice ymfpci_voice_t;
 210 /*
 211  * Throughout the code Yaroslav names YMF unit pointer "codec"
 212  * even though it does not correspond to any codec. Must be historic.
 213  * We replace it with "unit" over time.
 214  * AC97 parts use "codec" to denote a codec, naturally.
 215  */
 216 typedef struct ymf_unit ymfpci_t;
 217
 218 typedef enum {
 219         YMFPCI_PCM,
 220         YMFPCI_SYNTH,
 221         YMFPCI_MIDI
 222 } ymfpci_voice_type_t;
 223
 224 struct ymf_voice {
 225         // ymfpci_t *codec;
 226         int number;
 227         char use, pcm, synth, midi;     // bool
 228         ymfpci_playback_bank_t *bank;
 229         struct ymf_pcm *ypcm;
 230         dma_addr_t bank_ba;
 231 };
 232
 233 struct ymf_capture {
 234         // struct ymf_unit *unit;
 235         int use;
 236         ymfpci_capture_bank_t *bank;
 237         struct ymf_pcm *ypcm;
 238 };
 239
 240 struct ymf_unit {
 241         u8 rev;                         /* PCI revision */
 242         void __iomem *reg_area_virt;
 243         void *dma_area_va;
 244         dma_addr_t dma_area_ba;
 245         unsigned int dma_area_size;
 246
 247         dma_addr_t bank_base_capture;
 248         dma_addr_t bank_base_effect;
 249         dma_addr_t work_base;
 250         unsigned int work_size;
 251
 252         u32 *ctrl_playback;
 253         dma_addr_t ctrl_playback_ba;
 254         ymfpci_playback_bank_t *bank_playback[YDSXG_PLAYBACK_VOICES][2];
 255         ymfpci_capture_bank_t *bank_capture[YDSXG_CAPTURE_VOICES][2];
 256         ymfpci_effect_bank_t *bank_effect[YDSXG_EFFECT_VOICES][2];
 257
 258         int start_count;
 259         int suspended;
 260
 261         u32 active_bank;
 262         struct ymf_voice voices[YDSXG_PLAYBACK_VOICES];
 263         struct ymf_capture capture[YDSXG_CAPTURE_VOICES];
 264
 265         struct ac97_codec *ac97_codec[NR_AC97];
 266         u16 ac97_features;
 267
 268         struct pci_dev *pci;
 269
 270 #ifdef CONFIG_SOUND_YMFPCI_LEGACY
 271         /* legacy hardware resources */
 272         unsigned int iosynth, iomidi;
 273         struct address_info opl3_data, mpu_data;
 274 #endif
 275
 276         spinlock_t reg_lock;
 277         spinlock_t voice_lock;
 278         spinlock_t ac97_lock;
 279
 280         /* soundcore stuff */
 281         int dev_audio;
 282         struct mutex open_mutex;
 283
 284         struct list_head ymf_devs;
 285         struct list_head states;        /* List of states for this unit */
 286 };
 287
 288 struct ymf_dmabuf {
 289         dma_addr_t dma_addr;
 290         void *rawbuf;
 291         unsigned buforder;
 292
 293         /* OSS buffer management stuff */
 294         unsigned numfrag;
 295         unsigned fragshift;
 296
 297         /* our buffer acts like a circular ring */
 298         unsigned hwptr;         /* where dma last started */
 299         unsigned swptr;         /* where driver last clear/filled */
 300         int count;              /* fill count */
 301         unsigned total_bytes;   /* total bytes dmaed by hardware */
 302
 303         wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
 304
 305         /* redundant, but makes calculations easier */
 306         unsigned fragsize;
 307         unsigned dmasize;       /* Total rawbuf[] size */
 308
 309         /* OSS stuff */
 310         unsigned mapped:1;
 311         unsigned ready:1;
 312         unsigned ossfragshift;
 313         int ossmaxfrags;
 314         unsigned subdivision;
 315 };
 316
 317 struct ymf_pcm_format {
 318         int format;                     /* OSS format */
 319         int rate;                       /* rate in Hz */
 320         int voices;                     /* number of voices */
 321         int shift;                      /* redundant, computed from the above */
 322 };
 323
 324 typedef enum {
 325         PLAYBACK_VOICE,
 326         CAPTURE_REC,
 327         CAPTURE_AC97,
 328         EFFECT_DRY_LEFT,
 329         EFFECT_DRY_RIGHT,
 330         EFFECT_EFF1,
 331         EFFECT_EFF2,
 332         EFFECT_EFF3
 333 } ymfpci_pcm_type_t;
 334
 335 /* This is variant record, but we hate unions. Little waste on pointers []. */
 336 struct ymf_pcm {
 337         ymfpci_pcm_type_t type;
 338         struct ymf_state *state;
 339
 340         ymfpci_voice_t *voices[2];
 341         int capture_bank_number;
 342
 343         struct ymf_dmabuf dmabuf;
 344         int running;
 345         int spdif;
 346 };
 347
 348 /*
 349  * "Software" or virtual channel, an instance of opened /dev/dsp.
 350  * It may have two physical channels (pcms) for duplex operations.
 351  */
 352
 353 struct ymf_state {
 354         struct list_head chain;
 355         struct ymf_unit *unit;                  /* backpointer */
 356         struct ymf_pcm rpcm, wpcm;
 357         struct ymf_pcm_format format;
 358 };
 359
 360 #endif                          /* __YMFPCI_H */