x86: MMIO and gcc re-ordering issue
[pandora-kernel.git] / include / asm-x86 / io_32.h
1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
3
4 #include <linux/string.h>
5 #include <linux/compiler.h>
6
7 /*
8  * This file contains the definitions for the x86 IO instructions
9  * inb/inw/inl/outb/outw/outl and the "string versions" of the same
10  * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
11  * versions of the single-IO instructions (inb_p/inw_p/..).
12  *
13  * This file is not meant to be obfuscating: it's just complicated
14  * to (a) handle it all in a way that makes gcc able to optimize it
15  * as well as possible and (b) trying to avoid writing the same thing
16  * over and over again with slight variations and possibly making a
17  * mistake somewhere.
18  */
19
20 /*
21  * Thanks to James van Artsdalen for a better timing-fix than
22  * the two short jumps: using outb's to a nonexistent port seems
23  * to guarantee better timings even on fast machines.
24  *
25  * On the other hand, I'd like to be sure of a non-existent port:
26  * I feel a bit unsafe about using 0x80 (should be safe, though)
27  *
28  *              Linus
29  */
30
31  /*
32   *  Bit simplified and optimized by Jan Hubicka
33   *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
34   *
35   *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
36   *  isa_read[wl] and isa_write[wl] fixed
37   *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
38   */
39
40 #define IO_SPACE_LIMIT 0xffff
41
42 #define XQUAD_PORTIO_BASE 0xfe400000
43 #define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */
44
45 #ifdef __KERNEL__
46
47 #include <asm-generic/iomap.h>
48
49 #include <linux/vmalloc.h>
50
51 /*
52  * Convert a virtual cached pointer to an uncached pointer
53  */
54 #define xlate_dev_kmem_ptr(p)   p
55
56 /**
57  *      virt_to_phys    -       map virtual addresses to physical
58  *      @address: address to remap
59  *
60  *      The returned physical address is the physical (CPU) mapping for
61  *      the memory address given. It is only valid to use this function on
62  *      addresses directly mapped or allocated via kmalloc.
63  *
64  *      This function does not give bus mappings for DMA transfers. In
65  *      almost all conceivable cases a device driver should not be using
66  *      this function
67  */
68
69 static inline unsigned long virt_to_phys(volatile void *address)
70 {
71         return __pa(address);
72 }
73
74 /**
75  *      phys_to_virt    -       map physical address to virtual
76  *      @address: address to remap
77  *
78  *      The returned virtual address is a current CPU mapping for
79  *      the memory address given. It is only valid to use this function on
80  *      addresses that have a kernel mapping
81  *
82  *      This function does not handle bus mappings for DMA transfers. In
83  *      almost all conceivable cases a device driver should not be using
84  *      this function
85  */
86
87 static inline void *phys_to_virt(unsigned long address)
88 {
89         return __va(address);
90 }
91
92 /*
93  * Change "struct page" to physical address.
94  */
95 #define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
96
97 /**
98  * ioremap     -   map bus memory into CPU space
99  * @offset:    bus address of the memory
100  * @size:      size of the resource to map
101  *
102  * ioremap performs a platform specific sequence of operations to
103  * make bus memory CPU accessible via the readb/readw/readl/writeb/
104  * writew/writel functions and the other mmio helpers. The returned
105  * address is not guaranteed to be usable directly as a virtual
106  * address.
107  *
108  * If the area you are trying to map is a PCI BAR you should have a
109  * look at pci_iomap().
110  */
111 extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
112 extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
113
114 /*
115  * The default ioremap() behavior is non-cached:
116  */
117 static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
118 {
119         return ioremap_nocache(offset, size);
120 }
121
122 extern void iounmap(volatile void __iomem *addr);
123
124 /*
125  * early_ioremap() and early_iounmap() are for temporary early boot-time
126  * mappings, before the real ioremap() is functional.
127  * A boot-time mapping is currently limited to at most 16 pages.
128  */
129 extern void early_ioremap_init(void);
130 extern void early_ioremap_clear(void);
131 extern void early_ioremap_reset(void);
132 extern void *early_ioremap(unsigned long offset, unsigned long size);
133 extern void early_iounmap(void *addr, unsigned long size);
134 extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
135
136 /*
137  * ISA I/O bus memory addresses are 1:1 with the physical address.
138  */
139 #define isa_virt_to_bus virt_to_phys
140 #define isa_page_to_bus page_to_phys
141 #define isa_bus_to_virt phys_to_virt
142
143 /*
144  * However PCI ones are not necessarily 1:1 and therefore these interfaces
145  * are forbidden in portable PCI drivers.
146  *
147  * Allow them on x86 for legacy drivers, though.
148  */
149 #define virt_to_bus virt_to_phys
150 #define bus_to_virt phys_to_virt
151
152 static inline void
153 memset_io(volatile void __iomem *addr, unsigned char val, int count)
154 {
155         memset((void __force *)addr, val, count);
156 }
157
158 static inline void
159 memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
160 {
161         __memcpy(dst, (const void __force *)src, count);
162 }
163
164 static inline void
165 memcpy_toio(volatile void __iomem *dst, const void *src, int count)
166 {
167         __memcpy((void __force *)dst, src, count);
168 }
169
170 /*
171  * ISA space is 'always mapped' on a typical x86 system, no need to
172  * explicitly ioremap() it. The fact that the ISA IO space is mapped
173  * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
174  * are physical addresses. The following constant pointer can be
175  * used as the IO-area pointer (it can be iounmapped as well, so the
176  * analogy with PCI is quite large):
177  */
178 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
179
180 /*
181  *      Cache management
182  *
183  *      This needed for two cases
184  *      1. Out of order aware processors
185  *      2. Accidentally out of order processors (PPro errata #51)
186  */
187
188 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
189
190 static inline void flush_write_buffers(void)
191 {
192         asm volatile("lock; addl $0,0(%%esp)": : :"memory");
193 }
194
195 #else
196
197 #define flush_write_buffers() do { } while (0)
198
199 #endif
200
201 #endif /* __KERNEL__ */
202
203 extern void native_io_delay(void);
204
205 extern int io_delay_type;
206 extern void io_delay_init(void);
207
208 #if defined(CONFIG_PARAVIRT)
209 #include <asm/paravirt.h>
210 #else
211
212 static inline void slow_down_io(void)
213 {
214         native_io_delay();
215 #ifdef REALLY_SLOW_IO
216         native_io_delay();
217         native_io_delay();
218         native_io_delay();
219 #endif
220 }
221
222 #endif
223
224 #define __BUILDIO(bwl, bw, type)                                \
225 static inline void out##bwl(unsigned type value, int port)      \
226 {                                                               \
227         out##bwl##_local(value, port);                          \
228 }                                                               \
229                                                                 \
230 static inline unsigned type in##bwl(int port)                   \
231 {                                                               \
232         return in##bwl##_local(port);                           \
233 }
234
235 #define BUILDIO(bwl, bw, type)                                          \
236 static inline void out##bwl##_local(unsigned type value, int port)      \
237 {                                                                       \
238         asm volatile("out" #bwl " %" #bw "0, %w1"               \
239                      : : "a"(value), "Nd"(port));                       \
240 }                                                                       \
241                                                                         \
242 static inline unsigned type in##bwl##_local(int port)                   \
243 {                                                                       \
244         unsigned type value;                                            \
245         asm volatile("in" #bwl " %w1, %" #bw "0"                \
246                      : "=a"(value) : "Nd"(port));                       \
247         return value;                                                   \
248 }                                                                       \
249                                                                         \
250 static inline void out##bwl##_local_p(unsigned type value, int port)    \
251 {                                                                       \
252         out##bwl##_local(value, port);                                  \
253         slow_down_io();                                                 \
254 }                                                                       \
255                                                                         \
256 static inline unsigned type in##bwl##_local_p(int port)                 \
257 {                                                                       \
258         unsigned type value = in##bwl##_local(port);                    \
259         slow_down_io();                                                 \
260         return value;                                                   \
261 }                                                                       \
262                                                                         \
263 __BUILDIO(bwl, bw, type)                                                \
264                                                                         \
265 static inline void out##bwl##_p(unsigned type value, int port)          \
266 {                                                                       \
267         out##bwl(value, port);                                          \
268         slow_down_io();                                                 \
269 }                                                                       \
270                                                                         \
271 static inline unsigned type in##bwl##_p(int port)                       \
272 {                                                                       \
273         unsigned type value = in##bwl(port);                            \
274         slow_down_io();                                                 \
275         return value;                                                   \
276 }                                                                       \
277                                                                         \
278 static inline void outs##bwl(int port, const void *addr, unsigned long count) \
279 {                                                                       \
280         asm volatile("rep; outs" #bwl                                   \
281                      : "+S"(addr), "+c"(count) : "d"(port));            \
282 }                                                                       \
283                                                                         \
284 static inline void ins##bwl(int port, void *addr, unsigned long count)  \
285 {                                                                       \
286         asm volatile("rep; ins" #bwl                                    \
287                      : "+D"(addr), "+c"(count) : "d"(port));            \
288 }
289
290 BUILDIO(b, b, char)
291 BUILDIO(w, w, short)
292 BUILDIO(l, , int)
293
294 #endif