include/asm-s390/lowcore.h

   1 /*
   2  *  include/asm-s390/lowcore.h
   3  *
   4  *  S390 version
   5  *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
   6  *    Author(s): Hartmut Penner (hp@de.ibm.com),
   7  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
   8  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
   9  */
  10
  11 #ifndef _ASM_S390_LOWCORE_H
  12 #define _ASM_S390_LOWCORE_H
  13
  14 #ifndef __s390x__
  15 #define __LC_EXT_OLD_PSW                0x018
  16 #define __LC_SVC_OLD_PSW                0x020
  17 #define __LC_PGM_OLD_PSW                0x028
  18 #define __LC_MCK_OLD_PSW                0x030
  19 #define __LC_IO_OLD_PSW                 0x038
  20 #define __LC_EXT_NEW_PSW                0x058
  21 #define __LC_SVC_NEW_PSW                0x060
  22 #define __LC_PGM_NEW_PSW                0x068
  23 #define __LC_MCK_NEW_PSW                0x070
  24 #define __LC_IO_NEW_PSW                 0x078
  25 #else /* !__s390x__ */
  26 #define __LC_EXT_OLD_PSW                0x0130
  27 #define __LC_SVC_OLD_PSW                0x0140
  28 #define __LC_PGM_OLD_PSW                0x0150
  29 #define __LC_MCK_OLD_PSW                0x0160
  30 #define __LC_IO_OLD_PSW                 0x0170
  31 #define __LC_EXT_NEW_PSW                0x01b0
  32 #define __LC_SVC_NEW_PSW                0x01c0
  33 #define __LC_PGM_NEW_PSW                0x01d0
  34 #define __LC_MCK_NEW_PSW                0x01e0
  35 #define __LC_IO_NEW_PSW                 0x01f0
  36 #endif /* !__s390x__ */
  37
  38 #define __LC_EXT_PARAMS                 0x080
  39 #define __LC_CPU_ADDRESS                0x084
  40 #define __LC_EXT_INT_CODE               0x086
  41
  42 #define __LC_SVC_ILC                    0x088
  43 #define __LC_SVC_INT_CODE               0x08A
  44 #define __LC_PGM_ILC                    0x08C
  45 #define __LC_PGM_INT_CODE               0x08E
  46
  47 #define __LC_PER_ATMID                  0x096
  48 #define __LC_PER_ADDRESS                0x098
  49 #define __LC_PER_ACCESS_ID              0x0A1
  50
  51 #define __LC_SUBCHANNEL_ID              0x0B8
  52 #define __LC_SUBCHANNEL_NR              0x0BA
  53 #define __LC_IO_INT_PARM                0x0BC
  54 #define __LC_IO_INT_WORD                0x0C0
  55 #define __LC_MCCK_CODE                  0x0E8
  56
  57 #define __LC_RETURN_PSW                 0x200
  58
  59 #define __LC_SAVE_AREA                  0xC00
  60
  61 #ifndef __s390x__
  62 #define __LC_IRB                        0x208
  63 #define __LC_SYNC_ENTER_TIMER           0x248
  64 #define __LC_ASYNC_ENTER_TIMER          0x250
  65 #define __LC_EXIT_TIMER                 0x258
  66 #define __LC_LAST_UPDATE_TIMER          0x260
  67 #define __LC_USER_TIMER                 0x268
  68 #define __LC_SYSTEM_TIMER               0x270
  69 #define __LC_LAST_UPDATE_CLOCK          0x278
  70 #define __LC_STEAL_CLOCK                0x280
  71 #define __LC_KERNEL_STACK               0xC40
  72 #define __LC_THREAD_INFO                0xC44
  73 #define __LC_ASYNC_STACK                0xC48
  74 #define __LC_KERNEL_ASCE                0xC4C
  75 #define __LC_USER_ASCE                  0xC50
  76 #define __LC_PANIC_STACK                0xC54
  77 #define __LC_CPUID                      0xC60
  78 #define __LC_CPUADDR                    0xC68
  79 #define __LC_IPLDEV                     0xC7C
  80 #define __LC_JIFFY_TIMER                0xC80
  81 #define __LC_CURRENT                    0xC90
  82 #define __LC_INT_CLOCK                  0xC98
  83 #else /* __s390x__ */
  84 #define __LC_IRB                        0x210
  85 #define __LC_SYNC_ENTER_TIMER           0x250
  86 #define __LC_ASYNC_ENTER_TIMER          0x258
  87 #define __LC_EXIT_TIMER                 0x260
  88 #define __LC_LAST_UPDATE_TIMER          0x268
  89 #define __LC_USER_TIMER                 0x270
  90 #define __LC_SYSTEM_TIMER               0x278
  91 #define __LC_LAST_UPDATE_CLOCK          0x280
  92 #define __LC_STEAL_CLOCK                0x288
  93 #define __LC_KERNEL_STACK               0xD40
  94 #define __LC_THREAD_INFO                0xD48
  95 #define __LC_ASYNC_STACK                0xD50
  96 #define __LC_KERNEL_ASCE                0xD58
  97 #define __LC_USER_ASCE                  0xD60
  98 #define __LC_PANIC_STACK                0xD68
  99 #define __LC_CPUID                      0xD90
 100 #define __LC_CPUADDR                    0xD98
 101 #define __LC_IPLDEV                     0xDB8
 102 #define __LC_JIFFY_TIMER                0xDC0
 103 #define __LC_CURRENT                    0xDD8
 104 #define __LC_INT_CLOCK                  0xDE8
 105 #endif /* __s390x__ */
 106
 107 #define __LC_PANIC_MAGIC                0xE00
 108
 109 #ifndef __s390x__
 110 #define __LC_PFAULT_INTPARM             0x080
 111 #define __LC_CPU_TIMER_SAVE_AREA        0x0D8
 112 #define __LC_AREGS_SAVE_AREA            0x120
 113 #define __LC_GPREGS_SAVE_AREA           0x180
 114 #define __LC_CREGS_SAVE_AREA            0x1C0
 115 #else /* __s390x__ */
 116 #define __LC_PFAULT_INTPARM             0x11B8
 117 #define __LC_GPREGS_SAVE_AREA           0x1280
 118 #define __LC_CPU_TIMER_SAVE_AREA        0x1328
 119 #define __LC_AREGS_SAVE_AREA            0x1340
 120 #define __LC_CREGS_SAVE_AREA            0x1380
 121 #endif /* __s390x__ */
 122
 123 #ifndef __ASSEMBLY__
 124
 125 #include <linux/config.h>
 126 #include <asm/processor.h>
 127 #include <linux/types.h>
 128 #include <asm/sigp.h>
 129
 130 void restart_int_handler(void);
 131 void ext_int_handler(void);
 132 void system_call(void);
 133 void pgm_check_handler(void);
 134 void mcck_int_handler(void);
 135 void io_int_handler(void);
 136
 137 struct _lowcore
 138 {
 139 #ifndef __s390x__
 140         /* prefix area: defined by architecture */
 141         psw_t        restart_psw;              /* 0x000 */
 142         __u32        ccw2[4];                  /* 0x008 */
 143         psw_t        external_old_psw;         /* 0x018 */
 144         psw_t        svc_old_psw;              /* 0x020 */
 145         psw_t        program_old_psw;          /* 0x028 */
 146         psw_t        mcck_old_psw;             /* 0x030 */
 147         psw_t        io_old_psw;               /* 0x038 */
 148         __u8         pad1[0x58-0x40];          /* 0x040 */
 149         psw_t        external_new_psw;         /* 0x058 */
 150         psw_t        svc_new_psw;              /* 0x060 */
 151         psw_t        program_new_psw;          /* 0x068 */
 152         psw_t        mcck_new_psw;             /* 0x070 */
 153         psw_t        io_new_psw;               /* 0x078 */
 154         __u32        ext_params;               /* 0x080 */
 155         __u16        cpu_addr;                 /* 0x084 */
 156         __u16        ext_int_code;             /* 0x086 */
 157         __u16        svc_ilc;                  /* 0x088 */
 158         __u16        svc_code;                 /* 0x08a */
 159         __u16        pgm_ilc;                  /* 0x08c */
 160         __u16        pgm_code;                 /* 0x08e */
 161         __u32        trans_exc_code;           /* 0x090 */
 162         __u16        mon_class_num;            /* 0x094 */
 163         __u16        per_perc_atmid;           /* 0x096 */
 164         __u32        per_address;              /* 0x098 */
 165         __u32        monitor_code;             /* 0x09c */
 166         __u8         exc_access_id;            /* 0x0a0 */
 167         __u8         per_access_id;            /* 0x0a1 */
 168         __u8         pad2[0xB8-0xA2];          /* 0x0a2 */
 169         __u16        subchannel_id;            /* 0x0b8 */
 170         __u16        subchannel_nr;            /* 0x0ba */
 171         __u32        io_int_parm;              /* 0x0bc */
 172         __u32        io_int_word;              /* 0x0c0 */
 173         __u8         pad3[0xD4-0xC4];          /* 0x0c4 */
 174         __u32        extended_save_area_addr;  /* 0x0d4 */
 175         __u32        cpu_timer_save_area[2];   /* 0x0d8 */
 176         __u32        clock_comp_save_area[2];  /* 0x0e0 */
 177         __u32        mcck_interruption_code[2]; /* 0x0e8 */
 178         __u8         pad4[0xf4-0xf0];          /* 0x0f0 */
 179         __u32        external_damage_code;     /* 0x0f4 */
 180         __u32        failing_storage_address;  /* 0x0f8 */
 181         __u8         pad5[0x100-0xfc];         /* 0x0fc */
 182         __u32        st_status_fixed_logout[4];/* 0x100 */
 183         __u8         pad6[0x120-0x110];        /* 0x110 */
 184         __u32        access_regs_save_area[16];/* 0x120 */
 185         __u32        floating_pt_save_area[8]; /* 0x160 */
 186         __u32        gpregs_save_area[16];     /* 0x180 */
 187         __u32        cregs_save_area[16];      /* 0x1c0 */
 188
 189         psw_t        return_psw;               /* 0x200 */
 190         __u8         irb[64];                  /* 0x208 */
 191         __u64        sync_enter_timer;         /* 0x248 */
 192         __u64        async_enter_timer;        /* 0x250 */
 193         __u64        exit_timer;               /* 0x258 */
 194         __u64        last_update_timer;        /* 0x260 */
 195         __u64        user_timer;               /* 0x268 */
 196         __u64        system_timer;             /* 0x270 */
 197         __u64        last_update_clock;        /* 0x278 */
 198         __u64        steal_clock;              /* 0x280 */
 199         __u8         pad8[0xc00-0x288];        /* 0x288 */
 200
 201         /* System info area */
 202         __u32        save_area[16];            /* 0xc00 */
 203         __u32        kernel_stack;             /* 0xc40 */
 204         __u32        thread_info;              /* 0xc44 */
 205         __u32        async_stack;              /* 0xc48 */
 206         __u32        kernel_asce;              /* 0xc4c */
 207         __u32        user_asce;                /* 0xc50 */
 208         __u32        panic_stack;              /* 0xc54 */
 209         __u8         pad10[0xc60-0xc58];       /* 0xc58 */
 210         /* entry.S sensitive area start */
 211         struct       cpuinfo_S390 cpu_data;    /* 0xc60 */
 212         __u32        ipl_device;               /* 0xc7c */
 213         /* entry.S sensitive area end */
 214
 215         /* SMP info area: defined by DJB */
 216         __u64        jiffy_timer;              /* 0xc80 */
 217         __u32        ext_call_fast;            /* 0xc88 */
 218         __u32        percpu_offset;            /* 0xc8c */
 219         __u32        current_task;             /* 0xc90 */
 220         __u32        softirq_pending;          /* 0xc94 */
 221         __u64        int_clock;                /* 0xc98 */
 222         __u8         pad11[0xe00-0xca0];       /* 0xca0 */
 223
 224         /* 0xe00 is used as indicator for dump tools */
 225         /* whether the kernel died with panic() or not */
 226         __u32        panic_magic;              /* 0xe00 */
 227
 228         /* Align to the top 1k of prefix area */
 229         __u8         pad12[0x1000-0xe04];      /* 0xe04 */
 230 #else /* !__s390x__ */
 231         /* prefix area: defined by architecture */
 232         __u32        ccw1[2];                  /* 0x000 */
 233         __u32        ccw2[4];                  /* 0x008 */
 234         __u8         pad1[0x80-0x18];          /* 0x018 */
 235         __u32        ext_params;               /* 0x080 */
 236         __u16        cpu_addr;                 /* 0x084 */
 237         __u16        ext_int_code;             /* 0x086 */
 238         __u16        svc_ilc;                  /* 0x088 */
 239         __u16        svc_code;                 /* 0x08a */
 240         __u16        pgm_ilc;                  /* 0x08c */
 241         __u16        pgm_code;                 /* 0x08e */
 242         __u32        data_exc_code;            /* 0x090 */
 243         __u16        mon_class_num;            /* 0x094 */
 244         __u16        per_perc_atmid;           /* 0x096 */
 245         addr_t       per_address;              /* 0x098 */
 246         __u8         exc_access_id;            /* 0x0a0 */
 247         __u8         per_access_id;            /* 0x0a1 */
 248         __u8         op_access_id;             /* 0x0a2 */
 249         __u8         ar_access_id;             /* 0x0a3 */
 250         __u8         pad2[0xA8-0xA4];          /* 0x0a4 */
 251         addr_t       trans_exc_code;           /* 0x0A0 */
 252         addr_t       monitor_code;             /* 0x09c */
 253         __u16        subchannel_id;            /* 0x0b8 */
 254         __u16        subchannel_nr;            /* 0x0ba */
 255         __u32        io_int_parm;              /* 0x0bc */
 256         __u32        io_int_word;              /* 0x0c0 */
 257         __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
 258         __u32        stfl_fac_list;            /* 0x0c8 */
 259         __u8         pad4[0xe8-0xcc];          /* 0x0cc */
 260         __u32        mcck_interruption_code[2]; /* 0x0e8 */
 261         __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
 262         __u32        external_damage_code;     /* 0x0f4 */
 263         addr_t       failing_storage_address;  /* 0x0f8 */
 264         __u8         pad6[0x120-0x100];        /* 0x100 */
 265         psw_t        restart_old_psw;          /* 0x120 */
 266         psw_t        external_old_psw;         /* 0x130 */
 267         psw_t        svc_old_psw;              /* 0x140 */
 268         psw_t        program_old_psw;          /* 0x150 */
 269         psw_t        mcck_old_psw;             /* 0x160 */
 270         psw_t        io_old_psw;               /* 0x170 */
 271         __u8         pad7[0x1a0-0x180];        /* 0x180 */
 272         psw_t        restart_psw;              /* 0x1a0 */
 273         psw_t        external_new_psw;         /* 0x1b0 */
 274         psw_t        svc_new_psw;              /* 0x1c0 */
 275         psw_t        program_new_psw;          /* 0x1d0 */
 276         psw_t        mcck_new_psw;             /* 0x1e0 */
 277         psw_t        io_new_psw;               /* 0x1f0 */
 278         psw_t        return_psw;               /* 0x200 */
 279         __u8         irb[64];                  /* 0x210 */
 280         __u64        sync_enter_timer;         /* 0x250 */
 281         __u64        async_enter_timer;        /* 0x258 */
 282         __u64        exit_timer;               /* 0x260 */
 283         __u64        last_update_timer;        /* 0x268 */
 284         __u64        user_timer;               /* 0x270 */
 285         __u64        system_timer;             /* 0x278 */
 286         __u64        last_update_clock;        /* 0x280 */
 287         __u64        steal_clock;              /* 0x288 */
 288         __u8         pad8[0xc00-0x290];        /* 0x290 */
 289         /* System info area */
 290         __u64        save_area[16];            /* 0xc00 */
 291         __u8         pad9[0xd40-0xc80];        /* 0xc80 */
 292         __u64        kernel_stack;             /* 0xd40 */
 293         __u64        thread_info;              /* 0xd48 */
 294         __u64        async_stack;              /* 0xd50 */
 295         __u64        kernel_asce;              /* 0xd58 */
 296         __u64        user_asce;                /* 0xd60 */
 297         __u64        panic_stack;              /* 0xd68 */
 298         __u8         pad10[0xd80-0xd70];       /* 0xd70 */
 299         /* entry.S sensitive area start */
 300         struct       cpuinfo_S390 cpu_data;    /* 0xd80 */
 301         __u32        ipl_device;               /* 0xdb8 */
 302         __u32        pad11;                    /* 0xdbc */
 303         /* entry.S sensitive area end */
 304
 305         /* SMP info area: defined by DJB */
 306         __u64        jiffy_timer;              /* 0xdc0 */
 307         __u64        ext_call_fast;            /* 0xdc8 */
 308         __u64        percpu_offset;            /* 0xdd0 */
 309         __u64        current_task;             /* 0xdd8 */
 310         __u64        softirq_pending;          /* 0xde0 */
 311         __u64        int_clock;                /* 0xde8 */
 312         __u8         pad12[0xe00-0xdf0];       /* 0xdf0 */
 313
 314         /* 0xe00 is used as indicator for dump tools */
 315         /* whether the kernel died with panic() or not */
 316         __u32        panic_magic;              /* 0xe00 */
 317
 318         __u8         pad13[0x1200-0xe04];      /* 0xe04 */
 319
 320         /* System info area */
 321
 322         __u64        floating_pt_save_area[16]; /* 0x1200 */
 323         __u64        gpregs_save_area[16];      /* 0x1280 */
 324         __u32        st_status_fixed_logout[4]; /* 0x1300 */
 325         __u8         pad14[0x1318-0x1310];      /* 0x1310 */
 326         __u32        prefixreg_save_area;       /* 0x1318 */
 327         __u32        fpt_creg_save_area;        /* 0x131c */
 328         __u8         pad15[0x1324-0x1320];      /* 0x1320 */
 329         __u32        tod_progreg_save_area;     /* 0x1324 */
 330         __u32        cpu_timer_save_area[2];    /* 0x1328 */
 331         __u32        clock_comp_save_area[2];   /* 0x1330 */
 332         __u8         pad16[0x1340-0x1338];      /* 0x1338 */
 333         __u32        access_regs_save_area[16]; /* 0x1340 */
 334         __u64        cregs_save_area[16];       /* 0x1380 */
 335
 336         /* align to the top of the prefix area */
 337
 338         __u8         pad17[0x2000-0x1400];      /* 0x1400 */
 339 #endif /* !__s390x__ */
 340 } __attribute__((packed)); /* End structure*/
 341
 342 #define S390_lowcore (*((struct _lowcore *) 0))
 343 extern struct _lowcore *lowcore_ptr[];
 344
 345 extern __inline__ void set_prefix(__u32 address)
 346 {
 347         __asm__ __volatile__ ("spx %0" : : "m" (address) : "memory" );
 348 }
 349
 350 #define __PANIC_MAGIC           0xDEADC0DE
 351
 352 #endif
 353
 354 #endif