1 #ifndef _ASM_POWERPC_IO_H
2 #define _ASM_POWERPC_IO_H
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
13 #include <asm-ppc/io.h>
16 #include <linux/compiler.h>
18 #include <asm/byteorder.h>
19 #ifdef CONFIG_PPC_ISERIES
20 #include <asm/iseries/iseries_io.h>
22 #include <asm/synch.h>
23 #include <asm/delay.h>
25 #include <asm-generic/iomap.h>
27 #define __ide_mm_insw(p, a, c) _insw_ns((volatile u16 __iomem *)(p), (a), (c))
28 #define __ide_mm_insl(p, a, c) _insl_ns((volatile u32 __iomem *)(p), (a), (c))
29 #define __ide_mm_outsw(p, a, c) _outsw_ns((volatile u16 __iomem *)(p), (a), (c))
30 #define __ide_mm_outsl(p, a, c) _outsl_ns((volatile u32 __iomem *)(p), (a), (c))
33 #define SIO_CONFIG_RA 0x398
34 #define SIO_CONFIG_RD 0x399
38 extern unsigned long isa_io_base;
39 extern unsigned long pci_io_base;
41 #ifdef CONFIG_PPC_ISERIES
42 /* __raw_* accessors aren't supported on iSeries */
43 #define __raw_readb(addr) { BUG(); 0; }
44 #define __raw_readw(addr) { BUG(); 0; }
45 #define __raw_readl(addr) { BUG(); 0; }
46 #define __raw_readq(addr) { BUG(); 0; }
47 #define __raw_writeb(v, addr) { BUG(); 0; }
48 #define __raw_writew(v, addr) { BUG(); 0; }
49 #define __raw_writel(v, addr) { BUG(); 0; }
50 #define __raw_writeq(v, addr) { BUG(); 0; }
51 #define readb(addr) iSeries_Read_Byte(addr)
52 #define readw(addr) iSeries_Read_Word(addr)
53 #define readl(addr) iSeries_Read_Long(addr)
54 #define writeb(data, addr) iSeries_Write_Byte((data),(addr))
55 #define writew(data, addr) iSeries_Write_Word((data),(addr))
56 #define writel(data, addr) iSeries_Write_Long((data),(addr))
57 #define memset_io(a,b,c) iSeries_memset_io((a),(b),(c))
58 #define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((a), (b), (c))
59 #define memcpy_toio(a,b,c) iSeries_memcpy_toio((a), (b), (c))
61 #define inb(addr) readb(((void __iomem *)(long)(addr)))
62 #define inw(addr) readw(((void __iomem *)(long)(addr)))
63 #define inl(addr) readl(((void __iomem *)(long)(addr)))
64 #define outb(data,addr) writeb(data,((void __iomem *)(long)(addr)))
65 #define outw(data,addr) writew(data,((void __iomem *)(long)(addr)))
66 #define outl(data,addr) writel(data,((void __iomem *)(long)(addr)))
68 * The *_ns versions below don't do byte-swapping.
69 * Neither do the standard versions now, these are just here
72 #define insw_ns(port, buf, ns) _insw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
73 #define insl_ns(port, buf, nl) _insl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
76 static inline unsigned char __raw_readb(const volatile void __iomem *addr)
78 return *(volatile unsigned char __force *)addr;
80 static inline unsigned short __raw_readw(const volatile void __iomem *addr)
82 return *(volatile unsigned short __force *)addr;
84 static inline unsigned int __raw_readl(const volatile void __iomem *addr)
86 return *(volatile unsigned int __force *)addr;
88 static inline unsigned long __raw_readq(const volatile void __iomem *addr)
90 return *(volatile unsigned long __force *)addr;
92 static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
94 *(volatile unsigned char __force *)addr = v;
96 static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
98 *(volatile unsigned short __force *)addr = v;
100 static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
102 *(volatile unsigned int __force *)addr = v;
104 static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
106 *(volatile unsigned long __force *)addr = v;
108 #define readb(addr) eeh_readb(addr)
109 #define readw(addr) eeh_readw(addr)
110 #define readl(addr) eeh_readl(addr)
111 #define readq(addr) eeh_readq(addr)
112 #define writeb(data, addr) eeh_writeb((data), (addr))
113 #define writew(data, addr) eeh_writew((data), (addr))
114 #define writel(data, addr) eeh_writel((data), (addr))
115 #define writeq(data, addr) eeh_writeq((data), (addr))
116 #define memset_io(a,b,c) eeh_memset_io((a),(b),(c))
117 #define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c))
118 #define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c))
119 #define inb(port) eeh_inb((unsigned long)port)
120 #define outb(val, port) eeh_outb(val, (unsigned long)port)
121 #define inw(port) eeh_inw((unsigned long)port)
122 #define outw(val, port) eeh_outw(val, (unsigned long)port)
123 #define inl(port) eeh_inl((unsigned long)port)
124 #define outl(val, port) eeh_outl(val, (unsigned long)port)
127 * The insw/outsw/insl/outsl macros don't do byte-swapping.
128 * They are only used in practice for transferring buffers which
129 * are arrays of bytes, and byte-swapping is not appropriate in
130 * that case. - paulus */
131 #define insb(port, buf, ns) eeh_insb((port), (buf), (ns))
132 #define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
133 #define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
134 #define insw_ns(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
135 #define insl_ns(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
137 #define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
138 #define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
139 #define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
143 #define readb_relaxed(addr) readb(addr)
144 #define readw_relaxed(addr) readw(addr)
145 #define readl_relaxed(addr) readl(addr)
146 #define readq_relaxed(addr) readq(addr)
148 extern void _insb(volatile u8 __iomem *port, void *buf, int ns);
149 extern void _outsb(volatile u8 __iomem *port, const void *buf, int ns);
150 extern void _insw(volatile u16 __iomem *port, void *buf, int ns);
151 extern void _outsw(volatile u16 __iomem *port, const void *buf, int ns);
152 extern void _insl(volatile u32 __iomem *port, void *buf, int nl);
153 extern void _outsl(volatile u32 __iomem *port, const void *buf, int nl);
154 extern void _insw_ns(volatile u16 __iomem *port, void *buf, int ns);
155 extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, int ns);
156 extern void _insl_ns(volatile u32 __iomem *port, void *buf, int nl);
157 extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, int nl);
162 * output pause versions need a delay at least for the
163 * w83c105 ide controller in a p610.
165 #define inb_p(port) inb(port)
166 #define outb_p(val, port) (udelay(1), outb((val), (port)))
167 #define inw_p(port) inw(port)
168 #define outw_p(val, port) (udelay(1), outw((val), (port)))
169 #define inl_p(port) inl(port)
170 #define outl_p(val, port) (udelay(1), outl((val), (port)))
173 * The *_ns versions below don't do byte-swapping.
174 * Neither do the standard versions now, these are just here
177 #define outsw_ns(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
178 #define outsl_ns(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
181 #define IO_SPACE_LIMIT ~(0UL)
184 extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
185 unsigned long size, unsigned long flags);
186 extern void __iomem *__ioremap(unsigned long address, unsigned long size,
187 unsigned long flags);
190 * ioremap - map bus memory into CPU space
191 * @address: bus address of the memory
192 * @size: size of the resource to map
194 * ioremap performs a platform specific sequence of operations to
195 * make bus memory CPU accessible via the readb/readw/readl/writeb/
196 * writew/writel functions and the other mmio helpers. The returned
197 * address is not guaranteed to be usable directly as a virtual
200 extern void __iomem *ioremap(unsigned long address, unsigned long size);
202 #define ioremap_nocache(addr, size) ioremap((addr), (size))
203 extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size);
204 extern void iounmap(volatile void __iomem *addr);
205 extern void __iomem * reserve_phb_iospace(unsigned long size);
208 * virt_to_phys - map virtual addresses to physical
209 * @address: address to remap
211 * The returned physical address is the physical (CPU) mapping for
212 * the memory address given. It is only valid to use this function on
213 * addresses directly mapped or allocated via kmalloc.
215 * This function does not give bus mappings for DMA transfers. In
216 * almost all conceivable cases a device driver should not be using
219 static inline unsigned long virt_to_phys(volatile void * address)
221 return __pa((unsigned long)address);
225 * phys_to_virt - map physical address to virtual
226 * @address: address to remap
228 * The returned virtual address is a current CPU mapping for
229 * the memory address given. It is only valid to use this function on
230 * addresses that have a kernel mapping
232 * This function does not handle bus mappings for DMA transfers. In
233 * almost all conceivable cases a device driver should not be using
236 static inline void * phys_to_virt(unsigned long address)
238 return (void *)__va(address);
242 * Change "struct page" to physical address.
244 #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
246 /* We do NOT want virtual merging, it would put too much pressure on
247 * our iommu allocator. Instead, we want drivers to be smart enough
248 * to coalesce sglists that happen to have been mapped in a contiguous
251 #define BIO_VMERGE_BOUNDARY 0
253 static inline void iosync(void)
255 __asm__ __volatile__ ("sync" : : : "memory");
258 /* Enforce in-order execution of data I/O.
259 * No distinction between read/write on PPC; use eieio for all three.
261 #define iobarrier_rw() eieio()
262 #define iobarrier_r() eieio()
263 #define iobarrier_w() eieio()
266 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
267 * These routines do not perform EEH-related I/O address translation,
268 * and should not be used directly by device drivers. Use inb/readb
271 static inline int in_8(const volatile unsigned char __iomem *addr)
275 __asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
276 : "=r" (ret) : "m" (*addr));
280 static inline void out_8(volatile unsigned char __iomem *addr, int val)
282 __asm__ __volatile__("stb%U0%X0 %1,%0; sync"
283 : "=m" (*addr) : "r" (val));
286 static inline int in_le16(const volatile unsigned short __iomem *addr)
290 __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync"
291 : "=r" (ret) : "r" (addr), "m" (*addr));
295 static inline int in_be16(const volatile unsigned short __iomem *addr)
299 __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
300 : "=r" (ret) : "m" (*addr));
304 static inline void out_le16(volatile unsigned short __iomem *addr, int val)
306 __asm__ __volatile__("sthbrx %1,0,%2; sync"
307 : "=m" (*addr) : "r" (val), "r" (addr));
310 static inline void out_be16(volatile unsigned short __iomem *addr, int val)
312 __asm__ __volatile__("sth%U0%X0 %1,%0; sync"
313 : "=m" (*addr) : "r" (val));
316 static inline unsigned in_le32(const volatile unsigned __iomem *addr)
320 __asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync"
321 : "=r" (ret) : "r" (addr), "m" (*addr));
325 static inline unsigned in_be32(const volatile unsigned __iomem *addr)
329 __asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
330 : "=r" (ret) : "m" (*addr));
334 static inline void out_le32(volatile unsigned __iomem *addr, int val)
336 __asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr)
337 : "r" (val), "r" (addr));
340 static inline void out_be32(volatile unsigned __iomem *addr, int val)
342 __asm__ __volatile__("stw%U0%X0 %1,%0; sync"
343 : "=m" (*addr) : "r" (val));
346 static inline unsigned long in_le64(const volatile unsigned long __iomem *addr)
348 unsigned long tmp, ret;
350 __asm__ __volatile__(
354 "rldimi %0,%1,5*8,1*8\n"
355 "rldimi %0,%1,3*8,2*8\n"
356 "rldimi %0,%1,1*8,3*8\n"
357 "rldimi %0,%1,7*8,4*8\n"
358 "rldicl %1,%1,32,0\n"
359 "rlwimi %0,%1,8,8,31\n"
360 "rlwimi %0,%1,24,16,23\n"
361 : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr));
365 static inline unsigned long in_be64(const volatile unsigned long __iomem *addr)
369 __asm__ __volatile__("ld%U1%X1 %0,%1; twi 0,%0,0; isync"
370 : "=r" (ret) : "m" (*addr));
374 static inline void out_le64(volatile unsigned long __iomem *addr, unsigned long val)
378 __asm__ __volatile__(
379 "rldimi %0,%1,5*8,1*8\n"
380 "rldimi %0,%1,3*8,2*8\n"
381 "rldimi %0,%1,1*8,3*8\n"
382 "rldimi %0,%1,7*8,4*8\n"
383 "rldicl %1,%1,32,0\n"
384 "rlwimi %0,%1,8,8,31\n"
385 "rlwimi %0,%1,24,16,23\n"
388 : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr));
391 static inline void out_be64(volatile unsigned long __iomem *addr, unsigned long val)
393 __asm__ __volatile__("std%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
396 #ifndef CONFIG_PPC_ISERIES
401 * check_signature - find BIOS signatures
402 * @io_addr: mmio address to check
403 * @signature: signature block
404 * @length: length of signature
406 * Perform a signature comparison with the mmio address io_addr. This
407 * address should have been obtained by ioremap.
408 * Returns 1 on a match.
410 static inline int check_signature(const volatile void __iomem * io_addr,
411 const unsigned char *signature, int length)
414 #ifndef CONFIG_PPC_ISERIES
416 if (readb(io_addr) != *signature)
430 #define dma_cache_inv(_start,_size) do { } while (0)
431 #define dma_cache_wback(_start,_size) do { } while (0)
432 #define dma_cache_wback_inv(_start,_size) do { } while (0)
434 /* Check of existence of legacy devices */
435 extern int check_legacy_ioport(unsigned long base_port);
439 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
442 #define xlate_dev_mem_ptr(p) __va(p)
445 * Convert a virtual cached pointer to an uncached pointer
447 #define xlate_dev_kmem_ptr(p) p
449 #endif /* __KERNEL__ */
451 #endif /* CONFIG_PPC64 */
452 #endif /* _ASM_POWERPC_IO_H */